利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

218 条记录 (耗时 0.035 秒)

    Semiconductor device and fabrication method thereof
    73.
    发明申请
    Semiconductor device and fabrication method thereof 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20070152306A1

    公开(公告)日：2007-07-05

    申请号：US11324334

    申请日：2006-01-04

    申请人： Chien-Hsueh Shih ,  Shau-Lin Shue ,  Mong-Song Liang ,  Chao-Hsien Peng

    发明人： Chien-Hsueh Shih ,  Shau-Lin Shue ,  Mong-Song Liang ,  Chao-Hsien Peng

    IPC分类号： H01L23/58 ,  H01L21/4763

    CPC分类号： H01L21/2885 ,  C23C18/1889 ,  C23C18/1893 ,  C25D5/54 ,  C25D13/04 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76877

    摘要： A semiconductor device and fabrication method thereof. The semiconductor device comprises a substrate, an electroactive organic layer with conformal step coverage and uniform thickness, and a metal layer. The substrate is a conductive substrate or a nonconductive substrate with a conductive layer formed thereon. The electroactive organic layer and the metal layer are formed sequentially on the conductive substrate or the conductive layer, wherein the electroactive organic layer comprises metal atoms and serves as a seed layer, resulting in the metal layer formed in-situ.

    摘要翻译： 半导体器件及其制造方法。 半导体器件包括基底，具有适形阶梯覆盖和均匀厚度的电活性有机层和金属层。 衬底是其上形成有导电层的导电衬底或非导电衬底。 所述电活性有机层和所述金属层依次形成在所述导电性基板或所述导电层上，其中所述电活性有机层包含金属原子并且用作种子层，导致所述金属层原位形成。

    Barrier metal re-distribution process for resistivity reduction
    75.
    发明授权
    Barrier metal re-distribution process for resistivity reduction 失效
    阻隔金属重新分配过程的电阻率降低

    公开(公告)号：US07071095B2

    公开(公告)日：2006-07-04

    申请号：US10850763

    申请日：2004-05-20

    申请人： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

    发明人： Cheng-Lin Huang ,  Ching-Hua Hsieh ,  Shau-Lin Shue

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76865 ,  H01L21/02046 ,  H01L21/2855 ,  H01L21/32131 ,  H01L21/76843 ,  H01L21/76862

    摘要： A novel process for re-distributing a barrier layer deposited on a single damascene, dual damascene or other contact opening structure. The process includes providing a substrate having a contact opening structure and a metal barrier layer deposited in the contact opening structure, re-sputtering the barrier layer by bombarding the barrier layer with argon ions and metal ions, and re-sputtering the barrier layer by bombarding the barrier layer with argon ions.

    摘要翻译： 一种用于重新分布沉积在单个镶嵌，双镶嵌或其他接触开口结构上的阻挡层的新方法。 该方法包括提供具有接触开口结构的衬底和沉积在接触开口结构中的金属阻挡层，通过用氩离子和金属离子轰击阻挡层来重新溅射阻挡层，并通过轰击来重新溅射阻挡层 阻挡层具有氩离子。

    Damascene interconnect structure with cap layer
    76.
    发明申请
    Damascene interconnect structure with cap layer 有权
    镶嵌互连结构与盖层

    公开(公告)号：US20060118962A1

    公开(公告)日：2006-06-08

    申请号：US11004767

    申请日：2004-12-03

    申请人： Jui Huang ,  Minghsing Tsai ,  Shau-Lin Shue ,  Hung-Wen Su ,  Ting-Chu Ko

    发明人： Jui Huang ,  Minghsing Tsai ,  Shau-Lin Shue ,  Hung-Wen Su ,  Ting-Chu Ko

    IPC分类号： H01L23/48 ,  H01L23/52

    CPC分类号： H01L21/76838 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming an integrated circuit interconnect structure is presented. A first conductive line is formed over a semiconductor substrate. A conductive cap layer is formed on the first conductive line to improve device reliability. An etch stop layer (ESL) is formed on the conductive cap layer. An inter-level dielectric (IMD) is formed on the ESL. A via opening and a trench are formed in the ESL, IMD, and conductive cap layer. A recess is formed in the first conductive line. The recess can be formed by over etching when the first dielectric is etched, or by a separate process such as argon sputtering. A second conductive line is formed filling the trench, opening and recess.

    摘要翻译： 提出了一种形成集成电路互连结构的方法。 在半导体衬底上形成第一导电线。 导电盖层形成在第一导电线上以提高器件的可靠性。 在导电盖层上形成蚀刻停止层（ESL）。 在ESL上形成层间电介质（IMD）。 通孔和沟槽形成在ESL，IMD和导电盖层中。 在第一导线中形成凹部。 当蚀刻第一电介质时，或者通过诸如氩气溅射的分离工艺，可以通过过蚀刻形成凹部。 形成第二导电线，填充沟槽，开口和凹陷。

    Diffusion barrier for damascene structures
    77.
    发明申请
    Diffusion barrier for damascene structures 审中-公开
    镶嵌结构的扩散屏障

    公开(公告)号：US20060099802A1

    公开(公告)日：2006-05-11

    申请号：US10985149

    申请日：2004-11-10

    申请人： Jing-Cheng Lin ,  Shau-Lin Shue

    发明人： Jing-Cheng Lin ,  Shau-Lin Shue

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76814 ,  H01L21/76826 ,  H01L21/76831

    摘要： A semiconductor structure having a via formed in a dielectric layer is provided. The exposed pores of the dielectric material along the sidewalls of the via are partially or completely sealed. Thereafter, one or more barrier layers may be formed and the via may be filled with a conductive material. The barrier layers formed over the sealing layer exhibits a more continuous barrier layer. The pores may be partially or completely sealed by performing, for example, a plasma process in an argon environment.

    摘要翻译： 提供了具有形成在电介质层中的通孔的半导体结构。 沿着通孔的侧壁的电介质材料的暴露的孔部分或完全密封。 此后，可以形成一个或多个阻挡层，并且可以用导电材料填充通孔。 形成在密封层之上的阻挡层表现出更连续的阻挡层。 通过在氩气环境中进行例如等离子体处理，可以将孔部分或完全密封。

    Barrier structure for semiconductor devices
    79.
    发明申请
    Barrier structure for semiconductor devices 审中-公开
    半导体器件的阻挡结构

    公开(公告)号：US20050266679A1

    公开(公告)日：2005-12-01

    申请号：US10995752

    申请日：2004-11-23

    申请人： Jing-Cheng Lin ,  Shau-Lin Shue

    发明人： Jing-Cheng Lin ,  Shau-Lin Shue

    IPC分类号： H01L21/768 ,  H01L21/4763 ,  H01L23/52

    CPC分类号： H01L21/76843 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76865

    摘要： A via having a unique barrier layer structure is provided. In an embodiment, a via is formed by forming a barrier layer in a via. The barrier layer along the bottom of the via is partially or completely removed, and the via is filled with a conductive material. In another embodiment, a first barrier layer is formed along the bottom and sidewalls of the via. Thereafter, the first barrier layer along the bottom of the via is partially or completely removed, and a second barrier layer is formed.

    摘要翻译： 提供具有独特的阻挡层结构的通孔。 在一个实施例中，通孔在通孔中形成阻挡层而形成通孔。 沿着通孔底部的阻挡层被部分地或完全去除，并且通孔用导电材料填充。 在另一个实施例中，沿着通孔的底部和侧壁形成第一阻挡层。 此后，沿通孔底部的第一阻挡层被部分地或完全地去除，形成第二阻挡层。