公开(公告)号：US20080135901A1

公开(公告)日：2008-06-12

申请号：US11939955

申请日：2007-11-14

申请人： Yoshiro SHIMOJO ,  Susumu Shuto ,  Iwao Kunishima ,  Tohru Ozaki

发明人： Yoshiro SHIMOJO ,  Susumu Shuto ,  Iwao Kunishima ,  Tohru Ozaki

IPC分类号： H01L29/76 ,  H01L21/8246

CPC分类号： H01L27/11502 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/11507

摘要： A semiconductor memory, comprising: a first memory cell transistor disposed on a semiconductor substrate; a second memory cell transistor disposed on the semiconductor substrate and having a first source-drain region in common with the first memory cell transistor; a first ferroelectric capacitor disposed with a via in between above a second source-drain region of the first memory cell transistor; a second ferroelectric capacitor disposed with a via in between above a second source-drain region of the second memory cell transistor; an interlayer dielectric disposed on the semiconductor substrate, as coating the memory cell transistors and the ferroelectric capacitors, the interlayer dielectric having a contact hole through which the first source-drain region is partially exposed at the bottom and upper electrodes of the first and second ferroelectric capacitors are partially exposed at the top; and a wiring layer filled into the contact hole, which connects the first source-drain region, the upper electrode of the first ferroelectric capacitor, and the second ferroelectric capacitor.

摘要翻译： 一种半导体存储器，包括：设置在半导体衬底上的第一存储单元晶体管; 第二存储单元晶体管，设置在半导体衬底上并且具有与第一存储单元晶体管共同的第一源 - 漏区; 第一铁电电容器，其设置有在第一存储单元晶体管的第二源 - 漏区之间的通孔; 第二铁电电容器，设置有在第二存储单元晶体管的第二源极 - 漏极区之间的通孔; 设置在半导体衬底上的层间电介质，作为涂覆存储单元晶体管和铁电电容器，层间电介质具有接触孔，第一源极 - 漏极区域在第一和第二铁电体的底部被部分暴露，上部电极 电容器部分暴露在顶部; 以及将第一源极 - 漏极区域，第一铁电体电容器的上部电极和第二铁电电容器连接的接触孔中填充的布线层。

公开(公告)号：US07095068B2

公开(公告)日：2006-08-22

申请号：US10455376

申请日：2003-06-06

申请人： Yoshinori Kumura ,  Iwao Kunishima ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Shinichi Watanabe

发明人： Yoshinori Kumura ,  Iwao Kunishima ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Shinichi Watanabe

IPC分类号： H01L29/76 ,  H01L27/108

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： A semiconductor memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate and including a first gate electrode and first and second diffusion layers, a first contact connected to the first diffusion layer, a first conductive oxygen barrier film electrically connected to the first contact and covering at least the upper surface of the first contact, a first ferroelectric capacitor including a first electrode, a second electrode, and a first ferroelectric film interposed between the first and second electrodes, and a first connecting member connected to the first electrode and to the first conductive oxygen barrier film.

摘要翻译： 半导体存储器件包括半导体衬底，形成在半导体衬底上的第一晶体管，包括第一栅电极和第一和第二扩散层，与第一扩散层连接的第一触点，与第一导电氧阻隔膜电连接的第一导电氧阻隔膜 首先接触并且至少覆盖第一接触件的上表面;第一铁电电容器，包括插入在第一和第二电极之间的第一电极，第二电极和第一铁电体膜;以及连接到第一电极的第一连接构件 和第一导电氧阻隔膜。

公开(公告)号：US20060180894A1

公开(公告)日：2006-08-17

申请号：US11142441

申请日：2005-06-02

申请人： Yoshinori Kumura ,  Iwao Kunishima ,  Hiroyuki Kanaya ,  Tohru Ozaki ,  Kazuhiro Tomioka

发明人： Yoshinori Kumura ,  Iwao Kunishima ,  Hiroyuki Kanaya ,  Tohru Ozaki ,  Kazuhiro Tomioka

IPC分类号： H01L29/00

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57 ,  H01L28/65

摘要： A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.

摘要翻译： 一种半导体存储器件，其防止氢或水分从其包括接触插塞部分的周围区域渗入铁电电容器，包括形成在半导体衬底上的强电介质电容器，形成在铁电体的上表面上的第一氢阻挡膜 电容器在形成铁电电容器时用作掩模，在上表面上形成的第二氢阻挡膜和包括在第一氢阻挡膜上的强电介质电容器的侧面，以及通过第一和第二 氢阻挡膜，并连接到铁电电容器的上电极，其侧面被氢阻挡膜包围。

公开(公告)号：US20060170019A1

公开(公告)日：2006-08-03

申请号：US11134414

申请日：2005-05-23

申请人： Tohru Ozaki ,  Iwao Kunishima

发明人： Tohru Ozaki ,  Iwao Kunishima

IPC分类号： H01L29/94 ,  H01L21/00

CPC分类号： H01L27/11507 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57

摘要： There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor substrate, the ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first hydrogen barrier film which continuously surrounds side portions of a ferroelectric capacitor cell array constituted of a plurality of ferroelectric capacitors, and a second hydrogen barrier film which is formed above the ferroelectric capacitor cell array and which is brought into contact with the first hydrogen barrier film in the whole periphery.

摘要翻译： 提供了一种包括铁电电容器的半导体存储装置，该铁电电容器的阻挡能力优于氢气从包括横向的所有方向渗透。 该器件包括形成在半导体衬底上的晶体管，形成在晶体管上方并包括下电极，铁电体膜和上电极的铁电电容器，连续围绕构成的铁电电容器单元阵列的侧部的第一氢阻挡膜 的多个强电介质电容器，以及形成在铁电体电容器单元阵列上方并与整个周边与第一氢阻挡膜接触的第二氢阻挡膜。

公开(公告)号：US06972990B2

公开(公告)日：2005-12-06

申请号：US10858441

申请日：2004-06-02

申请人： Yoshinori Kumura ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Iwao Kunishima ,  Yoshiro Shimojo

发明人： Yoshinori Kumura ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Iwao Kunishima ,  Yoshiro Shimojo

IPC分类号： H01L27/10 ,  G11C11/14 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/105

CPC分类号： G11C11/22 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/57

摘要： A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

摘要翻译： 铁电存储器件包括形成在半导体衬底上的栅电极，形成在半导体衬底中的第一和第二扩散层，与第一扩散层电连接的第一触点，具有第一氧阻隔膜， 绝缘性能，其形成在第一接触件上，与第一接触件电连接的第二接触件，形成在第二接触件上的具有绝缘性能的第二氧阻隔膜，具有下电极的铁电电容器 铁电膜和上电极，与上电极电连接的第三触点，与第二触头和第三触头电连接的第一互连件，以及具有绝缘性能的第三隔氧膜，其为 布置在铁电电容器和第二触点之间并与第一氧阻隔膜接触。

公开(公告)号：US20050207202A1

公开(公告)日：2005-09-22

申请号：US10858441

申请日：2004-06-02

申请人： Yoshinori Kumura ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Iwao Kunishima ,  Yoshiro Shimojo

发明人： Yoshinori Kumura ,  Tohru Ozaki ,  Hiroyuki Kanaya ,  Iwao Kunishima ,  Yoshiro Shimojo

IPC分类号： H01L27/10 ,  G11C11/14 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/105

CPC分类号： G11C11/22 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/57

摘要： A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

摘要翻译： 铁电存储器件包括形成在半导体衬底上的栅电极，形成在半导体衬底中的第一和第二扩散层，与第一扩散层电连接的第一触点，具有第一氧阻隔膜， 绝缘性能，其形成在第一接触件上，与第一接触件电连接的第二接触件，形成在第二接触件上的具有绝缘性能的第二氧阻隔膜，具有下电极的铁电电容器 铁电膜和上电极，与上电极电连接的第三触点，与第二触头和第三触头电连接的第一互连件，以及具有绝缘性能的第三隔氧膜，其为 布置在铁电电容器和第二触点之间并与第一氧阻隔膜接触。

公开(公告)号：US20050176199A1

公开(公告)日：2005-08-11

申请号：US10618616

申请日：2003-07-15

申请人： Tohru Ozaki ,  Iwao Kunishima ,  Toyota Morimoto ,  Hiroyuki Kanaya

发明人： Tohru Ozaki ,  Iwao Kunishima ,  Toyota Morimoto ,  Hiroyuki Kanaya

IPC分类号： H01L27/105 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/336

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.

摘要翻译： 一种半导体存储器件，包括具有形成在半导体衬底上的多个存储晶体管的存储单元块。 存储晶体管包括第一和第二杂质扩散区域以及在它们之间形成的栅极。 多个存储单元也包括在存储单元块中，并且具有连接到第一杂质扩散区的下电极，形成在下电极上的铁电膜和形成在铁电体膜上的第一上电极并连接到第二杂质扩散区 地区。 还包括形成在半导体衬底上并连接到存储单元块的一端的块选择晶体管。 第二上电极也形成为与块选择晶体管相邻并且与存储单元的第一上电极断开连接。

公开(公告)号：US20050121709A1

公开(公告)日：2005-06-09

申请号：US10933382

申请日：2004-09-03

申请人： Tohru Ozaki

发明人： Tohru Ozaki

IPC分类号： H01L27/105 ,  H01L21/8246 ,  H01L27/108 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/1159 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/11502 ,  H01L27/11585

摘要： A ferroelectric memory device includes a first trench formed in a semiconductor substrate and having a first depth, a second trench formed in the substrate and having a second depth, a first element isolation insulating film buried in the first trench, a first gate electrode formed in a lower region of the second trench, a first insulating film formed in an upper region of the second trench, first and second diffusion layers formed in the substrate on both side surface in the second trench, a first ferroelectric capacitor disposed on the first diffusion layer, a first contact disposed on the first ferroelectric capacitor, a first wiring layer disposed on the first contact, a second contact disposed on the second diffusion layer, and a second wiring layer disposed on the second contact and disposed in the same level as that of the first wiring layer.

摘要翻译： 铁电存储器件包括形成在半导体衬底中并具有第一深度的第一沟槽，形成在衬底中并具有第二深度的第二沟槽，埋在第一沟槽中的第一元件隔离绝缘膜，形成在第一沟槽中的第一栅电极 第二沟槽的下部区域，形成在第二沟槽的上部区域中的第一绝缘膜，在第二沟槽的两侧面上形成在基板中的第一和第二扩散层，设置在第一扩散层上的第一铁电电容器 设置在第一铁电电容器上的第一触点，设置在第一触点上的第一布线层，设置在第二扩散层上的第二触点和设置在第二触点上的第二布线层， 第一布线层。

公开(公告)号：US06303429B1

公开(公告)日：2001-10-16

申请号：US09676084

申请日：2000-10-02

申请人： Yutaka Ishibashi ,  Yusuke Kohyama ,  Tohru Ozaki

发明人： Yutaka Ishibashi ,  Yusuke Kohyama ,  Tohru Ozaki

IPC分类号： H01L218242

CPC分类号： H01L27/10885 ,  H01L27/10852 ,  H01L27/10873 ,  H01L28/91

摘要： Capacitors are formed in the trenches made in an interlayer insulator made of silicon oxide. An insulating film (e.g., a silicon nitride film) is provided on the sides of each trench of the interlayer insulator. A storage electrode made of ruthenium or the like is provided in each trench of the interlayer insulator. A capacitor insulating film made of BSTO or the like is formed on the storage electrode. A plate electrode made of ruthenium or the like is formed on the capacitor insulating film. The plate electrode is common to all capacitors provided. Any two adjacent capacitors are electrically isolated by the interlayer insulator and the insulating film provided on the sides of the trenches of the interlayer insulator.

摘要翻译： 电容器形成在由氧化硅制成的层间绝缘体中制成的沟槽中。 绝缘膜（例如，氮化硅膜）设置在层间绝缘体的每个沟槽的侧面上。 在层间绝缘体的每个沟槽中设置由钌等制成的存储电极。 在存储电极上形成由BSTO等构成的电容绝缘膜。 在电容器绝缘膜上形成由钌等制成的平板电极。 平板电极对所有提供的电容器是共同的。 任何两个相邻的电容器通过层间绝缘体和设置在层间绝缘体的沟槽的侧面上的绝缘膜电隔离。

公开(公告)号：US6104052A

公开(公告)日：2000-08-15

申请号：US273573

申请日：1999-03-22

申请人： Tohru Ozaki ,  Yusuke Kohyama

发明人： Tohru Ozaki ,  Yusuke Kohyama

IPC分类号： H01L27/108 ,  H01L21/02 ,  H01L21/8242 ,  H01L29/72

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/10888 ,  H01L28/91

摘要： In a DRAM adopting a self-aligned contact structure, an opening portion of predetermined size is formed in advance in an insulation film which surrounds an on-field gate electrode formed on an element isolating insulation film. The on-field gate electrode contacts a gate contact through the opening portion. A contact hole for the gate contact can thus be formed in self-alignment as can be the contact holes for a bit-line contact and an active contact. Consequently, the contact hole for the gate contact reaching the on-field gate can be formed simultaneously with the contact holes for the bit-line contact and active contact, thereby greatly reducing the number of manufacturing steps.

摘要翻译： 在采用自对准接触结构的DRAM中，预先形成围绕形成在元件隔离绝缘膜上的场上栅电极的绝缘膜中的预定尺寸的开口部分。 场电极电极通过开口部分接触栅极接触。 因此，用于栅极接触的接触孔可以自对准地形成，就像位线接触和有源触点的接触孔一样。 因此，到达栅极栅极的接触孔可以与用于位线接触和有源接触的接触孔同时形成，从而大大减少了制造步骤的数量。