公开(公告)号：US20050145938A1

公开(公告)日：2005-07-07

申请号：US10749273

申请日：2003-12-29

申请人： Chun-Chieh Lin

发明人： Chun-Chieh Lin

IPC分类号： H01L29/41 ,  H01L21/02 ,  H01L21/336 ,  H01L21/768 ,  H01L23/522 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786 ,  H01L21/425

CPC分类号： H01L29/785 ,  H01L27/1203 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66795 ,  H01L2029/7858 ,  H01L2924/0002 ,  H01L2924/00

摘要： A microelectronic device including an insulator located over a substrate, a semiconductor feature and a contact layer. The semiconductor feature has a thickness over the insulator, a first surface opposite the insulator, and a sidewall spanning at least a portion of the thickness. The contact layer has a first member extending over at least a portion of the first surface and a second member spanning at least a portion of the sidewall.

公开(公告)号：US20050009263A1

公开(公告)日：2005-01-13

申请号：US10730778

申请日：2003-12-09

申请人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Hu

发明人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Hu

IPC分类号： H01L21/28 ,  H01L21/8238 ,  H01L29/10

CPC分类号： H01L21/28167 ,  H01L21/26513 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/1054 ,  H01L29/155 ,  H01L29/7846

摘要： A process for fabricating CMOS devices, featuring a channel region comprised with a strained SiGe layer, has been developed. The process features the selective growth of a composite silicon layer on the top surface of N well and P well regions. The composite silicon layer is comprised of a thin, strained SiGe layer sandwiched between selectively grown, undoped silicon layers. The content of Ge in the SiGe layer, between about 20 to 40 weight percent, allows enhanced carrier mobility to exist without creation of silicon defects. A thin silicon dioxide gate insulator is thermally grown from a top portion of the selectively grown silicon layer, located overlying the selectively grown SiGe layer.

公开(公告)号：US06812116B2

公开(公告)日：2004-11-02

申请号：US10318454

申请日：2002-12-13

申请人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Kuo-Nan Yang ,  Chun-Chieh Lin ,  Chenming Hu

发明人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Kuo-Nan Yang ,  Chun-Chieh Lin ,  Chenming Hu

IPC分类号： H01L21301

CPC分类号： H01L21/3247 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/324 ,  H01L21/76259 ,  H01L29/1054

摘要： A method for making a SOI wafer with a strained silicon layer for increased electron and hole mobility is achieved. The method forms a porous silicon layer on a seed wafer. A H2 anneal is used to form a smooth surface on the porous silicon. A strain free (relaxed) epitaxial SixGe1−x layer is deposited and a bonding layer is formed. The seed wafer is then bonded to a handle wafer having an insulator on the surface. A spray etch is used to etch the porous Si layer resulting in a SOI handle wafer having portions of the porous Si layer on the relaxed SixGe1−x. The handle wafer is then annealed in H2 to convert the porous Si to a smooth strained Si layer on the relaxed SiGe layer of the SOI wafer.

摘要翻译： 实现了制造具有用于增加电子和空穴迁移率的应变硅层的SOI晶片的方法。 该方法在种子晶片上形成多孔硅层。 使用H2退火在多孔硅上形成光滑表面。 沉积无应变的（松弛的）外延六面体Ge-x层并形成结合层。 然后将种子晶片结合到在表面上具有绝缘体的手柄晶片。 使用喷涂蚀刻来蚀刻多孔Si层，导致SOI处理晶片，其具有在松弛的SixGe1-x上的多孔Si层的部分。 然后将处理晶片在H 2中退火以将多孔Si转化为SOI晶片的松弛SiGe层上的平滑应变Si层。

公开(公告)号：US10726010B2

公开(公告)日：2020-07-28

申请号：US13603302

申请日：2012-09-04

申请人： Rafi Ahmed ,  Chun-Chieh Lin ,  Mohamed Zait

发明人： Rafi Ahmed ,  Chun-Chieh Lin ,  Mohamed Zait

IPC分类号： G06F16/2453

摘要： A method, apparatus, and stored instructions are provided for transforming a query representation by unnesting a predicate condition that is based on whether or not a result exists for a subquery of the predicate condition. An initial query representation is received. The initial query representation represents an initial query that includes an EXISTS-equivalent predicate or a NOT-EXISTS-equivalent predicate and at least one other predicate in a disjunction. The initial query representation is transformed into a semantically equivalent transformed query representation that represents a transformed query. The transformed query includes, instead of the EXISTS-equivalent predicate or a NOT-EXISTS-equivalent predicate, a join operator that references the data object. The transformed query representation, when used for execution, causes the at least one other predicate to be applied separately from a join operation caused by the join operator such that execution of the initial representation is semantically equivalent to execution of the transformed representation.

公开(公告)号：US07659587B2

公开(公告)日：2010-02-09

申请号：US11746141

申请日：2007-05-09

申请人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Ming Hu

发明人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Ming Hu

IPC分类号： H01L21/00

CPC分类号： H01L21/28167 ,  H01L21/26513 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/1054 ,  H01L29/155 ,  H01L29/7846

摘要： A CMOS integrated circuit includes a substrate having an NMOS region with a P-well and a PMOS region with an N-well. A shallow trench isolation (STI) region is formed between the NMOS and PMOS regions and a composite silicon layer comprising a strained SiGe layer is formed over said P well region and over said N well region. The composite silicon layer is disconnected at the STI region. Gate electrodes are then formed on the composite layer in the NMOS and PMOS regions.

摘要翻译： CMOS集成电路包括具有带有P阱的NMOS区域和具有N阱的PMOS区域的衬底。 在NMOS和PMOS区之间形成浅沟槽隔离（STI）区，并且在所述P阱区和所述N阱区之上形成包含应变SiGe层的复合硅层。 复合硅层在STI区域断开。 然后在NMOS和PMOS区域中的复合层上形成栅电极。

公开(公告)号：US07354830B2

公开(公告)日：2008-04-08

申请号：US11377105

申请日：2006-03-16

申请人： Chun-Chieh Lin ,  Wen-Chin Lee ,  Chenming Hu ,  Shang-Chih Chen ,  Chih-Hao Wang ,  Fu-Liaog Yang ,  Yee-Chia Yeo

发明人： Chun-Chieh Lin ,  Wen-Chin Lee ,  Chenming Hu ,  Shang-Chih Chen ,  Chih-Hao Wang ,  Fu-Liaog Yang ,  Yee-Chia Yeo

IPC分类号： H01L21/8234

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823462 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A method of fabricating an integrated circuit is provided. A first gate dielectric portion is formed on a substrate in a first transistor region. The first gate dielectric portion includes a first high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. A second gate dielectric portion is formed on the substrate in a second transistor region. The second gate dielectric portion includes the first high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.

摘要翻译： 提供一种制造集成电路的方法。 第一栅介质部分形成在第一晶体管区域中的衬底上。 第一栅介质部分包括第一高介电常数介电材料。 第一栅介质部分具有第一等效氧化硅厚度。 在第二晶体管区域中的衬底上形成第二栅介质部分。 第二栅介质部分包括第一高电容率介电材料。 第二栅介质部分具有第二等效氧化硅厚度。 第二等效氧化硅厚度不同于第一等效氧化硅厚度。

公开(公告)号：US07293340B1

公开(公告)日：2007-11-13

申请号：US11724271

申请日：2007-03-15

申请人： Hsiang-Yuan Tsao ,  Chun-Chieh Lin

发明人： Hsiang-Yuan Tsao ,  Chun-Chieh Lin

IPC分类号： B23P15/00 ,  B23C1/12

CPC分类号： B23Q1/5406 ,  B23Q2210/004 ,  B23Q2220/006 ,  Y10T29/49826 ,  Y10T29/49904 ,  Y10T409/307672 ,  Y10T409/308512

摘要： This invention discloses a direct drive spindle assembly including a main fork formed by a base and a parallel pair of spaced fork arms and rotated about a first rotational axis. Moreover, the direct drive spindle assembly includes a first drive established by a hollow housing, a first motor stator and a first motor rotor, wherein the first motor rotor coupled with the base of the main fork drives the main fork to rotate about the first rotational axis. Furthermore, the direct drive spindle assembly includes a second drive contained in a room between the fork arms of the main fork and established by a second motor stator concentric with a second rotational axis, a second motor rotor and a rotor transmission ring, wherein the second rotational axis is perpendicular to the first rotational axis and the second motor stator is coupled with the fork arms of the main fork. In addition, the direct drive spindle assembly includes a spindle box having an orthogonal cross structure. A first arm of the rotor transmission ring is coupled with the second motor rotor and a second arm of the structure is connected to a spindle head. The feature of the present invention is that after the second drive is fit in the room between the above-mentioned paired fork arms of the main fork and then combined with the base of the main fork and firmly locked in the right position, the whole structure can achieve preferred precision.

摘要翻译： 本发明公开了一种直接驱动主轴组件，其包括由基座形成的主叉和平行的一对间隔的叉臂，并绕第一旋转轴线旋转。 此外，直接驱动主轴组件包括由中空壳体建立的第一驱动器，第一电动机定子和第一电动机转子，其中与主叉的基座联接的第一电动机转子驱动主叉绕第一旋转 轴。 此外，直接驱动主轴组件包括容纳在主叉的叉臂之间的房间中并由与第二旋转轴同心的第二电动机定子建立的第二驱动器，第二电动机转子和转子传动环，其中第二驱动主轴 旋转轴线垂直于第一旋转轴线，而第二电动机定子与主叉的叉臂连接。 此外，直接驱动主轴组件包括具有正交交叉结构的主轴箱。 转子传动环的第一臂与第二电动机转子耦合，并且该结构的第二臂连接到主轴头。 本发明的特征在于，在将第二驱动装配在主叉的上述成对叉臂之间的房间中，然后与主叉的基部结合并牢固地锁定在正确的位置时，整个结构 可以实现优先的精度。

公开(公告)号：US20070164369A1

公开(公告)日：2007-07-19

申请号：US11714416

申请日：2007-03-06

申请人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Chao-Hsiung Wang ,  Chun-Chieh Lin ,  Chenming Hu

发明人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Chao-Hsiung Wang ,  Chun-Chieh Lin ,  Chenming Hu

IPC分类号： H01L29/76

CPC分类号： H01L29/1054 ,  H01L21/02142 ,  H01L21/265 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/66636 ,  H01L29/7834

摘要： A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a portion of the semiconductor alloy layer overlying the source and drain regions, and forming a metal silicide region over the source and drain regions.

摘要翻译： 一种方法包括在半导体衬底上提供半导体合金层，在半导体合金层上形成栅极结构，在半导体衬底的栅极结构的两侧形成源区和漏极区，去除半导体合金层的至少一部分 覆盖源极和漏极区域，并且在源极和漏极区域上形成金属硅化物区域。

公开(公告)号：US07226832B2

公开(公告)日：2007-06-05

申请号：US11227264

申请日：2005-09-15

申请人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Ming Hu

发明人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Chen Ming Hu

IPC分类号： H01L21/8238

CPC分类号： H01L21/28167 ,  H01L21/26513 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/1054 ,  H01L29/155 ,  H01L29/7846

摘要： A CMOS integrated circuit includes a substrate having an NMOS region with a P-well and a PMOS region with an N-well. A shallow trench isolation (STI) region is formed between the NMOS and PMOS regions and a composite silicon layer comprising a strained SiGe layer is formed over said P well region and over said N well region. The composite silicon layer is disconnected at the STI region. Gate electrodes are then formed on the composite layer in the NMOS and PMOS regions.

摘要翻译： CMOS集成电路包括具有带有P阱的NMOS区域和具有N阱的PMOS区域的衬底。 在NMOS和PMOS区之间形成浅沟槽隔离（STI）区，并且在所述P阱区和所述N阱区之上形成包含应变SiGe层的复合硅层。 复合硅层在STI区域断开。 然后在NMOS和PMOS区域中的复合层上形成栅电极。

公开(公告)号：US07112483B2

公开(公告)日：2006-09-26

申请号：US10831021

申请日：2004-04-23

申请人： Chun-Chieh Lin ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chuan-Yi Lin ,  Chenming Hu

发明人： Chun-Chieh Lin ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chuan-Yi Lin ,  Chenming Hu

IPC分类号： H01L21/8238 ,  H01L21/44

CPC分类号： H01L21/28052 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78648

摘要： Provided is a semiconductor device and a method for its fabrication. The device includes a semiconductor substrate, a first silicide in a first region of the substrate, and a second silicide in a second region of the substrate. The first silicide may differ from the second silicide. The first silicide and the second silicide may be an alloy silicide.

摘要翻译： 提供一种半导体器件及其制造方法。 该器件包括半导体衬底，衬底的第一区域中的第一硅化物和衬底的第二区域中的第二硅化物。 第一硅化物可能与第二硅化物不同。 第一硅化物和第二硅化物可以是合金硅化物。