公开(公告)号：US07420385B2

公开(公告)日：2008-09-02

申请号：US11294712

申请日：2005-12-05

Applicant: Ronald A. Hubscher ,  Jason L. Smith ,  Frank E Hamlin

Inventor： Ronald A. Hubscher ,  Jason L. Smith ,  Frank E Hamlin

IPC: G01R31/26

CPC classification number: G01R31/2886 ,  G01R31/01

Abstract: A pipeline tester is disclosed that is capable of testing systems-on-a-chip (SOCs) or Devices Under Test (DUTs) in pipeline fashion. The tester provides faster, more economical testing of such SOCs and DUTs, which are loaded sequentially into the tester. A plurality of underlying test stations are disposed in the tester. Above the test stations are disposed corresponding test fixtures which are configured to receive moveable test beds therein. The test beds are mechanically and electrically connected to the underlying test stations. Loaded within each test bed is an SOC or DUT on which one or more electrical or electronic tests are performed. Once the test has been completed, the test bed is moved to another test station, where another electrical or electronic test is performed.

Abstract translation: 公开了一种能够以管道方式测试片上系统（SOC）或被测设备（DUT）的流水线测试仪。 测试仪可以更快，更经济地测试这些SOC和DUT，这些测试器依次加载到测试仪中。 在测试仪中设置多个底层测试站。 在测试台上方设置相应的测试夹具，其被配置为在其中接收可移动测试床。 测试台机械和电气连接到底层测试站。 在每个测试床内装载的是SOC或DUT，进行一个或多个电气或电子测试。 一旦测试完成，测试台移动到另一个测试站，进行另一个电子或电子测试。

公开(公告)号：US07404109B2

公开(公告)日：2008-07-22

申请号：US10736438

申请日：2003-12-15

Applicant: Andrew S. Hildebrant ,  Domenico Chindamo

Inventor： Andrew S. Hildebrant ,  Domenico Chindamo

IPC: G11B20/20

CPC classification number: G01R31/318335

Abstract: Systems and methods for adaptively compressing test data are disclosed. One such method comprises the steps of examining a test data file that includes a first plurality of data units corresponding to a first plurality of DUT pins and a second plurality of data units corresponding to a second plurality of DUT pins, compressing the first plurality of data units using a first compression technique, and compressing the second plurality of data units using a second compression technique.

Abstract translation: 公开了用于自适应压缩测试数据的系统和方法。 一种这样的方法包括以下步骤：检查包括对应于第一多个DUT引脚的第一多个数据单元和对应于第二多个DUT引脚的第二多个数据单元的测试数据文件，压缩第一多个数据 使用第一压缩技术的单元，以及使用第二压缩技术来压缩第二多个数据单元。

公开(公告)号：US07403874B2

公开(公告)日：2008-07-22

申请号：US11345045

申请日：2006-01-31

Applicant: Bryan F. Carpenter

Inventor： Bryan F. Carpenter

IPC: G06F9/46 ,  G06F3/00 ,  G06F19/00 ,  G06F17/40

CPC classification number: G06F11/3672

Abstract: In one embodiment, a method of prioritizing formatting actions of a number of data formatters 1) instantiates a number of threads for execution by a processing system, the number of threads sharing thread processing resources, and the number of threads including at least two threads of dissimilar priority; 2) launches a number of data formatters on the number of threads, the number of data formatters including at least two data formatters that are respectively launched on ones of the at least two threads having dissimilar priorities; and 3) periodically requests allocation of the thread processing resources for a number of highest priority active threads, wherein an active thread is a thread executing a data formatter with formatting actions to perform. Other embodiments are also disclosed.

Abstract translation: 在一个实施例中，对多个数据格式化器的格式化动作进行优先排序的方法1）实例化一些线程以供处理系统执行，共享线程处理资源的线程数以及包括至少两个线程的线程数 不同优先; 2）在线程数上启动多个数据格式化器，数据格式化器的数量包括分别在具有不同优先级的至少两个线程之一上启动的至少两个数据格式器; 以及3）周期性地请求针对多个最高优先级的主动线程分配线程处理资源，其中活动线程是执行具有要执行的格式化动作的数据格式化程序的线程。 还公开了其他实施例。

公开(公告)号：US20080139014A1

公开(公告)日：2008-06-12

申请号：US11636244

申请日：2006-12-08

Applicant: Barry W. Eppler

Inventor： Barry W. Eppler

IPC: H01R12/22 ,  H05K3/36

CPC classification number: H01R13/2414 ,  G01R31/2891 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/2036 ,  H05K2203/1572 ,  H05K2203/162 ,  Y10T29/49126

Abstract: There are disclosed interconnect assemblies. In an embodiment, an interconnect assembly may include a rigid printed circuit assembly having a substrate, conductive contact pads disposed on the substrate, the conductive contact pads configured for selective engagement with the conductive contact bumps, bumped flex circuit assemblies having support plates and conductive contact bumps; and a hard stop assembly extending between from the substrate, wherein the hard stop assembly restricts non-uniform motion of the substrate toward the first and second support plates. Methods of forming interconnects are provided. In an embodiment, a method may include positioning hard stop assemblies extending from first and second support plates in contact with a rigid printed circuit assembly; and positioning first and second pluralities of conductive contact bumps in electrical contact with first and second pluralities of conductive contact pads, respectively. Other embodiments are also disclosed.

Abstract translation: 公开了互连组件。 在一个实施例中，互连组件可以包括具有衬底的刚性印刷电路组件，设置在衬底上的导电接触焊盘，被配置为与导电接触凸块选择性接合的导电接触焊盘，具有支撑板的凸起的柔性电路组件和导电接触 颠簸 以及从所述基板之间延伸的硬止动组件，其中所述硬停止组件限制所述基板朝向所述第一和第二支撑板的不均匀运动。 提供形成互连的方法。 在一个实施例中，方法可以包括定位从刚性印刷电路组件接触的第一和第二支撑板延伸的硬止动组件; 以及分别将第一和第二多个导电接触凸块定位成与第一和第二多个导电接触垫电接触。 还公开了其他实施例。

公开(公告)号：US07373360B2

公开(公告)日：2008-05-13

申请号：US10839891

申请日：2004-05-05

Applicant: Robert S. Kolman ,  Reid Hayhow

Inventor： Robert S. Kolman ,  Reid Hayhow

IPC: G06F7/00 ,  G06F17/00

CPC classification number: G01R31/318314 ,  Y10S707/99945 ,  Y10S707/99948

Abstract: In a method for assigning test numbers, current testflow context information is maintained during the execution of a testflow. If one or more test number factors have been specified for one or more levels of the current testflow context, the test number factors are used to determine a base number for a current test number range. Otherwise, the base number is set to a default base number. Upon execution of a subtest in the testflow, a result of the subtest is assigned a next test number in the current test number range. The following items are then associated in a test number database: 1) an identifier of the subtest, 2) the current testflow context information, 3) the test number, and 4) the base number. When stored in the database, the base number serves as a specification number for its corresponding test number. Also disclosed are other methods and apparatus that use contextual test number factors to assign test numbers.

Abstract translation: 在分配测试号码的方法中，在执行测试流程期间维护当前测试流上下文信息。 如果为当前测试流程上下文的一个或多个级别指定了一个或多个测试号码因子，则使用测试号码因子来确定当前测试号码范围的基数。 否则，基数设置为默认基数。 在测试流程中执行子测试后，将在当前测试数字范围内为子测试结果分配下一个测试号码。 然后将以下项目与测试号码数据库相关联：1）子测验的标识符，2）当前测试流程上下文信息，3）测试号码，4）基本号码。 存储在数据库中时，基数作为其相应测试编号的规格编号。 还公开了使用上下文测试号码因子分配测试号码的其他方法和装置。

公开(公告)号：US07340688B2

公开(公告)日：2008-03-04

申请号：US10972820

申请日：2004-10-25

Applicant: Jacob A. Sanderson ,  Takashi Tsuboi ,  Min Sun

Inventor： Jacob A. Sanderson ,  Takashi Tsuboi ,  Min Sun

IPC: G06F3/048

CPC classification number: G06F3/0485

Abstract: A dataset is divided into overlapping logical pages, each associated with a different page index. A graphical display window is then filled with data corresponding to a current page offset which is mapped into a subset of data in a logical page corresponding to a current page index. Events associated with user operation of navigation controls are intercepted, and upon determining that an event causes updating of the current page offset to a defined position within the currently indexed page, the current page index and offset are transparently mapped to a new page index and offset. The window may be associated with a scrollbar grip, and upon intercepting an event associated with operation of the grip, the position of the grip is scaled by multiplying it by a scaling factor. The current page index is then set to the index of a logical page that scales to the grip's position.

Abstract translation: 数据集分为重叠的逻辑页面，每个页面都与不同的页面索引相关联。 然后，图形显示窗口填充与当前页偏移量对应的数据，该当前页偏移被映射到与当前页索引对应的逻辑页中的数据子集中。 与导航控件的用户操作相关联的事件被拦截，并且在确定事件导致当前页偏移更新到当前索引页中的定义位置之前，当前页索引和偏移被透明地映射到新的页索引和偏移 。 窗口可以与滚动条手柄相关联，并且在拦截与手柄的操作相关联的事件时，通过将握把的位置乘以缩放因子来缩放手柄的位置。 然后将当前页面索引设置为缩放到抓地力位置的逻辑页面的索引。

公开(公告)号：US07274202B2

公开(公告)日：2007-09-25

申请号：US11246487

申请日：2005-10-07

Applicant: Robert S. Kolman

Inventor： Robert S. Kolman

IPC: G01R31/26

CPC classification number: G01R31/2893 ,  G01R31/2887

Abstract: A rotatable or translatable carousel configured to facilitate electrical or electronic testing of Devices Under Test (DUTs) in combination with an insertion handler and a test head is disclosed. The carousel is configured to be placed on a test head of a tester in a first position with a first Device under Test (DUT) (such as a system-on-a-chip (SOC) integrated circuit (IC)) loaded in a first test position of the carousel. A first electrical or electronic test is performed on the first DUT at the first position, after which the carousel is advanced to a second position and a second DUT is loaded in a second test position of the carousel. While the carousel is positioned at the second position, the first test is performed on the second DUT and a second electrical or electronic test is performed on the first DUT. In one embodiment, the process of testing DUTs, inserting DUTs and rotating or translating the carousel in respect of the test head is repeated until all test positions in the carousel have been filled and all desired electrical or electrical tests have been performed on the first DUT. At this point the process of removing fully-tested DUTs from the carousel is optimally undertaken.

Abstract translation: 公开了一种可旋转或可平移的转盘，其被配置为便于与插入处理器和测试头结合的被测器件（DUT）的电或电测试。 转盘被配置成被放置在第一位置的测试仪的测试头上，该测试头具有加载在第一位置的第一测试器件（DUT）（诸如片上系统（SOC）集成电路（IC）） 旋转木马的第一个测试位置。 在第一位置上对第一DUT执行第一电气或电子测试，之后转盘提前到第二位置，并且第二DUT被加载在转盘的第二测试位置。 当传送带位于第二位置时，第一测试在第二DUT上执行，并且在第一DUT上执行第二电或电测试。 在一个实施例中，重复测试DUT，插入DUT和相对于测试头旋转或平移转盘的过程，直到圆盘传送带中的所有测试位置已经被填充并且已对第一DUT执行了所有所需的电或电测试 。 在这一点上，从圆盘传送带去除完全被测试的DUT的过程是最佳的。

公开(公告)号：US07260493B2

公开(公告)日：2007-08-21

申请号：US11353662

申请日：2006-02-14

Applicant: Bernd Laquai ,  Joerg-Walter Mohr

Inventor： Bernd Laquai ,  Joerg-Walter Mohr

IPC: G06F19/00

CPC classification number: G01R31/31937 ,  G01R31/31725 ,  G01R31/3191

Abstract: There is provided a method that includes (a) sampling a data signal and a clock signal by applying strobes for obtaining a corresponding bit values each for the data signal and for the clock signal, each of the strobes having a different phase offset with respect to a tester clock signal, (b) deriving first comparison results for the bit values of the data signal by comparing the bit values of the data signal each with an expected data bit value of expected data, (c) deriving second comparison results for the bit values of the clock signal by comparing the bit values of the clock signal each with an expected clock bit value, (d) deriving for the strobes combined comparison results by applying logical operations each on pairs of corresponding first and second comparison results, and (e) deriving a test result based on the combined comparison results.

Abstract translation: 提供了一种方法，其包括（a）通过应用选通脉冲来获取数据信号和时钟信号，以获得每个数据信号和时钟信号的相应位值，每个选通相对于 测试器时钟信号，（b）通过将数据信号的比特值与期望数据的期望数据比特值进行比较，得出数据信号的比特值的第一比较结果，（c）得出比特的第二比较结果 通过将时钟信号的比特值与期望的时钟比特值进行比较，（d）通过在对对应的第一和第二比较结果对上应用逻辑运算来得到选通组合比较结果，并且（e ）根据组合的比较结果得出测试结果。

公开(公告)号：US07240259B2

公开(公告)日：2007-07-03

申请号：US11117968

申请日：2005-04-29

Applicant: Markus Rottacker ,  Joachim Moll

Inventor： Markus Rottacker ,  Joachim Moll

IPC: G01R31/28

CPC classification number: G01R31/31905

Abstract: A coupling unit that couples at least two pins of an ATE (Automated Test Equipment) to a pin of a device under test includes an ATE interface for receiving a plurality of first stimulus signals from selected ATE-pins and/or for sending a plurality of first response signals to the selected ATE-pins, a DUT interface for sending a second stimulus signal to the DUT-pin and/or for receiving a second response signal from the DUT-pin, and a multiplexer circuit for serializing data of the plurality of first stimulus signals into the second stimulus signal and/or a de-multiplexer circuit adapted for parallelizing data of the second response signal into the plurality of first response signals.

Abstract translation: 将ATE（自动测试设备）的至少两个引脚耦合到被测器件的引脚的耦合单元包括ATE接口，用于从所选择的ATE引脚接收多个第一激励信号和/或用于发送多个 对所选择的ATE引脚的第一响应信号，用于向DUT引脚发送第二激励信号和/或用于从DUT引脚接收第二响应信号的DUT接口以及用于串行化多个 第一激励信号进入第二刺激信号和/或解复用器电路，适于将第二响应信号的数据并行化成多个第一响应信号。

公开(公告)号：US08127186B2

公开(公告)日：2012-02-28

申请号：US12074015

申请日：2008-02-28

Applicant: Phillip D. Burlison ,  John K. Frediani

Inventor： Phillip D. Burlison ,  John K. Frediani

IPC: G01R31/3183 ,  G01R31/40

CPC classification number: G01R31/318566

Abstract: As a scan pattern is shifted out of a scan chain, the scan pattern is evaluated in real-time for the existence of a logic condition. A reference to a portion of the scan pattern that is currently being evaluated is maintained. Upon identifying the existence of the logic condition when the reference has a predetermined relationship to a stored value, the stored value is overwritten using the reference. The stored value is then used to estimate the position of a stuck-at defect in the scan chain.

Abstract translation: 当扫描图案从扫描链中移出时，扫描图案被实时评估是否存在逻辑条件。 维持对当前正在评估的扫描图案的一部分的引用。 当参考与存储值具有预定关系时，在识别出逻辑条件的存在时，使用该参考来重写所存储的值。 然后使用存储的值来估计扫描链中卡住缺陷的位置。