Abstract:
Disclosed is a method for testing touch screen displays during manufacture. A touch screen controller (TSC) is packaged, and the analog channels of the TSC are characterized, with resulting data being stored for later use. The TSC is programmed, and the touch screen display and TSC are packaged together. The touch screen display is tested using firmware in the TSC, enabling calculation of the inherent capacitances between force and sense lines of the touch screen display when connected to the TSC during operation. The testing involves, for each force and sense line pair, measuring an output signal generated by a receive channel of the TSC coupled to the sense line of that pair. Based upon the data gathered during characterization, and the signals measured during testing, the capacity of the touch screen display is then calculated.
Abstract:
An occurrence of a first set of n periods of a frequency-shift-keying (FSK)-modulated waveform is counted, where n is an integer number. The n periods of the FSK-modulated waveform in the first set have a first time duration. An occurrence of a second set of n periods of the waveform is counted. The n periods of the waveform in the second set have a second time duration. The first time duration is determined based on the counting of the first set of n periods. The second time duration is determined based on the counting of the second set of n periods. A difference between the first time duration and the second time duration is compared to a threshold. Changes in frequency of the waveform are detected based on the comparing of the difference between the first time duration and the second time duration to the threshold.
Abstract:
An analog ping signal that is present at a secondary coil of a power receiving device operating within a wireless power transmission system is detected. The detection circuit includes a DC blocking circuit having an input directly connected to a terminal of the secondary coil. A comparator circuit has an input coupled to an output of the DC blocking circuit. A timer circuit is reset by a signal output by the comparator circuit to assert a ping detect signal in response to a resetting of the timer circuit. The ping detect signal is deasserted in response to a timing out of the timer circuit.
Abstract:
The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected channels that form a plurality of squares, lines of each of the squares over the perimeter of a respective source or drain region of the plurality of waffle gate parallel transistors. The shared gate includes squares of a first size and shape and a second size and shape. The squares having the first size and shape are each over a respective source region and the squares having the second size and shape are each over a respective drain region. Each of the squares having a first size and shape share at least one side with one of the squares having the second size and shape.
Abstract:
A current mirror circuit includes an input current leg and an output current leg. The input current leg includes: a first bipolar junction transistor (BJT) having a collector terminal configured to receive an input current sourced at a current node and a first metal oxide semiconductor field effect transistor (MOSFET) having a gate terminal coupled to the current node and a source terminal coupled to a base terminal of the first BJT. The output current leg includes: a second BJT having a collector terminal configured to supply an output current and a second MOSFET having a gate terminal coupled to the current node and a source terminal coupled to a base terminal of the second BJT.
Abstract:
A device for generating a reference voltage includes a first non-volatile memory cell provided with a control-gate transistor and a reading transistor. The control-gate transistor includes a gate terminal, a body, a first conduction terminal and a second conduction terminal. The first conduction terminal and the second conduction terminal are connected together to form a control-gate terminal. The reading transistor includes a gate terminal that is connected to the gate terminal of the control-gate transistor to form a floating-gate terminal, a body, a third conduction terminal and a fourth conduction terminal. The device also includes a second, equivalent, memory cell. The source terminal of the first non-volatile memory cell and the source terminal of the second equivalent memory cell are connected together.
Abstract:
A method of charging a battery of a device using a battery of a computer powered by the battery, in which the procedure is implemented by a circuit independent of the computer's processors. The method includes supplying a power supply voltage, insufficient to charge a battery, to a computer port, as long as a device is detected as connected to the port, controlling the supply of a charging voltage to the port, while supplying charging voltage to the port, detecting an end of charging condition of a battery of the device, and controlling the cutting off of the charging voltage to the port if the end of charging condition is detected, where this condition is determined according to the intensity of a charging current and according to a quantity of electrical charge supplied to the port and/or of a charging period.
Abstract:
The present disclosure is directed to a voltage-to-current sensing circuit having a bias terminal configured to receive a reference voltage, an offset terminal configured to receive an offset current, and an operational amplifier configured to output a low voltage signal. The device includes a first amplifier having first and second high voltage inputs configured to receive a first voltage difference across a sense component on a high voltage line and to generate a first current, a second amplifier having first and second low voltage inputs configured to receive a second voltage difference between the bias terminal and the offset terminal and to generate a second current, a summing circuit configured to provide an intermediate voltage corresponding to a sum of the first and the second currents, and a low-voltage transistor coupled to an output of the amplifier and controlled by the intermediate voltage to generate the output current.
Abstract:
A control apparatus for LED diodes includes a dimmer TRIAC electrically connected in series between a power supply and a LED lighting converter. The converter comprises a transformer, with a primary winding coupled with an input terminal and a secondary winding coupled with an output terminal, and a switch coupled to the primary winding to regulate the current through the primary winding and regulate the output voltage. The apparatus comprises a control device adapted to control said switch determining the on period and the off period of the switch to maintain constant the output current to supply said LED diodes. The apparatus comprises a detector connected to the secondary winding of the transformer and adapted to detect the conduction angle of the TRIAC; the control device is adapted to regulate the output current to supply said LED diodes in response to the TRIAC conduction angle detected by the detector.
Abstract:
The present disclosure is directed to a voltage-to-current sensing circuit having a bias terminal configured to receive a reference voltage, an offset terminal configured to receive an offset current, and an operational amplifier configured to output a low voltage signal. The device includes a first amplifier having first and second high voltage inputs configured to receive a first voltage difference across a sense component on a high voltage line and to generate a first current, a second amplifier having first and second low voltage inputs configured to receive a second voltage difference between the bias terminal and the offset terminal and to generate a second current, a summing circuit configured to provide an intermediate voltage corresponding to a sum of the first and the second currents, and a low-voltage transistor coupled to an output of the amplifier and controlled by the intermediate voltage to generate the output current.