公开(公告)号：US07751239B2

公开(公告)日：2010-07-06

申请号：US11907082

申请日：2007-10-09

申请人： Kyoung Lae Cho ,  Jun Jin Kong ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Sung-Jae Byun ,  Dong Ku Kang

发明人： Kyoung Lae Cho ,  Jun Jin Kong ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Sung-Jae Byun ,  Dong Ku Kang

IPC分类号： G11C11/34

CPC分类号： G11C11/5642

摘要： Provided are a device for reading memory data and a method using the same. The device for reading memory data comprises a memory cell which stores multi-bit information, an information detection unit which detects as much bit information as a predetermined number of bits from among multi-bit information, a source-line voltage control unit which controls a source-line voltage of the memory cell based on the detected bit information from the information detection unit, and a remaining bit information read unit which reads remaining bit information stored in the memory cell by using the controlled source-line voltage.

摘要翻译： 提供了用于读取存储器数据的装置和使用其的方法。 用于读取存储器数据的装置包括存储多位信息的存储单元，从多位信息中检测多达位数信息作为预定位数的信息检测单元，控制位 基于来自信息检测单元的检测到的比特信息的存储器单元的源极线电压以及通过使用受控的源极线电压读取存储在存储器单元中的剩余位信息的剩余位信息读取单元。

公开(公告)号：US07746702B2

公开(公告)日：2010-06-29

申请号：US12213657

申请日：2008-06-23

申请人： Kyoung Lae Cho ,  Seung-Hwan Song ,  Yoon Dong Park ,  Jun Jin Kong ,  Jae-Hong Kim

发明人： Kyoung Lae Cho ,  Seung-Hwan Song ,  Yoon Dong Park ,  Jun Jin Kong ,  Jae-Hong Kim

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G11C16/32 ,  G11C16/349 ,  G11C29/00 ,  G11C2211/5634

摘要： Memory devices and/or methods that may estimate characteristics of multi-bit cell are provided. A memory device may include: a multi-bit cell array; a monitoring unit to extract a threshold voltage change over time value for reference threshold voltage states selected from a plurality of threshold voltage states corresponding to data stored in the multi-bit cell array; and an estimation unit to estimate a threshold voltage change over time values for the plurality of threshold voltage states based on the extracted threshold voltage change. Through this, it is possible to monitor a change over time of threshold voltages of a memory cell.

公开(公告)号：US20100088574A1

公开(公告)日：2010-04-08

申请号：US12573246

申请日：2009-10-05

申请人： Yong June KIM ,  Jun Jin KONG ,  Jae Hong KIM ,  Kyoung Lae CHO

发明人： Yong June KIM ,  Jun Jin KONG ,  Jae Hong KIM ,  Kyoung Lae CHO

IPC分类号： G06F11/10 ,  G06F12/00

CPC分类号： G06F11/1008

摘要： A data storage device receives write data and includes a controller configured to determine a characteristic of the write data and provide a first control signal in response to the determined characteristic, a randomizer configured to selectively randomize or not randomize the write data in response to the first control signal to thereby generate randomized write data, and a data storage unit configured to store the randomized write data.

摘要翻译： 数据存储装置接收写入数据，并且包括控制器，被配置为确定写入数据的特性并响应于所确定的特性提供第一控制信号;随机化器，被配置为响应于第一个数据，选择性地随机化或不使写入数据随机化 从而生成随机写入数据，以及数据存储单元，被配置为存储随机写入数据。

公开(公告)号：US20100073462A1

公开(公告)日：2010-03-25

申请号：US12585745

申请日：2009-09-23

申请人： Seung-hoon Lee ,  Eric R. Fossum ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun

发明人： Seung-hoon Lee ,  Eric R. Fossum ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun

IPC分类号： H04N13/02

CPC分类号： H04N5/3696 ,  H04N5/347 ,  H04N13/25

摘要： A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal.

摘要翻译： 三维（3D）图像传感器包括多个彩色像素和多个距离测量像素。 在多个彩色像素和多个距离测量像素排列成阵列的情况下，并且从多个距离测量像素之中设置一组距离测量像素，使得组中的每个距离测量像素的角部 距离测量像素的距离测量像素组中的相邻距离测量像素的角部相邻。 距离测量像素组能够共同输出一个距离测量信号。

公开(公告)号：US20100027342A1

公开(公告)日：2010-02-04

申请号：US12461060

申请日：2009-07-30

申请人： Heeseok Eun ,  Jae Hong Kim ,  Kyoung Lae Cho

发明人： Heeseok Eun ,  Jae Hong Kim ,  Kyoung Lae Cho

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3427

摘要： A memory device and a memory data determination method are provided. The memory device may estimate a threshold voltage shift of a first memory cell based on data before the first memory cell is programmed and a target program threshold voltage of the first memory cell. The memory device may generate a metric of a threshold voltage shift of a second memory cell based on the estimated threshold voltage shift of the first memory cell. Also, the memory device may determine data stored in the second memory cell based on the metric.

摘要翻译： 提供存储器件和存储器数据确定方法。 存储器件可以基于第一存储器单元被编程之前的数据和第一存储器单元的目标程序阈值电压来估计第一存储器单元的阈值电压偏移。 存储器件可以基于第一存储器单元的估计的阈值电压偏移来产生第二存储器单元的阈值电压偏移的度量。 此外，存储器设备可以基于度量来确定存储在第二存储器单元中的数据。

公开(公告)号：US20100027335A1

公开(公告)日：2010-02-04

申请号：US12379273

申请日：2009-02-18

申请人： Yong June Kim ,  Jae Hong Kim ,  Kyoung Lae Cho ,  Jun Jin Kong

发明人： Yong June Kim ,  Jae Hong Kim ,  Kyoung Lae Cho ,  Jun Jin Kong

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/349 ,  G11C11/5628 ,  G11C2211/5644

摘要： The memory device selects any one of a first memory cell and a second memory cell based on a number of times that the first memory cell is erased, an elapsed time after the first memory cell is erased, a number of times that the second memory cell is erased, and an elapsed time after the second memory cell is erased, and program data in the selected memory cell. The memory device may improve distribution of threshold voltage of memory cells and endurance of the memory cells.

摘要翻译： 存储装置基于第一存储单元的擦除次数，第一存储单元被擦除后的经过时间，第二存储单元的次数，选择第一存储单元和第二存储单元中的任一个， 被擦除，并且第二存储单元被擦除之后的经过时间，以及所选存储单元中的程序数据。 存储器件可以改善存储器单元的阈值电压分布和存储单元的耐久性。

公开(公告)号：US20100002506A1

公开(公告)日：2010-01-07

申请号：US12318560

申请日：2008-12-31

申请人： Kyoung Lae Cho ,  Yoon Dong Park ,  Jun Jin Kong ,  Yong June Kim

发明人： Kyoung Lae Cho ,  Yoon Dong Park ,  Jun Jin Kong ,  Yong June Kim

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C29/00 ,  G11C2211/5621

摘要： Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a first data page in the plurality of multi-level cells and programs a second data page in a multi-level cell from among the plurality of multi-level cells in which the first data page is programmed; an error analysis unit that analyzes read error information corresponding to the first data page based on a read voltage level to determine whether to correct a read error based on the analyzed read error information; and a controller that adjusts the read voltage level of the first data page depending on the determination result. Through this, it is possible to reduce an error occurrence when reading and/or programming a data page.

摘要翻译： 提供的是存储器件和存储器编程方法。 存储器件可以包括：多级单元阵列，其包括多个多电平单元; 编程单元，其对所述多个多电平单元中的第一数据页进行编程，并从所述第一数据页被编程的所述多个多电平单元中编程多电平单元中的第二数据页; 误差分析单元，其基于读取电压电平分析与所述第一数据页相对应的读取错误信息，以基于所分析的读取错误信息来确定是否校正读取错误; 以及控制器，其根据确定结果调整第一数据页的读取电压电平。 通过这种方式，可以在读取和/或编程数据页时减少错误发生。

公开(公告)号：US20090285023A1

公开(公告)日：2009-11-19

申请号：US12453108

申请日：2009-04-29

申请人： Kyoung Lae Cho ,  Yong June Kim ,  Seung-Hwan Song ,  Jun Jin Kong

发明人： Kyoung Lae Cho ,  Yong June Kim ,  Seung-Hwan Song ,  Jun Jin Kong

IPC分类号： G11C16/02 ,  G11C7/00 ,  G11C16/06

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C2211/5621

摘要： Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.

摘要翻译： 提供的是存储器件和存储器编程方法。 存储器件可以包括包括多个多位单元的多位单元阵列，编程单元，被配置为对多个多位单元中的第一数据页进行编程，并编程多位单元中的第二数据页 具有编程的第一数据页的单元，被配置为将多位单元与编程的第一数据页划分为第一组和第二组的第一控制器，以及配置成将每个的第一数据页的目标阈值电压间隔 基于第一读取电压电平和第二数据页面包括在第一组中的多位单元，并且基于第二读取阈值电压电平来设置包括在第二组中的每个多位单元的目标阈值电压间隔，以及 第二个数据页面。

公开(公告)号：US20090282319A1

公开(公告)日：2009-11-12

申请号：US12428511

申请日：2009-04-23

申请人： Jong Seon No ,  Beom Kyu Shin ,  Seok Il Youn ,  Jae Dong Yang ,  Jun Jin Kong ,  Jae Hong Kim ,  Yong June Kim ,  Kyoung Lae Cho

发明人： Jong Seon No ,  Beom Kyu Shin ,  Seok Il Youn ,  Jae Dong Yang ,  Jun Jin Kong ,  Jae Hong Kim ,  Yong June Kim ,  Kyoung Lae Cho

IPC分类号： H03M13/15 ,  G06F11/10 ,  H03M13/45

CPC分类号： H03M13/2906 ,  H03M13/1102 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/1117 ,  H03M13/1194 ,  H03M13/136 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/296 ,  H03M13/3707 ,  H03M13/3738

摘要： A decoder includes multiple decoder stages and a controller. The decoder stages perform decoding operations with respect to a received signal using corresponding different decoding algorithms. The controller determines whether the decoding operation performed by one of the decoder stages with respect to the received signal is successful, and controls the decoding operation of each of the other decoder stages in response to a result of the determination.

摘要翻译： 解码器包括多个解码器级和控制器。 解码器级使用相应的不同解码算法对接收到的信号执行解码操作。 控制器确定解码器中的一个相对于接收信号执行的解码操作是否成功，并且响应于确定的结果来控制每个其他解码器级的解码操作。

公开(公告)号：US20090231914A1

公开(公告)日：2009-09-17

申请号：US12232150

申请日：2008-09-11

申请人： Donghun Yu ,  Kyoung Lae Cho ,  Dongku Kang ,  Dong Hyuk Chae ,  Jun Jin Kong

发明人： Donghun Yu ,  Kyoung Lae Cho ,  Dongku Kang ,  Dong Hyuk Chae ,  Jun Jin Kong

IPC分类号： G11C16/06 ,  G11C16/00

CPC分类号： G11C16/26 ,  G06F11/1072 ,  G11C11/5628 ,  G11C11/5642 ,  G11C29/00 ,  G11C2029/0411 ,  G11C2211/5621

摘要： Disclosed are a memory device and a memory data reading method. The memory device may include a multi-bit cell array, a threshold voltage detecting unit configured to detect first threshold voltage intervals including threshold voltages of multi-bit cells of the multi-bit cell array from among a plurality of threshold voltage intervals, a determination unit configured to determine data of a first bit layer based on the detected first threshold voltage intervals, and an error detection unit configured to detect an error bit of the data of the first bit layer. In this instance, the determination unit may determine data of a second bit layer using a second threshold voltage interval having a value of the first bit layer different from the detected error bit and being nearest to a threshold voltage of a multi-bit cell corresponding to the detected error bit.

摘要翻译： 公开了一种存储器件和存储器数据读取方法。 存储器件可以包括多位单元阵列，阈值电压检测单元，被配置为从多个阈值电压间隔中检测包括多位单元阵列的多位单元的阈值电压的第一阈值电压间隔， 单元，被配置为基于检测到的第一阈值电压间隔来确定第一位层的数据;以及错误检测单元，被配置为检测第一位层的数据的错误位。 在这种情况下，确定单元可以使用具有与检测到的错误位不同的第一位层的值的第二阈值电压间隔来确定第二位层的数据，并且最接近对应于多个位单元的阈值电压 检测到错误位。