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公开(公告)号：US10436820B2
公开(公告)日：2019-10-08
申请号：US14897799
申请日：2015-09-17
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Qingcheng Zuo , Chao Liang
Abstract: A signal switching device and a test system are disclosed. A printed wire which is connected with a test circuit can be selected flexibly according to actual situation, and a sufficient distance between adjacent tested printed wires/test printed wires which are used for transmitting a differential signal can be maintained, such that signal interference between the printed wires would not be easily generated. Signals can be effectively separated from each other, and thus the technical problem that signal interference would easily be generated between adjacent tested printed wires/test printed wires which are used for transmitting a differential signal can be solved.
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公开(公告)号：US10429681B1
公开(公告)日：2019-10-01
申请号：US16427284
申请日：2019-05-30
Inventor： Gang Wang , Lixuan Chen
IPC: H01L21/00 , G02F1/1333 , H01L27/12 , G02F1/1345 , G02F1/1362 , H01L29/423 , G09G3/36 , H01L29/417
Abstract: The invention provides a structure of GOA circuit, which is manufactured on both sides of the ultra-thin flexible substrate with holes, wherein the wires pass through the holes to connect the TFTs in the GOA circuit on the front side to the TFTs in the GOA circuit on the back side to reduce the area occupied by GOA circuit. As such, the circuit area utilization is improved so that the same size of substrate area can carry almost twice the circuit structure to reduce the border width of the non-active area to achieve borderless or ultra-narrow border display panel with high resolution.
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公开(公告)号：US10424736B2
公开(公告)日：2019-09-24
申请号：US15577012
申请日：2017-08-17
Inventor： Aiguo Tu , Chun-Hsiung Fang , Tsung-yuan Wu , Jinchuan Li , Liang Jiang , Feng Wei
Abstract: An aging test system and method are disclosed. An aging test system includes a vacuum chamber provided with an aging device for aging a display panel; a lighting mechanism electrically connected to the display panel for lighting up the display panel; at least one spectrometer for detecting a color coordinate and a brightness of the display panel; at least one camera for detecting a dark spot defect of sub-pixels of the display panel. Accordingly, the present invention can save the inspection time, increase the inspection efficiency and save the inspection device in order to reduce the inspection cost.
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公开(公告)号：US10424700B2
公开(公告)日：2019-09-24
申请号：US15529951
申请日：2017-05-17
Inventor： Yong Fan , Yu-chun Hsiao , Sheng-Jer Chang Chien
Abstract: The present disclosure relates to a LED lamp source and the manufacturing method and the backlight module thereof. The LED lamp source includes a substrate and a LED chip, fluorescent adhesive, and a white reflective layer being fixed on the substrate. The fluorescent adhesive encapsulates the LED chip on the substrate, and the white reflective layer is configured for reflecting light beams emitted from the fluorescent adhesive and being radiated on the white reflective layer. A positive projection of the fluorescent adhesive on the substrate is within the positive projection of the white reflective layer on the substrate.
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公开(公告)号：US10424621B2
公开(公告)日：2019-09-24
申请号：US15768803
申请日：2018-03-06
Inventor： Youyuan Kuang
Abstract: The invention provides a manufacturing method for white OLED device, comprising manufacturing a first OLED device and a corresponding second OLED device respectively on a first substrate and a second substrate, wherein the light emitted by the first OLED device and the light emitted by the second OLED device are mixed to form white light, and then the second OLED device is correspondingly stacked onto the first OLED device to obtain a white OLED device. The manufacturing method can greatly reduce the complicated process caused by layer-by-layer stacking of multi-layered films in the structure of known white OLED devices, without the need to address the complex issues caused by interlinking of multiple color devices and light color resonance, so as to greatly simplify the process.
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Patent Agency Ranking
86.发明授权公开(公告)号：US10423018B2
公开(公告)日：2019-09-24
申请号：US15552727
申请日：2017-06-13
Inventor： Sikun Hao
Abstract: A display panel includes a plurality of amplifying circuits arranged in a non-display area and a plurality of gate lines. An input terminal of the amplifying circuit is connected to an output terminal of one or more cascade circuit. An output terminal of the amplifying circuit is connected to a gate line. The amplifying circuit is configured to adjust an output signal from the connected cascade circuit to be a scanning signal and output the scanning signal to the gate line. A liquid crystal display using the display panel is also proposed. The present disclosure simplifies the gate driving circuit, thereby solving the problem of unstable signal transmitting among various stages in the gate driving circuit.
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公开(公告)号：US10416507B2
公开(公告)日：2019-09-17
申请号：US16134934
申请日：2018-09-18
Inventor： Xianwang Wei , Yang Liu
IPC: G02F1/1343 , G02F1/1333 , H01L27/12
Abstract: An array substrate includes a substrate and a gate electrode, a gate insulating layer, a channel layer, an insulating layer, and a passivation layer sequentially formed on the surface of the substrate. An oxide semiconductor layer that forms a channel layer and a plurality of first IPS electrodes that are spaced from the oxide semiconductor layer are provided on the gate insulating layer. The insulating layer covers the oxide semiconductor layer and the plurality of first IPS electrodes. The passivation layer covers the channel layer and is formed with trenches. The trenches are located on a side of each of the first IPS electrode and extending to the gate insulation layer. Second IPS electrodes are formed on the passivation layer and corresponding to the first IPS electrodes and are connected to the first IPS electrodes.
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公开(公告)号：US10416506B2
公开(公告)日：2019-09-17
申请号：US15547580
申请日：2017-06-15
Inventor： Xingwu Chen , Lixuan Chen
IPC: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036 , G02F1/1343 , G02F1/1333 , H01L27/12 , G02F1/1368 , G02F1/136
Abstract: The present application discloses an array substrate, including a substrate; a thin film transistor disposed on the substrate; a pixel electrode disposed on the substrate and is in contact with a drain electrode of the thin film transistor; a common electrode disposed above the pixel electrode and is electrically insulated from the pixel electrode, and the common electrode has a plurality of first through holes. The present application further discloses a method of fabricating the array substrate. The array substrate and the fabricating method of the present application can reduce the parasitic capacitance between the common electrode and the pixel electrode, and can accelerate the release of the aggregated ions. In addition, the present application, by forming a stereoscopic electrode structure, the lateral electric field can be effectively enhanced, so that the driving voltage can be reduced, the display transmittance can be improved, and the power consumption can be reduced.
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公开(公告)号：US10411132B2
公开(公告)日：2019-09-10
申请号：US15324702
申请日：2016-11-11
Inventor： Yuhao Zhai
IPC: H01L29/786 , H01L21/84 , H01L27/12 , H01L29/45 , H01L29/49 , H01L29/417 , H01L29/66
Abstract: A TFT is disclosed. An anti-damage layer is arranged between an active layer and a source of the TFT, and the anti-damage layer is arranged between the active layer and a drain of the TFT. According to the present disclosure, the TFT has a simple structure. Through arranging the anti-damage layer between the active layer and the source of the TFT and between the active layer and the drain of the TFT, the length of the channel can be effectively reduced, and the parasite capacitor between the source and the gate of the TFT and between the drain and the gate of the TFT can be reduced.
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公开(公告)号：US10409115B2
公开(公告)日：2019-09-10
申请号：US16055237
申请日：2018-08-06
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao
IPC: G02F1/1339 , G02F1/1368 , H01L29/786 , G02F1/01 , H01L21/02 , H01L21/04 , G02F1/1362
Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer. When a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current; and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that contact regions formed of the controllable resistance spacer layers are respectively connected with the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.
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