公开(公告)号：US20110059704A1

公开(公告)日：2011-03-10

申请号：US12854216

申请日：2010-08-11

申请人： Takayasu NORIMATSU ,  Taizo YAMAWAKI ,  Yukinori AKAMINE ,  Koji MAEDA

发明人： Takayasu NORIMATSU ,  Taizo YAMAWAKI ,  Yukinori AKAMINE ,  Koji MAEDA

IPC分类号： H04B1/04

CPC分类号： H04B1/0483 ,  H03C5/00 ,  H04B2001/0491

摘要： The transmitter synthesizes amplitude and phase components and calibrates a delay mismatch between amplitude and phase components with high accuracy at high speed. The transmitter has: a digital-to-analog converter (DAC) and a low-pass filter (LPF) in its amplitude-signal path; and a phase modulator operable to convert up a phase component into an RF component in its phase-signal path. In an operation of delay calibration, a test input signal is supplied to a delay-calibrating unit in the amplitude-signal path, and the delay-calibrating unit provides a test input signal to DAC. Then, LPF generates a test output signal. The delay-calibrating unit detects a delay of the test output signal relative to the test input signal, calibrates an amplitude signal delay in a range from the input of the delay-calibrating unit to the output of LPF, reduces the difference between amplitude and phase signal delays of the phase modulator in the phase-signal path.

摘要翻译： 发射机合成幅度和相位分量，并以高精度高速校准振幅和相位分量之间的延迟失配。 发射机具有：幅度信号路径中的数模转换器（DAC）和低通滤波器（LPF）; 以及相位调制器，其可操作以将相位分量转换成其相位信号路径中的RF分量。 在延迟校准的操作中，将测试输入信号提供给幅度信号路径中的延迟校准单元，并且延迟校准单元向DAC提供测试输入信号。 然后，LPF产生测试输出信号。 延迟校准单元检测测试输出信号相对于测试输入信号的延迟，校准从延迟校准单元的输入到LPF的输出的范围内的振幅信号延迟，减小振幅和相位之间的差异 相位调制器在相位信号路径中的信号延迟。

公开(公告)号：US07885626B2

公开(公告)日：2011-02-08

申请号：US12056576

申请日：2008-03-27

申请人： Satoshi Tanaka ,  Kazuo Watanabe ,  Masao Hotta ,  Toyohiko Hongo ,  Taizo Yamawaki ,  Masumi Kasahara ,  Kumiko Takikawa

发明人： Satoshi Tanaka ,  Kazuo Watanabe ,  Masao Hotta ,  Toyohiko Hongo ,  Taizo Yamawaki ,  Masumi Kasahara ,  Kumiko Takikawa

IPC分类号： H04B1/06 ,  H04B1/10

CPC分类号： H04B1/30 ,  H03D2200/0047 ,  H03K21/16

摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.

摘要翻译： 适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。 此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。 每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。 另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除 消除。

公开(公告)号：US07725124B2

公开(公告)日：2010-05-25

申请号：US11246253

申请日：2005-10-11

申请人： Taizo Yamawaki ,  Yoshiaki Harasawa

发明人： Taizo Yamawaki ,  Yoshiaki Harasawa

IPC分类号： H04B1/28 ,  H04M1/00 ,  H04B1/38

CPC分类号： H04B1/1607 ,  H04B1/38

摘要： An object of the present invention is to provide a transmitter-receiver RF-IC having a built-in regulator, which can reduce a minimum value of an input voltage of the regulator without increasing its area, the input voltage being supplied from a battery, the transmitter-receiver RF-IC being capable of normal operation with the input voltage, whereby the operating time of a mobile terminal can be improved as compared with the prior art.According to the present invention, in order to achieve the above object, an output end of a regulator built into a RF-IC is first led to the outside of the RF-IC. Then, the output end is led to an area in proximity to the circuit block by use of wiring on a mobile terminal substrate whose resistance is low, or by use of wiring on a module whose resistance is low, thereby shortening the wiring length inside the RF-IC.

摘要翻译： 本发明的目的是提供一种具有内置调节器的发射器 - 接收器RF-IC，其可以减小调节器的输入电压的最小值而不增加其面积，从电池供应的输入电压， 发射机 - 接收机RF-IC能够利用输入电压进行正常操作，由此与现有技术相比可以提高移动终端的操作时间。 根据本发明，为了实现上述目的，首先将内置于RF-IC中的调节器的输出端引导到RF-IC的外部。 然后，通过使用电阻较低的移动终端基板上的布线，或者通过使用电阻较低的模块上的布线，将输出端导向靠近电路块的区域，从而缩短电路内部的布线长度 RF-IC。

公开(公告)号：US07701376B2

公开(公告)日：2010-04-20

申请号：US12244971

申请日：2008-10-03

申请人： Takashi Oshima ,  Taizo Yamawaki

发明人： Takashi Oshima ,  Taizo Yamawaki

IPC分类号： H03M1/36

CPC分类号： H03M1/1004 ,  H03M1/002 ,  H03M1/005 ,  H03M1/1009 ,  H03M1/126 ,  H03M1/44

摘要： In a wireless chip receiving the multi-rate data according to the related art, power consumption and a circuit area of an analog-to-digital converter become large. In a digital calibration type analog-to-digital converter including both a reference analog-to-digital conversion unit and a main analog-to-digital conversion unit, when processing the high-sample rate wireless receive signal, both the reference analog-to-digital conversion unit and the main analog-to-digital conversion unit are operated to configure a general digital calibration type analog-to-digital converter, and when processing a low-sample rate wireless receive signal, analog-to-digital conversion is performed by using the reference analog-to-digital conversion unit and operations of the main analog-to-digital conversion unit or the like are stopped to remarkably reduce power consumption.

摘要翻译： 在接收根据现有技术的多速率数据的无线芯片中，功率消耗和模数转换器的电路面积变大。 在包括参考模数转换单元和主模数转换单元的数字校准类型模数转换器中，当处理高抽样率无线接收信号时，参考模拟到数字转换单元 操作数字转换单元和主模拟 - 数字转换单元来配置通用数字校准类型模数转换器，并且当处理低采样率无线接收信号时，执行模拟 - 数字转换 通过使用参考模数转换单元，并且停止主模数转换单元等的操作以显着地降低功耗。

公开(公告)号：US20100052743A1

公开(公告)日：2010-03-04

申请号：US12541358

申请日：2009-08-14

申请人： Hiroshi KAMIZUMA ,  Taizo YAMAWAKI ,  Yukinori AKAMINE ,  Koji MAEDA

发明人： Hiroshi KAMIZUMA ,  Taizo YAMAWAKI ,  Yukinori AKAMINE ,  Koji MAEDA

IPC分类号： H03L7/00 ,  H03K3/00

CPC分类号： G06F1/3296 ,  G06F1/12 ,  G06F13/4243 ,  H04W52/0274 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D70/00 ,  Y02D70/1224

摘要： The power consumption of a data sampling unit that selects a phase of a clock signal appropriate for sampling payload data is reduced at an input interface. A semiconductor integrated circuit includes an input interface and internal core circuits. The input interface includes a hysteresis circuit and a data sampling unit. The hysteresis circuit detects an input signal between first and second input thresholds as a sleep command. The data sampling unit selects an appropriate phase of a sampling clock signal in accordance with a synchronizing signal and samples payload data. When a sleep command is detected, a sleep signal is also supplied to the internal core circuits and the data sampling unit and they are controlled into a low-power consumption state.

摘要翻译： 在输入接口处减少选择适合于抽样有效载荷数据的时钟信号的相位的数据采样单元的功耗。 半导体集成电路包括输入接口和内部核心电路。 输入接口包括滞后电路和数据采样单元。 滞后电路将第一和第二输入阈值之间的输入信号作为睡眠命令检测。 数据采样单元根据同步信号选择采样时钟信号的适当相位，并采样有效载荷数据。 当检测到睡眠命令时，还向内部核心电路和数据采样单元提供睡眠信号，并将它们控制为低功耗状态。

公开(公告)号：US20070142080A1

公开(公告)日：2007-06-21

申请号：US11703166

申请日：2007-02-07

申请人： Satoshi Tanaka ,  Taizo Yamawaki ,  Kazuaki Hori ,  Kazuo Watanabe

发明人： Satoshi Tanaka ,  Taizo Yamawaki ,  Kazuaki Hori ,  Kazuo Watanabe

IPC分类号： H04B1/44 ,  H04M1/00

CPC分类号： H03D3/007 ,  H03C3/40 ,  H04B1/30

摘要： Disclosed is a direct conversion type transmitter or transceiver circuit suitable for a mobile communication device which corresponds to broad signal output level variable width to be required by W-CDMA, which does not necessitate any high-performance low noise VCO and RF filter, capable of reducing a number of components and the cost. In the input portion of an orthogonal modulator composed of a divider, mixers, and a common load, there are provided variable attenuators. If an input signal level of the orthogonal modulator within the transmitter circuit lowers, this variable attenuator circuit is operated so as to lower the bias of the orthogonal modulator to reduce the amount of occurrence of carrier leak, and to prevent the signal during low output level and carrier leak ratio from being deteriorated. The direct conversion transmitter circuit is capable of easily realizing output level variable width of 70 dB or higher and reducing a variable amount in the high frequency circuit in which it is difficult to secure the variable gain width.

公开(公告)号：US20060286939A1

公开(公告)日：2006-12-21

申请号：US11509699

申请日：2006-08-25

申请人： Taizo Yamawaki ,  Satoshi Tanaka

发明人： Taizo Yamawaki ,  Satoshi Tanaka

IPC分类号： H04B1/40 ,  H04B1/06

CPC分类号： H04B1/406

摘要： The present invention relates to miniaturization of a local signal generation circuit to supply signals to a frequency converter in communication terminals such as a transmitter, a receiver, a transmitter-receiver, and the like that use one or more frequency bands. The local signal generation circuit comprises first and second oscillators capable of changing output frequencies and a multiplication means for multiplying input signals and generates local signals. The multiplication means selectively generates a signal of frequency corresponding to a sum or a difference between an output signal from the first oscillator and an output signal from the second oscillator.

摘要翻译： 本发明涉及本地信号发生电路的小型化，以向诸如使用一个或多个频带的发射机，接收机，发射机 - 接收机等的通信终端中的频率转换器提供信号。 本地信号发生电路包括能够改变输出频率的第一和第二振荡器以及用于乘以输入信号并产生本地信号的乘法装置。 乘法装置选择性地产生对应于来自第一振荡器的输出信号和来自第二振荡器的输出信号之间的和或差的频率的信号。

公开(公告)号：US20060234656A1

公开(公告)日：2006-10-19

申请号：US11371108

申请日：2006-03-09

申请人： Hiroaki Matsui ,  Taizo Yamawaki ,  Yoshiaki Harasawa ,  Steve Williams

发明人： Hiroaki Matsui ,  Taizo Yamawaki ,  Yoshiaki Harasawa ,  Steve Williams

IPC分类号： H01Q11/12

CPC分类号： H03F3/211 ,  H03F3/45085 ,  H03F2200/78 ,  H03G3/3042

摘要： A communication semiconductor integrated circuit includes a phase control loop and an amplitude control loop. A gain of a variable gain amplifier when it is detected from an output of the comparator that the amplitudes of the reference signal and the feedback signal are equal to each other while a predetermined DC voltage is applied to an amplifier which amplifies an output of a transmission oscillation circuit and is controlled by the amplitude control loop to vary the gain of the variable gain amplifier on a feedback path is held in a register. Thereafter, the DC voltage is changed to another value to detect the gain of the variable gain amplifier, so that the gain of a variable gain amplifier on the forward path is decided on the basis of the detected gain and the gain held in the register.

摘要翻译： 通信半导体集成电路包括相位控制环路和幅度控制环路。 当从比较器的输出检测到可变增益放大器的增益时，参考信号和反馈信号的幅度彼此相等，同时将预定的DC电压施加到放大器，其放大传输的输出 振荡电路并由幅度控制环路控制，将可变增益放大器的增益在反馈路径上保持在寄存器中。 此后，将DC电压改变为另一个值以检测可变增益放大器的增益，从而基于检测到的增益和保持在寄存器中的增益来确定正向通路上的可变增益放大器的增益。

公开(公告)号：US07116950B2

公开(公告)日：2006-10-03

申请号：US10073029

申请日：2002-02-12

申请人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Astle Henshaw

发明人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Astle Henshaw

IPC分类号： H04B1/04

CPC分类号： H03D7/1433 ,  H03C3/40 ,  H03D7/145 ,  H03D7/1458 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0047

摘要： A transmitter is provided which includes a transmitting circuit that does not require a high-performance low noise VCO restricting cost reduction thereof and that can reduce the number of parts without requiring an RF filter. A direct conversion that does not require a transmission VCO is applied to the transmitting circuit. In order to achieve noise reduction in a receiving band, low-pass filters are provided a IQ input sections of a modulator that converts IQ signals into RF signals. In comparison with a conventional transmitter using offset PLL, an external VCO required in addition to an RF integrated circuit, a power amplifier, and a front end circuit is reduced. Even in current transistor performance, by using a filter having rapid waveform characteristics such as a SAW more inexpensive than the VCO, or the like, it is possible to provide a GSM/GSM 1800/GSM1900 triple band transmitter.

摘要翻译： 提供一种发送器，其包括不需要高性能低噪声VCO来限制其成本降低并且可以减少部件数量而不需要RF滤波器的发送电路。 将不需要传输VCO的直接转换应用于发送电路。 为了实现接收频带中的噪声降低，提供了将IQ信号转换成RF信号的调制器的IQ输入部分的低通滤波器。 与使用偏移PLL的常规发射机相比，减少了RF集成电路，功率放大器和前端电路之外需要的外部VCO。 即使在目前的晶体管性能中，通过使用具有比VCO更便宜的SAW等具有快速波形特性的滤波器等，也可以提供GSM / GSM 1800 / GSM1900三频发射机。

公开(公告)号：US07076231B2

公开(公告)日：2006-07-11

申请号：US10374106

申请日：2003-02-27

申请人： Taizo Yamawaki ,  Satoshi Tanaka ,  Yasuyuki Okuma

发明人： Taizo Yamawaki ,  Satoshi Tanaka ,  Yasuyuki Okuma

IPC分类号： H04B1/26

CPC分类号： H04B1/28

摘要： A receiver apparatus is provided with a receiver section including an amplifying stage for amplifying a high frequency signal received by an antenna, a frequency converting stage for converting a frequency of the output signal of the amplifying stage, a local oscillator for supplying a local oscillating signal to the frequency converting stage, and a signal processing section for supplying a control signal to the receiver section depending on signal intensity inputted to the receiver section, or to the signal processing section from the receiver section. The frequency converting section includes a plurality of parallel frequency converters, and an adder for adding output signals of the frequency converters. The signal processing section controls the number of the frequency converters to be operated.

摘要翻译： 接收机装置具有接收部分，该接收部分包括用于放大由天线接收的高频信号的放大级，用于转换放大级的输出信号的频率的频率转换级，用于提供本地振荡信号的本地振荡器 以及信号处理部分，用于根据输入到接收机部分的信号强度或者从接收机部分向信号处理部分向接收机部分提供控制信号。 频率转换部分包括多个并行变频器，以及用于加上变频器的输出信号的加法器。 信号处理部分控​​制要操作的变频器的数量。