公开(公告)号：US20070232020A1

公开(公告)日：2007-10-04

申请号：US11760836

申请日：2007-06-11

申请人： Wilfried Haensch ,  Edward Nowak

发明人： Wilfried Haensch ,  Edward Nowak

IPC分类号： H01L21/311

CPC分类号： H01L27/1203 ,  H01L27/1207 ,  H01L29/045

摘要： A semiconductor structure is provided that includes a hybrid orientated substrate having at least two coplanar surfaces of different surface crystal orientations, wherein one of the coplanar surfaces has bulk-like semiconductor properties and the other coplanar surface has semiconductor-on-insulator (SOI) properties. In accordance with the present invention, the substrate includes a new well design that provides a large capacitance from a retrograde well region of the second conductivity type to the substrate thereby providing noise decoupling with a low number of well contacts. The present invention also provides a method of fabricating such a semiconductor structure.

摘要翻译： 提供一种半导体结构，其包括具有不同表面晶取向的至少两个共面表面的混合取向基板，其中共面中的一个具有块状半导体特性，而另一共面具有绝缘体上半导体（SOI）性质 。 根据本发明，衬底包括新的阱设计，其从第二导电类型的逆向阱区域向衬底提供大的电容，由此提供具有少量阱接触的噪声解耦。 本发明还提供一种制造这种半导体结构的方法。

公开(公告)号：US20070108536A1

公开(公告)日：2007-05-17

申请号：US11164215

申请日：2005-11-15

申请人： MeiKei Ieong ,  Thomas Ludwig ,  Edward Nowak ,  Qiqing Ouyang

发明人： MeiKei Ieong ,  Thomas Ludwig ,  Edward Nowak ,  Qiqing Ouyang

IPC分类号： H01L21/8244

CPC分类号： H01L27/1211 ,  H01L21/845 ,  H01L29/66818 ,  H01L29/785

摘要： A method of forming a semiconductor structure including a plurality of finFFET devices in which crossing masks are employed in providing a rectangular patterns to define relatively thin Fins along with a chemical oxide removal (COR) process is provided. The present method further includes a step of merging adjacent Fins by the use of a selective silicon-containing material. The present invention also relates to the resultant semiconductor structure that is formed utilizing the method of the present invention.

摘要翻译： 提供了一种形成包括多个finFFET器件的半导体结构的方法，其中使用交叉掩模提供矩形图案以限定相对薄的金属丝以及化学氧化物去除（COR）工艺。 本方法还包括通过使用选择性含硅材料来合并相邻的金属丝的步骤。 本发明还涉及利用本发明的方法形成的所得半导体结构。

公开(公告)号：US20060249799A1

公开(公告)日：2006-11-09

申请号：US11481120

申请日：2006-07-05

申请人： Wagdi Abadeer ,  Jeffrey Brown ,  David Fried ,  Robert Gauther ,  Edward Nowak ,  Jed Rankio ,  William Tonti

发明人： Wagdi Abadeer ,  Jeffrey Brown ,  David Fried ,  Robert Gauther ,  Edward Nowak ,  Jed Rankio ,  William Tonti

IPC分类号： H01L29/76

CPC分类号： H01L29/786 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/4908 ,  H01L29/78615

摘要： An integrated circuit chip and a semiconductor structure. The integrated circuit chip includes: a thick-body device containing a semiconductor mesa and a doped body contact; and a field effect transistor on a first sidewall of a semiconductor mesa, wherein the doped body contact is on a second sidewall of the semiconductor mesa, and wherein the semiconductor mesa is disposed between the field effect transistor and the doped body contact. The semiconductor structure includes: a buried oxide layer on a semiconductor wafer; a thin fin structure on the buried oxide layer, wherein the thin fin structure includes a first hard mask on a semiconductor fin, wherein the semiconductor fin is disposed between the first hard mask and a surface of the buried oxide layer; and a thick mesa structure on the buried oxide layer, and wherein the thick mesa structure includes a semiconductor mesa.

公开(公告)号：US20060244077A1

公开(公告)日：2006-11-02

申请号：US10908095

申请日：2005-04-27

申请人： Edward Nowak

发明人： Edward Nowak

IPC分类号： H01L29/76

CPC分类号： H01L29/7391 ,  H01L29/785 ,  H01L29/7856 ,  H01L29/78624

摘要： A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical contact with the semiconductor source block, wherein the source contact region comprises a first electrically conducting material, and wherein the semiconductor source block physically isolates the source contact region from the semiconductor channel region, and (d) a drain contact region in direct physical contact with the semiconductor channel region, wherein the semiconductor channel region is disposed between the semiconductor source block and the drain contact region, and wherein the drain contact region comprises a second electrically conducting material; and (e) a gate stack in direct physical contact with the semiconductor channel region.

摘要翻译： 半导体结构及其形成方法。 该结构包括（a）半导体沟道区，（b）与半导体沟道区直接物理接触的半导体源块; （c）与半导体源极块直接物理接触的源极接触区域，其中源极接触区域包括第一导电材料，并且其中半导体源极块将源极接触区域与半导体沟道区域物理隔离，并且（d ）与所述半导体沟道区域直接物理接触的漏极接触区域，其中所述半导体沟道区域设置在所述半导体源极块和所述漏极接触区域之间，并且其中所述漏极接触区域包括第二导电材料; 和（e）与半导体沟道区直接物理接触的栅叠层。

公开(公告)号：US20050163824A1

公开(公告)日：2005-07-28

申请号：US10514514

申请日：2003-05-12

申请人： Victoria Ayers ,  Jason Teckoe ,  Edward Nowak

发明人： Victoria Ayers ,  Jason Teckoe ,  Edward Nowak

IPC分类号： A61K9/48 ,  C08J5/18 ,  C08K5/00 ,  C08K5/092 ,  C08L1/10 ,  C08L1/26 ,  C08L1/28 ,  A61K9/70 ,  A61K31/716

CPC分类号： C08J5/18 ,  A61K9/4816 ,  C08J2301/28 ,  C08K5/092 ,  C08L1/26 ,  C08L1/28 ,  C08L1/284

摘要： A hydroxypropyl methyl cellulose film comprises hydroxypropyl methyl cellulose plasticised with a plasticiser comprising an organic acid or a salt of an organic acid, preferably lactic acid, or an alcohol or salt of an alcohol. The film is safe for human consumption and finds use as a wall material of an ingestible delivery capsule, e.g. containing a dose of a pharmaceutical preparation.

摘要翻译： 羟丙基甲基纤维素膜包括用包含有机酸或有机酸盐，优选乳酸或酒精或醇的增塑剂增塑的羟丙基甲基纤维素。 该片对于人类消费是安全的，并且被用作可摄取递送胶囊的壁材料，例如， 含有一定剂量的药物制剂。

公开(公告)号：US20050104139A1

公开(公告)日：2005-05-19

申请号：US11005659

申请日：2004-12-07

申请人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Edward Nowak

发明人： Toshiharu Furukawa ,  Mark Hakey ,  Steven Holmes ,  David Horak ,  Edward Nowak

IPC分类号： H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L29/10 ,  H01L29/41 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/76

CPC分类号： H01L29/6659 ,  H01L21/26586 ,  H01L21/2807 ,  H01L21/28114 ,  H01L21/28123 ,  H01L29/1045 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/4991 ,  H01L29/7833

摘要： An FET has a T-shaped gate. The FET has a halo diffusion self-aligned to the bottom portion of the T and an extension diffusion self aligned to the top portion. The halo is thereby separated from the extension implant, and this provides significant advantages. The top and bottom portions of the T-shaped gate can be formed of layers of two different materials, such as germanium and silicon. The two layers are patterned together. Then exposed edges of the bottom layer are selectively chemically reacted and the reaction products are etched away to provide the notch. In another embodiment, the gate is formed of a single gate conductor. A metal is conformally deposited along sidewalls, recess etched to expose a top portion of the sidewalls, and heated to form silicide along bottom portions. The silicide is etched to provide the notch.

摘要翻译： FET具有T形门。 FET具有与T的底部自对准的晕圈扩散，并且与顶部自对准的延伸扩散。 因此，光环与延伸植入物分离，这提供了显着的优点。 T形门的顶部和底部可以由两种不同材料的层形成，例如锗和硅。 两层被图案化在一起。 然后，底层的暴露边缘被选择性地化学反应，并且蚀刻掉反应产物以提供凹口。 在另一个实施例中，栅极由单个栅极导体形成。 金属沿着侧壁共形沉积，凹陷蚀刻以暴露侧壁的顶部，并且被加热以沿底部形成硅化物。 蚀刻硅化物以提供凹口。

公开(公告)号：USD723203S1

公开(公告)日：2015-02-24

申请号：US29406601

申请日：2011-11-16

申请人： Kenneth G. Seidl ,  Edward Nowak

设计人： Kenneth G. Seidl ,  Edward Nowak

公开(公告)号：US20080023775A1

公开(公告)日：2008-01-31

申请号：US11871289

申请日：2007-10-12

申请人： Edward Nowak

发明人： Edward Nowak

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7391 ,  H01L29/785 ,  H01L29/7856 ,  H01L29/78624

摘要： A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c ) a source contact region in direct physical contact with the semiconductor source block, wherein the source contact region comprises a first electrically conducting material, and wherein the semiconductor source block physically isolates the source contact region from the semiconductor channel region, and (d) a drain contact region in direct physical contact with the semiconductor channel region, wherein the semiconductor channel region is disposed between the semiconductor source block and the drain contact region, and wherein the drain contact region comprises a second electrically conducting material; and (e) a gate stack in direct physical contact with the semiconductor channel region.

摘要翻译： 半导体结构及其形成方法。 该结构包括（a）半导体沟道区，（b）与半导体沟道区直接物理接触的半导体源块; （c）与半导体源极块直接物理接触的源极接触区域，其中源极接触区域包括第一导电材料，并且其中半导体源极块将源极接触区域与半导体沟道区域物理隔离，并且（d ）与所述半导体沟道区域直接物理接触的漏极接触区域，其中所述半导体沟道区域设置在所述半导体源极块和所述漏极接触区域之间，并且其中所述漏极接触区域包括第二导电材料; 和（e）与半导体沟道区直接物理接触的栅叠层。

公开(公告)号：US20070278582A1

公开(公告)日：2007-12-06

申请号：US11841247

申请日：2007-08-20

申请人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

发明人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

IPC分类号： H01L29/739

CPC分类号： H01L29/42384 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/785 ,  H01L29/78645 ,  H01L29/78648

摘要： A voltage divider device includes a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region. An input voltage is coupled between the first and second gates, and an output voltage is taken from at least one of a source of the FET and a drain of the FET, wherein the output voltage represents a divided voltage with respect to the input voltage.

公开(公告)号：US20070252641A1

公开(公告)日：2007-11-01

申请号：US11380799

申请日：2006-04-28

申请人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

发明人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

IPC分类号： G05F1/10

CPC分类号： H01L29/42384 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/785 ,  H01L29/78645 ,  H01L29/78648

摘要： A voltage divider device includes a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region. An input voltage is coupled between the first and second gates, and an output voltage is taken from at least one of a source of the FET and a drain of the FET, wherein the output voltage represents a divided voltage with respect to the input voltage.

摘要翻译： 分压器件包括具有第一栅极的双栅极场效应晶体管（FET）和设置在主体区域的相对侧的第二栅极。 输入电压耦合在第一和第二栅极之间，并且输出电压取自FET的源极和FET的漏极中的至少一个，其中输出电压表示相对于输入电压的分压。