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    Techniques to control electronic mail delivery
    81.
    发明授权
    Techniques to control electronic mail delivery 有权
    控制电子邮件传送技术

    公开(公告)号：US08341226B2

    公开(公告)日：2012-12-25

    申请号：US11377331

    申请日：2006-03-15

    Applicant: Hong Li ,  Don Meyers

    Inventor： Hong Li ,  Don Meyers

    IPC: G06F15/16

    CPC classification number: G06Q10/107 ,  G06Q10/04

    Abstract: Techniques to manage electronic mail delivery may be described. An apparatus may include an internal message transfer agent to determine a message flow rate for an external message transfer agent based on a trust value associated with the external message transfer agent. Other embodiments are described and claimed.

    Abstract translation: 可以描述用于管理电子邮件传送的技术。 设备可以包括内部消息传送代理，用于基于与外部消息传送代理相关联的信任值来确定外部消息传送代理的消息流速。 描述和要求保护其他实施例。

    Computationally efficient modeling and simulation of large scale systems
    82.
    发明授权
    Computationally efficient modeling and simulation of large scale systems 有权
    大规模系统的计算效率建模与仿真

    公开(公告)号：US08336014B1

    公开(公告)日：2012-12-18

    申请号：US12852942

    申请日：2010-08-09

    Applicant: Jitesh Jain ,  Stephen F. Cauley ,  Hong Li ,  Cheng-Kok Koh ,  Venkataramanan Balakrishnan

    Inventor： Jitesh Jain ,  Stephen F. Cauley ,  Hong Li ,  Cheng-Kok Koh ,  Venkataramanan Balakrishnan

    IPC: G06F17/50

    CPC classification number: G06F17/5036

    Abstract: A method of simulating operation of a VLSI interconnect structure having capacitive and inductive coupling between nodes thereof. A matrix X and a matrix Y containing different combinations of passive circuit element values for the interconnect structure are obtained where the element values for each matrix include inductance L and inverse capacitance P. An adjacency matrix A associated with the interconnect structure is obtained. Numerical integration is used to solve first and second equations, each including as a factor the product of the inverse matrix X−1 and at least one other matrix, with first equation including X−1Y, X−1A, and X−1P, and the second equation including X−1A and X−1P.

    Abstract translation: 一种模拟在其节点之间具有电容和电感耦合的VLSI互连结构的操作的方法。 获得包含互连结构的无源电路元件值的不同组合的矩阵X和矩阵Y，其中每个矩阵的元素值包括电感L和反相电容P.获得与互连结构相关联的邻接矩阵A. 数值积分用于求解第一和第二方程，每一方程式包括作为逆矩阵X-1和至少一个其他矩阵的乘积的因子，第一方程包括X-1Y，X-1A和X-1P，以及 第二方程包括X-1A和X-1P。

    Method and system for forwarding and switching over protected paths
    84.
    发明授权
    Method and system for forwarding and switching over protected paths 有权
    用于转发和切换保护路径的方法和系统

    公开(公告)号：US08249073B2

    公开(公告)日：2012-08-21

    申请号：US12731823

    申请日：2010-03-25

    Applicant: Bijendra Singh ,  Vibha Chhatwal Sarin ,  Hong Li

    Inventor： Bijendra Singh ,  Vibha Chhatwal Sarin ,  Hong Li

    IPC: H04L12/28 ,  H04L12/56

    CPC classification number: H04L45/22 ,  H04L45/66 ,  H04L49/352

    Abstract: In one embodiment, a method for telecommunications includes steps of receiving a first packet through a first port, and determining whether the first packet arrived over a protected path. If the first packet arrived over a protected path, the method also includes the steps of hashing a source address of the first packet, adding a first entry into a forwarding table, and adding a second entry into the forwarding table. The protected path is coupled to at least the first port and a second port. The first entry includes the result of hashing the packet, and an identification of the first port. The second entry includes the result of hashing the packet, and an identification of the second port.

    Abstract translation: 在一个实施例中，一种用于电信的方法包括以下步骤：通过第一端口接收第一分组，以及确定第一分组是否通过受保护的路径到达。 如果第一分组通过受保护的路径到达，则该方法还包括以下步骤：对第一分组的源地址进行散列，将第一条目添加到转发表中，并将第二条目添加到转发表中。 受保护的路径至少耦合到第一端口和第二端口。 第一个条目包括散列数据包的结果和第一个端口的标识。 第二个条目包括散列数据包的结果和第二个端口的标识。

    Electronic apparatus
    85.
    发明授权
    Electronic apparatus 失效
    电子仪器

    公开(公告)号：US08243438B2

    公开(公告)日：2012-08-14

    申请号：US12127021

    申请日：2008-05-27

    Applicant: He-Li Wang ,  Hong Li ,  Ting Zhang ,  Ting-Ting Zhao

    Inventor： He-Li Wang ,  Hong Li ,  Ting Zhang ,  Ting-Ting Zhao

    IPC: H05K5/00 ,  H05K7/00

    CPC classification number: G06F1/1677 ,  G06F1/1616 ,  G06F1/3203 ,  Y10T292/1029

    Abstract: An electronic apparatus (10) includes a main body (30), a lid (20) pivotably connected with a side of the main body, a magnetic detecting unit (40) and a magnetic shield member (28). The detecting unit includes a magnetic body (42) mounted on one of the main body or the lid and a magnetic detector (44) mounted on the other one of the main body or the lid, respectively. The magnetic body has a facing side (421) to face the magnetic detector. The magnetic detector detects a position of the lid according to a magnetic field intensity of the magnetic body. The magnetic shield member is disposed at a distance from the facing side and adjacent to a second side (422) of the magnetic body, to prevent the magnetic field from extending in the direction of the second side of the magnetic body.

    Abstract translation: 电子设备（10）包括主体（30），与主体一侧可枢转地连接的盖（20），磁检测单元（40）和磁屏蔽构件（28）。 检测单元包括安装在主体或盖中的一个上的磁体（42）和分别安装在主体或盖的另一个上的磁检测器（44）。 磁体具有面对磁检测器的面对侧（421）。 磁检测器根据磁体的磁场强度检测盖的位置。 磁屏蔽构件配置在与磁体的第二侧（422）相邻的一侧的距离处，以防止磁场沿着磁体的第二侧的方向延伸。

    Fast and accurate estimation of gate output loading
    89.
    发明授权
    Fast and accurate estimation of gate output loading 有权
    快速准确地估计门输出负载

    公开(公告)号：US08145442B2

    公开(公告)日：2012-03-27

    申请号：US12363373

    申请日：2009-01-30

    Applicant: Hong Li ,  Li Ding ,  Alireza Kasnavi

    Inventor： Hong Li ,  Li Ding ,  Alireza Kasnavi

    IPC: G01R27/26 ,  G06F17/40

    CPC classification number: G06F17/5036

    Abstract: Embodiments of a computer system, a method, an integrated circuit and a computer-program product (i.e., software) for use with the computer system are described. These devices and techniques may be used to analyze an electrical characteristic of a logic gate electrically coupled to an output network in a stage. In particular, during the analysis, the effective capacitance of an output network coupled to a logic gate is approximated as a function of a total resistance of the output network, a total capacitance of the output network, and a geometric parameter of the output network. Using the effective capacitance and other parameters, such as a slew rate of an electrical signal applied to an input of the logic gate, an electrical characteristic of the logic gate, such as an input capacitance, is determined.

    Abstract translation: 描述了与计算机系统一起使用的计算机系统，方法，集成电路和计算机程序产品（即，软件）的实施例。 这些装置和技术可以用于分析在一个级中电耦合到输出网络的逻辑门的电特性。 特别地，在分析期间，耦合到逻辑门的输出网络的有效电容被近似为输出网络的总电阻，输出网络的总电容和输出网络的几何参数的函数。 使用诸如施加到逻辑门的输入端的电信号的转换速率等有效电容和其他参数，确定诸如输入电容的逻辑门的电特性。

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