公开(公告)号：US20080057633A1

公开(公告)日：2008-03-06

申请号：US11854302

申请日：2007-09-12

Applicant: Won-Kie Chang ,  Jin-Wook Lee ,  Won Song ,  Jeong-Sik Yoo ,  You-Keun Kim ,  Dong-Uk Choi

Inventor： Won-Kie Chang ,  Jin-Wook Lee ,  Won Song ,  Jeong-Sik Yoo ,  You-Keun Kim ,  Dong-Uk Choi

IPC: H01L21/84

CPC classification number: H01L27/12 ,  C23C16/4405 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1259

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Abstract translation: 本发明涉及一种制造薄膜晶体管阵列面板及其装置的方法，更具体地涉及一种含有原位氟发生室的装置。

公开(公告)号：US07273772B2

公开(公告)日：2007-09-25

申请号：US10867811

申请日：2004-06-16

Applicant: Won-Kie Chang ,  Jin-Wook Lee ,  Won Song ,  Jeong-Sik Yoo ,  You-Keun Kim ,  Dong-Uk Choi

Inventor： Won-Kie Chang ,  Jin-Wook Lee ,  Won Song ,  Jeong-Sik Yoo ,  You-Keun Kim ,  Dong-Uk Choi

IPC: H01L21/00

CPC classification number: H01L27/12 ,  C23C16/4405 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1259

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Abstract translation: 本发明涉及一种制造薄膜晶体管阵列面板及其装置的方法，更具体地涉及一种含有原位氟发生室的装置。

公开(公告)号：US20070025155A1

公开(公告)日：2007-02-01

申请号：US11354917

申请日：2006-02-16

Applicant: Sang-Won Hwang ,  Jin-Wook Lee

Inventor： Sang-Won Hwang ,  Jin-Wook Lee

IPC: G11C11/34 ,  G11C16/04

CPC classification number: G11C16/12 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/30 ,  G11C16/32

Abstract: A nonvolatile memory device includes a nonvolatile memory cell array including a plurality of nonvolatile memory cells connected to a plurality of word lines, a word line voltage generator configured to generate first and second sequences of voltage pulses. The device selectively supplies one of the first and second sequences of voltage pulses to a selected one of the word lines to program the nonvolatile memory cells connected to the selected word line. A slope of at least one voltage pulse of the first sequence of voltage pulses is greater than a slope of at least one voltage pulse of the second sequence of voltage pulses. In general, the first sequence is applied to word lines far away from the string select line (SSL), and the second sequence is applied to word lines that are close to the SSL.

Abstract translation: 非易失性存储器件包括非易失性存储单元阵列，包括连接到多个字线的多个非易失性存储器单元，字线电压发生器，被配置为产生第一和第二电压脉冲序列。 该装置选择性地将第一和第二电压脉冲序列中的一个提供给选定的字线之一，以编程连接到所选字线的非易失存储器单元。 电压脉冲的第一序列的至少一个电压脉冲的斜率大于第二电压脉冲序列的至少一个电压脉冲的斜率。 通常，第一个序列应用于远离字符串选择行（SSL）的字线，第二个序列应用于接近SSL的字线。

公开(公告)号：US20070020827A1

公开(公告)日：2007-01-25

申请号：US11490613

申请日：2006-07-21

Applicant: Gyoung-Ho Buh ,  Chang-Woo Ryoo ,  Yu-Gyun Shin ,  Tai-Su Park ,  Jin-Wook Lee

Inventor： Gyoung-Ho Buh ,  Chang-Woo Ryoo ,  Yu-Gyun Shin ,  Tai-Su Park ,  Jin-Wook Lee

IPC: H01L21/84 ,  H01L21/8234 ,  H01L21/336 ,  H01L21/00

CPC classification number: H01L29/7851 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/66803

Abstract: A method of forming a semiconductor device includes forming a three-dimensional structure formed of a semiconductor on a semiconductor substrate, and isotropically doping the three-dimensional structure by performing a plasma doping process using a first source gas and a second source gas. The first source gas includes n-type or p-type impurity elements, and the second source gas includes a dilution element regardless of the electrical characteristic of a doped region.

Abstract translation: 形成半导体器件的方法包括在半导体衬底上形成由半导体形成的三维结构，并且通过使用第一源气体和第二源气体进行等离子体掺杂工艺，对三维结构进行各向同性地掺杂。 第一源气体包括n型或p型杂质元素，第二源气体包括稀释元件，而与掺杂区域的电特性无关。

公开(公告)号：US20060279994A1

公开(公告)日：2006-12-14

申请号：US11264168

申请日：2005-11-02

Applicant: Min-Gun Park ,  Jin-Wook Lee ,  Sang-Won Hwang

Inventor： Min-Gun Park ,  Jin-Wook Lee ,  Sang-Won Hwang

IPC: G11C16/04

CPC classification number: G11C16/3404

Abstract: A flash memory device comprising a high voltage generator circuit that is adapted to supply a program voltage having a target voltage to a selected word line is provided. The flash memory device is adapted to terminate the program interval in accordance with when the program voltage has been restored to the target voltage after dropping below the target voltage. A method for operating the flash memory device is also provided.

公开(公告)号：US07099196B2

公开(公告)日：2006-08-29

申请号：US10712652

申请日：2003-11-12

Applicant: Kang-Deog Suh ,  Yeong-Tack Lee ,  Jin-Wook Lee

Inventor： Kang-Deog Suh ,  Yeong-Tack Lee ,  Jin-Wook Lee

IPC: G11C16/34

CPC classification number: G11C16/3454 ,  G11C16/0483 ,  G11C16/30

Abstract: Disclosed is a flash memory device and a program verification method thereof which can prevent a misjudgment as to whether flash memory cells are programmed or not. The flash memory device includes: a program verification voltage generator for variably generating program verification voltages used to verify whether the flash memory cells are programmed or not and a word line level selector for transferring the program verification voltages to word lines connected to control gates of the flash memory cells. The flash memory cells that are verified as uncertain as to whether the flash memory cells are programmed or not can be completely programmed since the program verification operation is carried out with program verification voltage levels that are changed according to the selective activations of the program verification control signals.

Abstract translation: 公开了一种闪速存储器件及其程序验证方法，其可以防止对闪存单元是否被编程的错误判断。 闪速存储装置包括：程序验证电压发生器，用于可变地产生用于验证闪存单元是否被编程的程序验证电压;以及字线电平选择器，用于将程序验证电压传送到连接到控制门的字线 闪存单元。 由于程序验证操作是根据程序验证控制的选择性激活而改变的程序验证电压进行的，所以被验证为对闪速存储器单元是否被编程的闪存单元是否可以被完全编程 信号。

公开(公告)号：US20060138478A1

公开(公告)日：2006-06-29

申请号：US11318827

申请日：2005-12-27

Applicant: Gyoung-Ho Buh ,  Yu-Gyun Shin ,  Chang-Woo Ryoo ,  Soo-Jin Hong ,  Jin-Wook Lee ,  Guk-Hyon Yon

Inventor： Gyoung-Ho Buh ,  Yu-Gyun Shin ,  Chang-Woo Ryoo ,  Soo-Jin Hong ,  Jin-Wook Lee ,  Guk-Hyon Yon

IPC: H01L29/76 ,  H01L29/788 ,  H01L29/94

CPC classification number: H01L21/26506 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/6659 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7881

Abstract: A semiconductor device includes a gate pattern disposed on a semiconductor substrate, a gate spacer disposed on both sidewalls of the gate pattern, and a fixed charge layer disposed in the semiconductor substrate below the gate spacer. Elements generating fixed charges are injected into the fixed charge layer. A layer in which carriers induced by the fixed charge layer are accumulated is disposed below the fixed charge layer. The elements are segregated to a substrate of the semiconductor substrate from the inside of the semiconductor substrate by heat.

Abstract translation: 半导体器件包括设置在半导体衬底上的栅极图案，设置在栅极图案的两个侧壁上的栅极隔离物和设置在栅极间隔物下方的半导体衬底中的固定电荷层。 产生固定电荷的元件被注入到固定电荷层中。 由固定电荷层感应的载流子被累积的层设置在固定电荷层的下方。 元件通过加热从半导体衬底的内部分离到半导体衬底的衬底。