公开(公告)号：US20100164406A1

公开(公告)日：2010-07-01

申请号：US12347138

申请日：2008-12-31

申请人： Michael A. Kost ,  Mauro L. Gaetano ,  John L. Melanson

发明人： Michael A. Kost ,  Mauro L. Gaetano ,  John L. Melanson

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  H05B33/0824 ,  Y02B20/346

摘要： In at least one embodiment, a controller allows triac-based dimmer to properly function and dim a load whose voltage is regulated by a switching power converter. In at least one embodiment, the switching power converter includes a switch to control voltage conversion of an input voltage to the switching power converter, wherein phase delays are introduced in the input voltage by a triac-based dimmer during a dimming period. In at least one embodiment, the controller is configured to control the switch of the switching power converter to establish an input resistance of the switching power converter during a dimming portion of the input voltage, wherein the input resistance allows the triac-based dimmer to phase modulate a supply voltage to the dimmer so that an output voltage of the dimmer has a substantially uninterrupted phase delay during each half-cycle of the supply voltage during the dimming period.

摘要翻译： 在至少一个实施例中，控制器允许基于triac的调光器正确地对其电压由开关功率转换器调节的负载进行功能和调光。 在至少一个实施例中，开关功率转换器包括用于控制输入电压到开关功率转换器的电压转换的开关，其中在调光期间通过基于三端双向可控硅的调光器在输入电压中引入相位延迟。 在至少一个实施例中，控制器被配置为控制开关功率转换器的开关，以在输入电压的调光部分期间建立开关功率转换器的输入电阻，其中输入电阻允许基于triac的调光器相位 调制到调光器的电源电压，使得调光器的输出电压在调光期间的电源电压的每个半周期期间具有基本上不间断的相位延迟。

公开(公告)号：US07746043B2

公开(公告)日：2010-06-29

申请号：US11967273

申请日：2007-12-31

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： G05F1/613 ,  G05F1/00

CPC分类号： H02M1/4225 ,  H03M3/476 ,  Y02B70/126 ,  Y02P80/112

摘要： A method and system monitor gate charge characteristics of one or more field effect transistors in a switching power converter to detect an end of an inductor flyback time interval. The switching power converter includes a switch coupled to an inductor to control current flow in the inductor. When the switch turns OFF, a collapsing magnetic field causes the inductor current to decrease and the inductor voltage to reverse polarity. When the magnetic field completely collapses, the inductor current goes to zero. At the end of the inductor flyback time interval, a voltage is induced across a Miller capacitance of the switch. The voltage can be detected as a transient change in the gate voltage of the switch. A switch gate sensor detects the gate voltage change associated with the end of the inductor flyback time interval and provides a signal indicating an end of the inductor flyback time interval.

摘要翻译： 一种方法和系统监视开关功率转换器中的一个或多个场效应晶体管的栅极电荷特性，以检测电感器反激时间间隔的结束。 开关功率转换器包括耦合到电感器以控制电感器中的电流的开关。 当开关断开时，塌陷磁场会使电感电流下降，电感电压反向极性。 当磁场完全崩溃时，电感电流变为零。 在电感器回扫时间间隔结束时，在开关的Miller电容上产生一个电压。 电压可以被检测为开关栅极电压的瞬时变化。 开关栅极传感器检测与电感器回扫时间间隔结束相关联的栅极电压变化，并提供指示电感器回扫时间间隔结束的信号。

公开(公告)号：US20100148677A1

公开(公告)日：2010-06-17

申请号：US12495185

申请日：2009-06-30

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： H05B37/02

CPC分类号： H05B33/0869

摘要： In at least one embodiment, brightness multiple LEDs is adjusted by modifying power to subgroups of the multiple LEDs during different times and detecting the brightness of the LEDs during the reductions of power. In at least one embodiment, once the brightness of the LEDs are determined, a controller determines if the brightness meet target brightness values, and, if not, the controller adjusts each LED with the goal meet the target brightness values. In at least one embodiment, a process of modifying power to the subgroups of multiple LEDs over time and adjusting the brightness of the LEDs is referred as “time division and light output sensing and adjusting. Thus, in at least one embodiment, a lighting system includes time division light output sensing and adjustment for different spectrum light emitting diodes (LEDs).

摘要翻译： 在至少一个实施例中，通过在不同时间期间将功率修改为多个LED的子组，并且在功率减小期间检测LED的亮度来调节亮度多个LED。 在至少一个实施例中，一旦确定了LED的亮度，则控制器确定亮度是否满足目标亮度值，并且如果不是，则控制器按照目标调整每个LED满足目标亮度值。 在至少一个实施例中，将随时间改变多个LED的子组的功率并调整LED的亮度的过程被称为“时分和光输出感测和调整。 因此，在至少一个实施例中，照明系统包括用于不同光谱发光二极管（LED）的时分光输出感测和调整。

公开(公告)号：US07676049B2

公开(公告)日：2010-03-09

申请号：US11425976

申请日：2006-06-22

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： H04R5/02 ,  H02B1/00

CPC分类号： H04R5/04 ,  H04R5/02

摘要： A reconfigurable audio-video surround sound receiver (AVR) and method provide flexible surround speaker placement and a low cost simulated surround sound implementation. A processing circuit within an audio device or audio/visual (AV) device such as an audio-video receiver (AVR) generates signals for surround and main channel speakers that provide selectable operation between speaker placement in ordinary surround sound installation, or in a simulated surround sound installation with speakers placed at one end of a listening room. An electronic network within the audio device selects between a normal surround sound mode, in which the surround information is provided to surround channel outputs and main channel information is supplied to main channel outputs, or a simulated surround mode in which the main and surround channel outputs receive surround channel information in a phase-controlled relationship, directing the surround information away from a direct path toward the listening area, to diffuse the surround information.

摘要翻译： 可重构的音频视频环绕声接收器（AVR）和方法提供灵活的环绕声扬声器放置和低成本的模拟环绕声实现。 在诸如音频 - 视频接收机（AVR）之类的音频设备或音频/视频（AV）设备内的处理电路产生用于环绕声道和主声道扬声器的信号，其提供在普通环绕声安装中的扬声器放置之间或在模拟 环绕声安装，扬声器放置在聆听室的一端。 音频装置内的电子网络在其中提供环绕声信息以环绕声道输出的正常环绕声模式和主频道信息被提供给主声道输出或其中主声道和环绕声道输出的模拟环绕模式 以相位控制的关系接收环绕声道信息，将环绕信息从直接路径引向聆听区域，以扩散环绕信息。

公开(公告)号：US20100020569A1

公开(公告)日：2010-01-28

申请号：US12340185

申请日：2008-12-19

申请人： John L. Melanson ,  Mauro L. Gaetano

发明人： John L. Melanson ,  Mauro L. Gaetano

IPC分类号： H02M3/335

CPC分类号： H01F38/02 ,  H01F3/10 ,  H01F3/14 ,  H01F38/08 ,  H01F2038/026 ,  H02M1/42 ,  H02M2001/0032 ,  Y02B70/12 ,  Y02B70/16

摘要： A resonant switching power converter having adaptive dead time control provides improved efficiency along with reduced EMI/audible noise and component stresses. A dead time between pulses generated by a switching circuit is adaptively set in conformity with a value of the input voltage to the resonant switching power converter and an indication of a magnitude of the current passing through inductive element of the resonant tank of the converter. The indication of the current magnitude may be the switching frequency of the converter, or a measure of line or load current levels. The dead time can be obtained from a look-up table or computed from the current magnitude and input voltage values.

摘要翻译： 具有自适应死区时间控制的谐振开关功率转换器提供改进的效率以及降低的EMI /可听噪声和分量应力。 由开关电路产生的脉冲之间的死区时间根据与谐振开关功率转换器的输入电压的值自适应地设定，以及通过转换器的谐振槽的电感元件的电流的大小的指示。 电流幅度的指示可能是转换器的开关频率，或线路或负载电流电平的测量。 死区时间可以从查找表中获得，也可以根据当前幅度和输入电压值计算。

公开(公告)号：US07647125B2

公开(公告)日：2010-01-12

申请号：US11864366

申请日：2007-09-28

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： G05B11/01 ,  G05B15/00 ,  H02J3/14 ,  G08C19/00

CPC分类号： G05B11/28 ,  G05B11/40 ,  Y10T307/461 ,  Y10T307/469 ,  Y10T307/484 ,  Y10T307/951

摘要： A time-based controller provides control for a controlled system including a plant having an integration response. The time-based controller includes a comparator that detects a polarity change in a comparison of a sensed signal from the plant and a reference signal while a control signal is in a first state, time calculation logic that, responsive to detection of the change in the comparison, determines a time at which to change a state of a control signal supplied to the plant, and a modulator that, at the determined time, changes the state of the control signal supplied to the plant from the first state to a second state.

摘要翻译： 基于时间的控制器为包括具有集成响应的设备的受控系统提供控制。 基于时间的控制器包括比较器，其在控制信号处于第一状态时检测来自工厂的感测信号与参考信号的比较中的极性变化，时间计算逻辑，响应于检测到的变化， 比较确定改变提供给工厂的控制信号的状态的时间，以及在所确定的时间将提供给设备的控制信号的状态从第一状态改变到第二状态的调制器。

公开(公告)号：US20090310941A1

公开(公告)日：2009-12-17

申请号：US12543509

申请日：2009-08-19

申请人： John L. Melanson ,  Mark P. Rygh

发明人： John L. Melanson ,  Mark P. Rygh

IPC分类号： H04N7/00

CPC分类号： H04N5/76 ,  G11B20/10037 ,  G11B20/10222 ,  G11B20/10425 ,  G11B20/10527 ,  G11B20/14 ,  G11B20/225 ,  G11B2020/00065 ,  G11B2220/2562 ,  H04N9/8211

摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.

摘要翻译： 一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据 和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。 通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动引起的性能问题。 系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。 在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。

公开(公告)号：US07616089B2

公开(公告)日：2009-11-10

申请号：US11864480

申请日：2007-09-28

申请人： Hua Yang ,  Ammisetti Prasad ,  John L. Melanson

发明人： Hua Yang ,  Ammisetti Prasad ,  John L. Melanson

IPC分类号： H01C13/02 ,  H01L43/00 ,  H01L43/06 ,  H01L43/08

CPC分类号： H03F3/45475 ,  H03F1/3211 ,  H03F2203/45136 ,  H03F2203/45528

摘要： A resistive circuit includes a first terminal and a second terminal and polycrystalline first and second resistive segments coupled between the first and second terminals. A third terminal A is coupled to the first resistive segment, and a third terminal B is coupled to the second resistive segment. The third terminal A has a first voltage with respect to the first terminal, and the third terminal B has a second voltage with respect to the second terminal. With this arrangement, the non-linearity of resistance of the first resistive segment at least partially compensates for non-linearity of resistance of the second resistive segment.

摘要翻译： 电阻电路包括耦合在第一和第二端子之间的第一端子和第二端子以及多晶的第一和第二电阻段。 第三端子A耦合到第一电阻段，并且第三端子B耦合到第二电阻段。 第三端子A相对于第一端子具有第一电压，并且第三端子B相对于第二端子具有第二电压。 利用这种布置，第一电阻段的电阻的非线性至少部分地补偿第二电阻段的电阻的非线性。

公开(公告)号：US07606377B2

公开(公告)日：2009-10-20

申请号：US11421381

申请日：2006-05-31

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： H04R1/40

CPC分类号： H04S3/00 ,  H04R1/403 ,  H04R3/12 ,  H04R2201/401 ,  H04R2205/022 ,  H04R2430/20

摘要： A method and system for surround sound beam-forming using vertically displaced drivers provides a low cost alternative to present external surround array systems. A pair of vertically displaced speaker drivers is supplied with surround and main channel information in a controlled phase relationship with respect to each driver such that the surround channel information is propagated in a directivity pattern substantially differing from that of the main channel information. The main channel information is generally directed at a listening area, while the surround channel information is directed away from the listening area and is substantially attenuated in the direction of the listening area, so that the surround channel information is heard as a diffuse reflected field. An electronic network provides for control of the surround channel phase relationship and combining of main and surround signals for providing inputs to individual power amplifiers for each driver.

摘要翻译： 使用垂直移位的驱动器的环绕声波束形成的方法和系统为现在的外部环绕阵列系统提供了低成本的替代方案。 一对垂直移位的扬声器驱动器以相对于每个驱动器的受控相位关系提供环绕声道和主声道信息，使得环绕声道信息以与主声道信息的方向性图案基本不同的方向性图案传播。 主声道信息通常指向收听区域，而环绕声道信息被指向远离聆听区域并且在聆听区域的方向上基本衰减，使得环绕声道信息被作为漫反射场被听到。 电子网络提供环绕声道相位关系的控制，以及用于向每个驱动器的各个功率放大器提供输入的主信号和环绕信号的组合。

公开(公告)号：US07599462B2

公开(公告)日：2009-10-06

申请号：US11739529

申请日：2007-04-24

申请人： John L. Melanson

发明人： John L. Melanson

IPC分类号： H03D3/24 ,  H03L7/06 ,  H03C3/06

CPC分类号： H03L7/07 ,  H03L7/1976

摘要： A hybrid analog/digital phase-lock loop with high-level event synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level and synchronizing the output clock to high-level events. A numerically-controlled analog oscillator provides a clock output and a counter divides the frequency of the clock output to provide input to a digital phase-frequency detector for detecting an on-going phase-frequency difference between the timing reference and the output of the counter. A synchronization circuit detects or receives a high-level event signal, and resets the on-going phase-frequency difference and optionally the counter to synchronize the clock output with the events. The synchronization circuit may have an arming input to enable the synchronization circuit to signal a next event. Another clock output divider may be included to generate a timing reference output, and the other clock divider also reset in response to a detected event.

摘要翻译： 具有高级事件同步的混合模拟/数字锁相环提供了一种从具有高抖动电平并将输出时钟同步到高电平事件的定时参考产生低抖动时钟的机制。 数控模拟振荡器提供时钟输出，并且计数器分频时钟输出的频率，以向数字相位频率检测器提供输入，以检测定时基准和计数器的输出之间的正在进行的相位差 。 同步电路检测或接收高电平事件信号，并重置正在进行的相位差和可选的计数器以使时钟输出与事件同步。 同步电路可以具有使得同步电路能够发出下一个事件的布防输入。 可以包括另一个时钟输出分频器以产生定时参考输出，另一个时钟分频器也响应于检测到的事件而复位。