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公开(公告)号：US07560220B2
公开(公告)日：2009-07-14
申请号：US12077119
申请日：2008-03-17
CPC分类号： B82Y10/00 , G03F7/0043 , G11B7/261
摘要： A resist material and a nanofabrication method provide high-resolution nanofabrication without an expensive irradiation apparatus using, for example, electron beams or ion beams. That is, the resist material and the nanofabrication method provide finer processing using exposure apparatuses currently in use. A resist layer of an incompletely oxidized transition metal such as W and Mo is selectively exposed and developed to be patterned in a predetermined form. The incompletely oxidized transition metal herein is a compound having an oxygen content slightly deviated to a lower content from the stoichiometric oxygen content corresponding to a possible valence of the transition metal. In other words, the compound has an oxygen content lower than the stoichiometric oxygen content corresponding to a possible valence of the transition metal.
摘要翻译： 抗蚀剂材料和纳米制造方法提供高分辨率纳米制造，而不需要使用例如电子束或离子束的昂贵的照射装置。 也就是说，抗蚀剂材料和纳米制造方法使用目前使用的曝光设备提供更精细的处理。 不完全氧化的过渡金属如W和Mo的抗蚀剂层被选择性地暴露和显影以以预定形式图案化。 本文中不完全氧化的过渡金属是具有相对于过渡金属的可能化合价的化学计量氧含量稍微偏离到较低含量的氧含量的化合物。 换句话说，化合物的氧含量低于对应于过渡金属的可能化合价的化学计量的氧含量。
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82.发明申请Memory element and memory device comprising memory layer positioned between first and second electrodes 有权存储元件和存储器件包括位于第一和第二电极之间的存储器层公开(公告)号：US20080089112A1
公开(公告)日：2008-04-17
申请号：US11998917
申请日：2007-12-03
IPC分类号： G11C11/00
CPC分类号： G11C13/0011 , G11C2213/11 , G11C2213/15 , G11C2213/34 , G11C2213/56 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146
摘要： A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.
摘要翻译： 存储元件10包括位于第一电极2和第二电极6之间的存储层4，其中选自Cu，Ag和Zn的元素包含在存储层4中或与存储器接触的层3中 层4，存储元件10的电阻被施加到存储元件10的电压改变以进行信息的记录，并且在从存储元件10的低电阻值的记录状态改变为擦除的擦除处理 存储元件10的高电阻值的状态，由擦除处理结束时的存储元件10的电阻值的升高引起的由存储元件10施加的电压引起的波动为十倍以内 最大。
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公开(公告)号：US20080083918A1
公开(公告)日：2008-04-10
申请号：US11632594
申请日：2005-07-08
IPC分类号： H01L45/00
CPC分类号： G11C13/0011 , G11C13/0069 , G11C2013/009 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L27/2472 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/145 , H01L45/146 , H01L45/148 , H01L45/149 , H01L45/1675
摘要： It is intended to provide a storage element having an arrangement which becomes able to be manufactured easily with high density.A storage element includes resistance changing elements 10 having recording layers 2, 3 provided between two electrodes 1, 4 and in which resistance values of the recording layers 2, 3 are reversibly changed with application of electric potential with different polarities to these two electrodes 1, 4, at least part of the layers 2, 3 constructing the recording layers of the resistance changing elements 10 being formed commonly by the same layer in a plurality of adjacent memory cells.
摘要翻译： 旨在提供具有能够以高密度容易地制造的布置的存储元件。 存储元件包括电阻变化元件10，其具有设置在两个电极1,4之间的记录层2,3，并且其中记录层2,3的电阻值可通过向这两个电极1施加不同极性的电位而可逆地改变， 如图4所示，构成电阻变化元件10的记录层的层2,3的至少一部分由多个相邻存储单元中的相同层共同形成。
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公开(公告)号：US07345908B2
公开(公告)日：2008-03-18
申请号：US11456436
申请日：2006-07-10
IPC分类号： G11C11/00
CPC分类号： H01L27/2472 , G11C13/0007 , G11C13/0011 , G11C2213/31 , G11C2213/79 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146
摘要： The present invention is to provide a memory device including: a plurality of memory cells that each include a memory element having a memory layer and first and second electrodes that sandwich the memory layer, the plurality of memory cells being divided into memory blocks of m columns by n rows (m and n are each an integer of not less than 1, m+n≧3), the memory elements in the same memory block having the first electrode that is formed of a single layer in common to the memory elements; and a voltage application unit that applies any voltage to the first electrode of the memory block.
摘要翻译： 本发明提供一种存储器件，包括：多个存储单元，每个存储单元包括具有存储层的存储元件和夹持存储层的第一和第二电极，多个存储单元被分成m列的存储块 由n行（m和n各自为不小于1的整数，m + n> = 3），相同存储块中的存储元件具有由存储元件共同的单层形成的第一电极 ; 以及向存储块的第一电极施加任何电压的电压施加单元。
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85.发明授权Thin film formation use sputtering target material, thin film formed using same, and optical recording medium 有权薄膜形成使用溅射靶材料，使用其形成的薄膜和光学记录介质公开(公告)号：US07198700B2
公开(公告)日：2007-04-03
申请号：US11051281
申请日：2005-02-04
申请人： Katsuhisa Aratani , Takashi Ueno
发明人： Katsuhisa Aratani , Takashi Ueno
IPC分类号： C23C14/34
摘要： An alloy material, a thin film and an optical recording medium to achieve various tasks such as maintenance of a high reflectivity, improved corrosion resistance, simplified production of the alloy, and realization of stability and simplicity/easiness of a sputtering process when being used as a sputtering target. An AgPd alloy including Ag as a main component and Pd in the range of 0.5 to 4.9 atomic % is used as a thin film formation use sputtering target material, with the target material a thin film, that is a reflecting film, constituting an optical recording medium is formed and the optical recording medium containing the reflecting film as a constituent is produced.
摘要翻译： 合金材料，薄膜和光学记录介质，以实现各种任务，例如维持高反射率，改进的耐腐蚀性，简化合金的生产，并且当用作为溅射工艺时的稳定性和简单性/易于使用的溅射工艺 溅射靶。 使用包含Ag作为主要成分的AgPd合金和0.5至4.9原子％的Pd，作为薄膜形成用溅射靶材料，其中目标材料是构成光学记录的薄膜，即反射膜 形成介质，并且制备含有反射膜作为组分的光学记录介质。
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公开(公告)号：US20060279983A1
公开(公告)日：2006-12-14
申请号：US11422483
申请日：2006-06-06
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C2013/0078 , G11C2213/15 , G11C2213/34 , G11C2213/76 , G11C2213/79
摘要： A storage device includes a storage element having first and second terminals that cause a first electrical characteristic change when an electric signal of a first threshold level or higher is applied and that cause a second electrical characteristic change, which is asymmetrical to the first electrical characteristic change, when an electric signal of a second threshold level or higher, the polarity of the electric signal of the second threshold level or higher being different from the polarity of the electric signal of the first threshold level or higher, is applied; and a unipolar transistor connected in series with the storage element. One of the first terminal and the second terminal of the storage element is electrically connected to the unipolar transistor. The unipolar transistor has a negative polarity or a positive polarity in accordance with the first terminal or the second terminal electrically connected to the unipolar transistor.
摘要翻译： 存储装置包括具有第一和第二端子的存储元件，当施加第一阈值电平或更高的电信号并且引起与第一电特性变化不对称的第二电特性变化时，第一和第二端子引起第一电特性变化 当施加第二阈值以上的电信号时，施加与第一阈值电平以上的电信号的极性不同的第二阈值电平以上的电信号的极性; 以及与存储元件串联连接的单极晶体管。 存储元件的第一端子和第二端子之一电连接到单极晶体管。 单极晶体管根据与单极晶体管电连接的第一端子或第二端子具有负极性或正极性。
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公开(公告)号：US20060189084A1
公开(公告)日：2006-08-24
申请号：US11328049
申请日：2006-01-09
IPC分类号： H01L21/8236 , H01L29/76
CPC分类号： H01L45/145 , H01L27/101 , H01L27/115 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/1625
摘要： A memory element in which data recording and data readout can be performed stably without difficulties and which can be manufactured with a comparatively simplified method is provided. The memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and the second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag, Zn and any of elements selected from Te, S, Se, and the ion source layer further contains boron (or rare-earth elements and silicon).
摘要翻译： 提供了可以稳定地进行数据记录和数据读出的存储元件，其难点并且可以以比较简化的方法制造。 存储元件10包括存储层4和位于第一电极2和第二电极6之间的离子源层3，其中离子源层3包含选自Cu，Ag，Zn中的任何元素和选择的任何元素 来自Te，S，Se，离子源层还含有硼（或稀土元素和硅）。
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公开(公告)号：US07092278B2
公开(公告)日：2006-08-15
申请号：US11071082
申请日：2005-03-03
CPC分类号： G11C13/0011 , G11C11/5614 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/009 , G11C2213/34 , G11C2213/79
摘要： Data reading can be easily and precisely performed by setting specific conditions in writing into a selected memory cell. A memory cell has a structure, in which an interelectrode material layer is sandwiched between a first electrode and a second electrode. Data is stored by a change in a resistance value between the first electrode and the second electrode. The resistance value when a memory element is in a high resistance state is expressed as R_mem_high; the resistance value when the memory element is in a low resistance state is expressed as R_mem_low1; the resistance value of a load circuit is expressed as R_load; the reading voltage is expressed as Vread by setting the voltage of a second power supply line to the reference voltage; and the threshold voltage is expressed as Vth_critical. In writing data into the memory cell, the low resistance state is created so that these parameters satisfy specific relations. The load circuit is formed by an element having the same structure as of the memory element of the memory cell.
摘要翻译： 通过将特定条件写入选定的存储单元，可以容易且精确地执行数据读取。 存储单元具有其中电极间材料层夹在第一电极和第二电极之间的结构。 通过第一电极和第二电极之间的电阻值的变化来存储数据。 当存储元件处于高电阻状态时的电阻值表示为R_mem_high; 当存储元件处于低电阻状态时的电阻值表示为R_mem_low1; 负载电路的电阻值表示为R_load; 通过将第二电源线的电压设置为参考电压，将读取电压表示为Vread; 阈值电压表示为Vth_critical。 在将数据写入存储单元时，产生低电阻状态，使得这些参数满足特定关系。 负载电路由具有与存储单元的存储元件相同结构的元件形成。
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公开(公告)号：US20060126423A1
公开(公告)日：2006-06-15
申请号：US11302781
申请日：2005-12-14
IPC分类号： G11C8/02
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/56 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/1625
摘要： A memory element which stably performs operations such as data recording and which has a stable structure with respect to heat is provided. A memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag and Zn, and any of elements selected from Te, S and Se, and the memory layer 4 is made of any of tantalum oxide, niobium oxide, aluminum oxide, hafnium oxide and zirconium oxide, or is made of mixed materials thereof.
摘要翻译： 提供了稳定地执行诸如数据记录并且具有相对于热量的稳定结构的操作的存储元件。 存储元件10包括存储层4和位于第一电极2和第二电极6之间的离子源层3，其中离子源层3包含选自Cu，Ag和Zn中的任何元素，以及选择的任何元素 由Te，S，Se构成，记忆层4由氧化钽，氧化铌，氧化铝，氧化铪和氧化锆中的任一种构成，或由其混合材料制成。
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公开(公告)号：US20060092691A1
公开(公告)日：2006-05-04
申请号：US11264939
申请日：2005-11-02
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/32
摘要： A memory element having a configuration in which contents of recorded data can be judged easily and power consumption can be reduced, and a method of driving the same are provided. A memory element 10 of the present invention includes variable resistance elements 11 and 12 whose resistance state changes reversibly between a high resistance state and a low resistance state by applying a voltage of a different polarity between an electrode 1 of one side and an electrode 2 of the other side; the electrode 1 of one side in each element of the two variable resistance elements 11 and 12 is made a common electrode; and the electrode 2 of the other side in each element of the two variable resistance elements 11 and 12 is made independent and is provided respectively with the terminal X and terminal Y, to form a memory cell having two terminals in total.
摘要翻译： 具有可以容易地判断记录数据的内容并且能够降低功耗的配置的存储元件及其驱动方法。 本发明的存储元件10包括可变电阻元件11和12，其电阻状态在高电阻状态和低电阻状态之间可逆地改变，通过在一侧的电极1和电极2之间施加不同极性的电压 另一边; 将两个可变电阻元件11和12的每个元件中的一侧的电极1制成公共电极; 并且两个可变电阻元件11和12的每个元件中的另一侧的电极2被制成独立的并且分别设置有端子X和端子Y，以形成总共具有两个端子的存储单元。
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