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公开(公告)号:US07714360B2
公开(公告)日:2010-05-11
申请号:US11961620
申请日:2007-12-20
Applicant: Koji Otsuka , Osamu Machida , Hitoshi Murofushi
Inventor: Koji Otsuka , Osamu Machida , Hitoshi Murofushi
IPC: H01L21/338 , H01L29/778 , H01L29/812
CPC classification number: H01L29/7787 , H01L23/293 , H01L29/2003 , H01L29/402 , H01L29/405 , H01L29/475 , H01L29/78 , H01L29/8611 , H01L29/872 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
Abstract: A high electron mobility transistor is disclosed which has a main semiconductor region formed on a silicon substrate. The main semiconductor region is a lamination of a buffer layer on the substrate, an electron transit layer on the buffer layer, and an electron supply layer on the electron transit layer. A source, drain, and gate overlie the electron supply layer. Also formed on the electron supply layer is a surface-stabilizing organic semiconductor overlay which is of p conductivity type in contrast to the n type of the electron supply layer.
Abstract translation: 公开了一种高电子迁移率晶体管,其具有形成在硅衬底上的主要半导体区域。 主半导体区域是衬底上的缓冲层,缓冲层上的电子传输层和电子迁移层上的电子供给层的叠层。 源极,漏极和栅极覆盖电子供应层。 还形成在电子供应层上的是与n型电子供应层相反的p导电类型的表面稳定性有机半导体覆盖层。
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公开(公告)号:US07648734B2
公开(公告)日:2010-01-19
申请号:US11237906
申请日:2005-09-29
Applicant: Osamu Machida , Makoto Kurosawa , Kazuo Shimizu
Inventor: Osamu Machida , Makoto Kurosawa , Kazuo Shimizu
CPC classification number: B41J3/28 , B05B13/0431 , B05D1/02 , B05D2252/10 , B41J3/407 , B41J11/0085
Abstract: To coat a solution on both surfaces continuously in such a state that an edge portion of the substrate is so constructed as to be fixed, and the substrate is attached to a substrate fixing frame having a positioning mechanism.
Abstract translation: 在两个表面上连续地涂布溶液,使得基板的边缘部分被构造成固定,并且将基板安装到具有定位机构的基板固定框架上。
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公开(公告)号:US20090159925A1
公开(公告)日:2009-06-25
申请号:US12336106
申请日:2008-12-16
Applicant: Osamu Machida
Inventor: Osamu Machida
IPC: H01L29/739
CPC classification number: H01L29/7787 , H01L27/0605 , H01L27/0629 , H01L29/2003 , H01L29/7783 , H01L29/872
Abstract: A main semiconductor region grown on a substrate has formed on its surface a pair of main electrodes spaced from each other, a gate electrode between the main electrodes, and a pair of diode-forming electrodes spaced farther away from the gate electrode than are the main electrodes. Making ohmic contact with the main semiconductor region, the pair of main electrodes serve both as drain or source of a HEMT switch and as cathodes of a pair of Schottky diodes integrated with the HEMT switch. Both gate electrode and diode-forming electrodes are in Schottky contact with the main semiconductor region.
Abstract translation: 生长在基板上的主半导体区域在其表面上形成彼此间隔开的一对主电极,主电极之间的栅电极和远离栅极电极的一对二极管形成电极比主电极 电极。 与主半导体区域欧姆接触,该对主电极既用作HEMT开关的漏极或源极,也用作与HEMT开关集成的一对肖特基二极管的阴极。 栅电极和二极管形成电极都与主半导体区域肖特基接触。
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公开(公告)号:US20080191216A1
公开(公告)日:2008-08-14
申请号:US12015067
申请日:2008-01-16
Applicant: Osamu Machida , Akio Iwabuchi
Inventor: Osamu Machida , Akio Iwabuchi
IPC: H01L27/06
CPC classification number: H01L27/0605 , H01L25/18 , H01L29/2003 , H01L29/4175 , H01L29/7786 , H01L2224/32145 , H01L2224/32245 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/30107 , H03K17/567 , H03K17/74 , H01L2924/00
Abstract: A silicon-made low-forward-voltage Schottky barrier diode is serially combined with a high-antivoltage-strength high-electron-mobility transistor made from a nitride semiconductor that is wider in bandgap than silicon. The Schottky barrier diode has its anode connected to the gate, and its cathode to the source, of the HEMT. This HEMT is normally on. The reverse voltage withstanding capability of the complete device depends upon that between the drain and gate of the HEMT.
Abstract translation: 硅制造的低电压肖特基势垒二极管与由氮化物半导体制成的高抗电压强度的高电子迁移率晶体管串联组合,氮化物半导体的带隙比硅更宽。 肖特基势垒二极管的阳极连接到HEMT的栅极,其阴极连接到源极。 这个HEMT通常是打开的。 整个器件的反向耐压能力取决于HEMT的漏极和栅极之间的电压。
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公开(公告)号:US20080121876A1
公开(公告)日:2008-05-29
申请号:US11961620
申请日:2007-12-20
Applicant: Koji Otsuka , Osamu Machida , Hitoshi Murofushi
Inventor: Koji Otsuka , Osamu Machida , Hitoshi Murofushi
IPC: H01L51/05
CPC classification number: H01L29/7787 , H01L23/293 , H01L29/2003 , H01L29/402 , H01L29/405 , H01L29/475 , H01L29/78 , H01L29/8611 , H01L29/872 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
Abstract: A high electron mobility transistor is disclosed which has a main semiconductor region formed on a silicon substrate. The main semiconductor region is a lamination of a buffer layer on the substrate, an electron transit layer on the buffer layer, and an electron supply layer on the electron transit layer. A source, drain, and gate overlie the electron supply layer. Also formed on the electron supply layer is a surface-stabilizing organic semiconductor overlay which is of p conductivity type in contrast to the n type of the electron supply layer.
Abstract translation: 公开了一种高电子迁移率晶体管,其具有形成在硅衬底上的主要半导体区域。 主半导体区域是衬底上的缓冲层,缓冲层上的电子传输层和电子迁移层上的电子供给层的叠层。 源极,漏极和栅极覆盖电子供应层。 还形成在电子供应层上的是与n型电子供应层相反的p导电类型的表面稳定性有机半导体覆盖层。
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公开(公告)号:US5966153A
公开(公告)日:1999-10-12
申请号:US771912
申请日:1996-12-23
Applicant: Masao Mitani , Kenji Yamada , Katsunori Kawasumi , Osamu Machida , Kazuo Shimizu
Inventor: Masao Mitani , Kenji Yamada , Katsunori Kawasumi , Osamu Machida , Kazuo Shimizu
CPC classification number: B41J2/1635 , B41J2/14129 , B41J2/1603 , B41J2/1626 , B41J2/1631 , B41J2/1646 , B41J2202/03
Abstract: An ink jet printing device including an ink channel wall defining an ink chamber; a nozzle portion formed with a nozzle connecting the ink chamber with atmosphere; and a thermal heater formed to the ink channel wall adjacent to the nozzle portion, the thermal heater including a Ta--Si--O ternary alloy thin film resistor having a composition of 64% .ltoreq.Ta.ltoreq.85%, 5%.ltoreq.Si.ltoreq.26%, and 6%.ltoreq.O.ltoreq.15% and a nickel film conductor.
Abstract translation: 一种喷墨打印装置,包括限定油墨室的油墨通道壁; 形成有将墨水室与大气连接的喷嘴的喷嘴部; 以及形成在与喷嘴部分相邻的墨水通道壁上的热加热器,该热加热器包括具有64%Ta%85%组成的Ta-Si-O三元合金薄膜电阻,5% / =Si≤26%,6%≤0.15%和镍膜导体。
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公开(公告)号:US5666140A
公开(公告)日:1997-09-09
申请号:US228897
申请日:1994-04-18
Applicant: Masao Mitani , Kenji Yamada , Osamu Machida
Inventor: Masao Mitani , Kenji Yamada , Osamu Machida
CPC classification number: B41J2/1635 , B41J11/002 , B41J11/0085 , B41J2/1404 , B41J2/14129 , B41J2/1603 , B41J2/1623 , B41J2/1626 , B41J2/1643 , B41J2202/03
Abstract: An ink jet print head includes: a monolithic silicon substrate having a top surface; a plurality of chamber walls for defining a plurality of ink chambers on the top surface of the silicon substrate, the plurality of ink chambers being aligned in a first direction into a row extending along the top surface of the silicon substrate, each of the plurality of ink chambers being filled with ink, each chamber wall having a nozzle portion for defining a nozzle of a plurality of nozzles, each nozzle portion being formed so that each nozzle is in fluid communication with a respective ink chamber, the plurality of nozzles being aligned in the first direction into a row extending parallel to the top surface of the silicon substrate; an integrated circuit provided on the top surface of the silicon substrate and located adjacent to the plurality of ink chambers for outputting pulsed electric current; and a plurality of thermal resistors provided on the top surface of the silicon substrate each being located in a corresponding ink chamber of the plurality of ink chambers, each of the plurality of thermal resistors including a thin-film resistor. the thin-film resistor being made of a material selected from a group consisting of Ta--Si--SiO alloy and Cr--Si--SiO alloy, the thin-film conductor being made of a material selected from a group consisting of tungsten and nickel.
Abstract translation: 一种喷墨打印头包括:具有顶表面的单片硅基板; 多个室壁,用于在硅衬底的顶表面上限定多个墨室,所述多个墨室沿着第一方向排列成沿着硅衬底的顶表面延伸的一排, 每个室壁具有用于限定多个喷嘴的喷嘴的喷嘴部分,每个喷嘴部分形成为使得每个喷嘴与相应的墨水室流体连通,多个喷嘴对准在 所述第一方向平行于所述硅衬底的顶表面延伸成一行; 集成电路,其设置在所述硅基板的顶表面上,并位于所述多个墨室附近,用于输出脉冲电流; 以及设置在所述硅基板的上表面上的多个热电阻器,每个位于所述多个墨水腔室的相应的墨水室中,所述多个热敏电阻器中的每一个包括薄膜电阻器。 所述薄膜电阻器由选自由Ta-Si-SiO合金和Cr-Si-SiO合金组成的组中的材料制成,所述薄膜导体由选自钨和镍的材料制成。
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