公开(公告)号：US20080013388A1

公开(公告)日：2008-01-17

申请号：US11457507

申请日：2006-07-14

申请人： Toru Asano ,  Sang H. Dhong ,  Takaaki Nakazato ,  Osamu Takahashi

发明人： Toru Asano ,  Sang H. Dhong ,  Takaaki Nakazato ,  Osamu Takahashi

IPC分类号： G11C7/00 ,  G11C29/00

CPC分类号： G11C29/848

摘要： A memory system including a memory array with redundant wordlines is disclosed. The memory system includes a memory wordline tester that determines if any of the wordlines exhibits a defect. The memory system also includes decoder redundancy logic that efficiently couples to wordline shift logic using a reduced number of control signal lines therebetween. The shift logic shifts defective wordlines to upstream wordlines in the array to bypass the defective wordlines.

摘要翻译： 公开了一种包括具有冗余字线的存储器阵列的存储器系统。 存储器系统包括存储器字线测试器，其确定任何字线是否存在缺陷。 存储器系统还包括使用其间数量减少的控制信号线有效地耦合到字线移位逻辑的解码器冗余逻辑。 移位逻辑将有缺陷的字线转移到阵列中的上游字线以绕过有缺陷的字线。

公开(公告)号：US20070147863A1

公开(公告)日：2007-06-28

申请号：US11645038

申请日：2006-12-26

申请人： Osamu Takahashi

发明人： Osamu Takahashi

IPC分类号： G03G15/00 ,  G03G15/01 ,  G03G15/16

CPC分类号： G03G15/754 ,  G03G2215/0119 ,  G03G2215/0158

摘要： An image forming apparatus includes; an image forming unit; an annular belt that moves circularly; a detection unit that detects a state of a surface of the belt; and a tension increase 5 unit that increases a tension of the belt, at a detection position by the detection unit, when detection is performed by the detection unit, as compared with the tension of the belt before detection at the detection position is performed by the detection unit.

摘要翻译： 图像形成装置包括： 图像形成单元; 循环移动的环形带; 检测所述带的表面的状态的检测单元; 以及张力增加5单元，当检测单元检测到与检测位置的检测前的带张力相比时，由检测单元检测位置增加带张力， 检测单元

公开(公告)号：US07194214B2

公开(公告)日：2007-03-20

申请号：US11039828

申请日：2005-01-24

申请人： Osamu Takahashi

发明人： Osamu Takahashi

IPC分类号： G03G15/00

CPC分类号： G03G15/5058 ,  G03G15/5041 ,  G03G2215/0164

摘要： When a regular reflection light receiving unit is receiving a reflected light in a non-image area where the test patches are not formed, a clamp switch is closed. Then, a first reference voltage generated by a pull-up resistor and a zener diode is corresponded to an electric potential of a terminal of a capacitor on the side of an A/D converter. The capacitor is charged by the difference in electric potential between the first reference voltage and an output voltage from the regular reflection light receiving unit. Next, the clamp switch is opened. After the regular reflection light receiving unit receives the reflected light from an image area where the test patches are formed with this state of things, the output voltage from the regular reflection light receiving unit is changed. The difference in density between the image area and the non-image area can be quantified by the A/D converter.

摘要翻译： 当正反射光接收单元在未形成测试片的非图像区域中接收到反射光时，闭合开关。 然后，由上拉电阻和齐纳二极管产生的第一参考电压对应于A / D转换器一侧的电容器的端子的电位。 电容器由第一参考电压和来自正反射光接收单元的输出电压之间的电位差来充电。 接下来，夹紧开关打开。 在正常反射光接收单元接收到来自具有这种状态的测试贴片的图像区域的反射光之后，来自正反射光接收单元的输出电压被改变。 图像区域和非图像区域之间的密度差可以通过A / D转换器来量化。

公开(公告)号：US20070043895A1

公开(公告)日：2007-02-22

申请号：US11204417

申请日：2005-08-16

申请人： Chad Adams ,  Toru Asano ,  Sang Dhong ,  Takaaki Nakazato ,  Joel Silberman ,  Osamu Takahashi

发明人： Chad Adams ,  Toru Asano ,  Sang Dhong ,  Takaaki Nakazato ,  Joel Silberman ,  Osamu Takahashi

IPC分类号： G06F12/06 ,  G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3243 ,  G06F1/3275 ,  G11C8/08 ,  Y02D10/128 ,  Y02D10/14 ,  Y02D10/152

摘要： An apparatus, a method, and a computer program are provided to efficiently use a microprocessor array. Typically, microprocessor arrays can be divided into multiple subarrays. Also, in the conventional arrays, each of the subarrays were engaged when the microprocessor array is used. To alleviate the power consumed by the microprocessor arrays, row selection logic is employed to engage only specific rows of subarrays. Therefore, power consumed by unused subarrys is saved.

摘要翻译： 提供了一种装置，方法和计算机程序以有效地使用微处理器阵列。 通常，微处理器阵列可以分为多个子阵列。 此外，在常规阵列中，当使用微处理器阵列时，每个子阵列被接合。 为了减轻微处理器阵列消耗的功率，采用行选择逻辑仅与特定的子阵列相啮合。 因此，省去了未使用的亚军消耗的电力。

公开(公告)号：US07170328B2

公开(公告)日：2007-01-30

申请号：US10982112

申请日：2004-11-05

申请人： Sang Hoo Dhong ,  Joel A. Silberman ,  Osamu Takahashi

发明人： Sang Hoo Dhong ,  Joel A. Silberman ,  Osamu Takahashi

IPC分类号： H03K3/289 ,  H03K3/356

CPC分类号： H03K3/356113 ,  G01R31/318541

摘要： A scannable latch is disclosed. The scannable latch includes a dynamic circuit, two cross-coupled NAND gates coupled to the dynamic circuit, and a pair of stacked transistors coupled to the dynamic circuit. One of the stacked transistors is for receiving data signals, and the other stacked transistors is for receiving scan in signals.

摘要翻译： 公开了可扫描的闩锁。 可扫描锁存器包括动态电路，耦合到动态电路的两个交叉耦合NAND门和耦合到动态电路的一对堆叠晶体管。 堆叠晶体管中的一个用于接收数据信号，而另一个堆叠晶体管用于接收扫描信号。

公开(公告)号：US07168022B2

公开(公告)日：2007-01-23

申请号：US10743635

申请日：2003-12-22

申请人： Motoharu Miyake ,  Hiroshi Inamura ,  Taro Ishikawa ,  Kazuhisa Yokota ,  Osamu Takahashi

发明人： Motoharu Miyake ,  Hiroshi Inamura ,  Taro Ishikawa ,  Kazuhisa Yokota ,  Osamu Takahashi

IPC分类号： G08C25/02 ,  H04L1/18

CPC分类号： H04L1/1883 ,  H04L1/1809

摘要： A first elapsed time from transmission of a data segment until receipt of an acknowledgement is measured. A probability distribution of the first elapsed time is generated for a client device 50 on the basis of the measured first elapsed time. A second elapsed time from retransmission of a data segment until receipt of an acknowledgement is measured. A probability distribution of the second elapsed time is generated for a client device 50 on the basis of the measured first elapsed time. An estimation is made as to whether an acknowledgment pertains to which data segment on the basis of the generated probability distribution.

摘要翻译： 测量从数据段传输到接收到确认之前的第一个经过时间。 基于测量的第一经过时间，为客户端设备50生成第一经过时间的概率分布。 测量从数据段的重传到接收确认的第二次经过时间。 基于所测量的第一经过时间，为客户端设备50生成第二经过时间的概率分布。 根据生成的概率分布来估计确认是关于哪个数据段。

公开(公告)号：US07165006B2

公开(公告)日：2007-01-16

申请号：US10976259

申请日：2004-10-28

申请人： Sang Hoo Dhong ,  Joel Abraham Silberman ,  Osamu Takahashi ,  James Douglas Warnock ,  Dieter Wendel

发明人： Sang Hoo Dhong ,  Joel Abraham Silberman ,  Osamu Takahashi ,  James Douglas Warnock ,  Dieter Wendel

IPC分类号： G06F19/00

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： An apparatus, a method and a computer program product are provided for conserving energy during functional mode of a processor by disabling the scan chain. By inserting logic gating into the scan chain it is possible to disable the scan chain during the processor's functional mode. During functional mode the scan out port of the latch bit in a scan chain toggles, which leads to unnecessary energy consumption. By gating scan control signals and the scan out port of a latch bit, the scan chain segment between latch bits can be disconnected. Therefore, the scan control signals can disable the scan chain during functional mode.

摘要翻译： 提供了一种装置，方法和计算机程序产品，用于通过禁用扫描链来在处理器的功能模式期间节省能量。 通过将逻辑门控插入到扫描链中，可以在处理器的功能模式期间禁用扫描链。 在功能模式期间，扫描链中锁存位的扫描输出端口切换，这导致不必要的能量消耗。 通过门控扫描控制信号和锁存位的扫描输出端口，可以断开锁存位之间的扫描链段。 因此，扫描控制信号可以在功能模式下禁用扫描链。

公开(公告)号：US20060149930A1

公开(公告)日：2006-07-06

申请号：US11007066

申请日：2004-12-08

申请人： Hiroaki Murakami ,  Osamu Takahashi

发明人： Hiroaki Murakami ,  Osamu Takahashi

IPC分类号： G06F9/30

CPC分类号： G06F9/3826 ,  G06F9/3828 ,  G06F9/3832 ,  G06F9/3867

摘要： Systems and methods for forwarding instruction results from various pipeline stages to the initial stages of the pipelines, where the results can be used in the execution of subsequent instructions. In one embodiment, a forwarding mechanism is designed so that sets of one or more dynamic data selection circuits are placed in an alternating linear series with corresponding data registers. Each data register may be coupled to several dynamic data selection circuits, each of which corresponds to a different port or destination register. The dynamic data selection circuits coupled to a single data register are successively positioned in a direction that is perpendicular to the direction of the alternating linear array. Each dynamic data selection circuit may consist of a 2-input NOR gate coupled to drive a discharge transistor. The dynamic data selection circuits themselves may be aligned with the alternating series of latches and data selection circuits.

摘要翻译： 将各种流水线阶段的指令结果转发到管道的初始阶段的系统和方法，其中结果可用于执行后续指令。 在一个实施例中，转发机制被设计成使得一组或多个动态数据选择电路的集合被放置在与对应的数据寄存器的交替线性序列中。 每个数据寄存器可以耦合到几个动态数据选择电路，每个动态数据选择电路对应于不同的端口或目的地寄存器。 耦合到单个数据寄存器的动态数据选择电路被连续地定位在垂直于交替线性阵列的方向的方向上。 每个动态数据选择电路可以由耦合以驱动放电晶体管的2输入或非门组成。 动态数据选择电路本身可以与交替的锁存器和数据选择电路对齐。

公开(公告)号：US20050163519A1

公开(公告)日：2005-07-28

申请号：US11039828

申请日：2005-01-24

申请人： Osamu Takahashi

发明人： Osamu Takahashi

IPC分类号： G01N21/47 ,  G01J1/18 ,  G01N21/55 ,  G03G15/00 ,  G03G21/00

CPC分类号： G03G15/5058 ,  G03G15/5041 ,  G03G2215/0164

摘要： When a regular reflection light receiving unit is receiving a reflected light in a non-image area where the test patches are not formed, a clamp switch is closed. Then, a first reference voltage generated by a pull-up resistor and a zener diode is corresponded to an electric potential of a terminal of a capacitor on the side of an A/D converter. The capacitor is charged by the difference in electric potential between the first reference voltage and an output voltage from the regular reflection light receiving unit. Next, the clamp switch is opened. After the regular reflection light receiving unit receives the reflected light from an image area where the test patches are formed with this state of things, the output voltage from the regular reflection light receiving unit is changed. The difference in density between the image area and the non-image area can be quantified by the A/D converter.

摘要翻译： 当正反射光接收单元在未形成测试片的非图像区域中接收到反射光时，闭合开关。 然后，由上拉电阻和齐纳二极管产生的第一参考电压对应于A / D转换器一侧的电容器的端子的电位。 电容器由第一参考电压和来自正反射光接收单元的输出电压之间的电位差来充电。 接下来，夹紧开关打开。 在正常反射光接收单元接收到来自具有这种状态的测试贴片的图像区域的反射光之后，来自正反射光接收单元的输出电压被改变。 图像区域和非图像区域之间的密度差可以通过A / D转换器来量化。

公开(公告)号：US20050162186A1

公开(公告)日：2005-07-28

申请号：US10764179

申请日：2004-01-23

申请人： Hiroaki Murakami ,  Osamu Takahashi ,  Jieming Qi

发明人： Hiroaki Murakami ,  Osamu Takahashi ,  Jieming Qi

IPC分类号： G05B19/05 ,  H03K19/00 ,  H03K19/173 ,  H03K19/20

CPC分类号： H03K19/1737 ,  H03K19/0016

摘要： Systems and methods for reducing the power consumption of some combinations of logic gates by reducing the number of unnecessary transitions that are made by logic gates that do not affect the output of the logic. In one embodiment, a modified exclusive-OR (XOR) gate is coupled to a modified multiplexer. The XOR gate has two inputs, Ain, and Bin, and an output, XORout, which is provided as an input to the multiplexer. Another input to the multiplexer is Cin. A select signal is input to the multiplexer to select either Cin or XORout to be provided at the output of the multiplexer. If XORout is selected, the XOR gate operates in a first mode in which it functions as a normal XOR gate. If Cin is selected, the XOR gate operates in a second mode in which the XOR gate uses less power than when the XOR gate operates normally.

摘要翻译： 通过减少不影响逻辑输出的逻辑门进行的不必要的转换次数来减少逻辑门的某些组合的功耗的系统和方法。 在一个实施例中，修改的异或（XOR）门耦合到修改的多路复用器。 异或门具有两个输入：中的A _{和中的B ，输出XOR 输出，作为输入 复用器。 复用器的另一个输入是中的C 。 选择信号被输入到多路复用器以选择要在多路复用器的输出处提供的或XOR 输出中的C 。 如果选择XOR ，则异或门以第一模式工作，其中它用作正常的异或门。 如果选择了中的C ，则异或门以第二模式工作，其中XOR门比XOR门正常工作时使用的功率更小。}