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    Multiple Thermal Circuit Heat Spreader
    82.
    发明申请
    Multiple Thermal Circuit Heat Spreader 审中-公开
    多热回路散热器

    公开(公告)号：US20130133871A1

    公开(公告)日：2013-05-30

    申请号：US13640758

    申请日：2011-04-12

    Applicant: Hongbin Ma ,  Peng Cheng ,  Joseph A. Boswell

    Inventor： Hongbin Ma ,  Peng Cheng ,  Joseph A. Boswell

    IPC: F28D15/00

    CPC classification number: F28D15/00 ,  F28D15/0266 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A heat spreader has more than one thermal circuit to give better performance over a wider range of heat input regimes. Different working fluids may be used in the different thermal circuits. The thermal circuits may extend in three dimensions to improve the density of the channels in limited space.

    Abstract translation: 散热器具有多个热回路，以在更宽范围的热输入方式下提供更好的性能。 不同的工作流体可用于不同的热回路。 热电路可以在三维中延伸以在有限的空间内改善通道的密度。

    SUBSTITUTED TRIAZOLES AS MODULATORS OF PPAR AND METHODS OF THEIR PREPARATION
    87.
    发明申请
    SUBSTITUTED TRIAZOLES AS MODULATORS OF PPAR AND METHODS OF THEIR PREPARATION 审中-公开
    取代三唑作为PPAR的调节剂及其制备方法

    公开(公告)号：US20080108630A1

    公开(公告)日：2008-05-08

    申请号：US11932755

    申请日：2007-10-31

    Applicant: Yan Zhu ,  Jingyuan Ma ,  Peng Cheng ,  Zuchun Zhao ,  Francine Gregoire ,  Vera Rakhmanova

    Inventor： Yan Zhu ,  Jingyuan Ma ,  Peng Cheng ,  Zuchun Zhao ,  Francine Gregoire ,  Vera Rakhmanova

    IPC: A61K31/497 ,  A61P3/06 ,  A61P3/10 ,  A61K31/4192 ,  C07D403/06 ,  C07D249/04

    CPC classification number: C07D249/06 ,  C07D409/10

    Abstract: The present invention is directed to certain novel triazole compounds represented by Formula I and pharmaceutically acceptable salts, solvates, hydrates, and prodrugs thereof. The present invention is also directed to methods of making and using such compounds and pharmaceutical compositions containing such compounds to treat or control a number of diseases mediated by PPAR such as glucose metabolism, lipid metabolism and insulin secretion, specifically Type 2 diabetes, hyperinsulemia, hyperlipidemia, hyperuricemia, hypercholesteremia, atherosclerosis, one or more risk factors for cardiovascular disease, Syndrome X, hypertriglyceridemia, hyperglycemia, obesity, and eating disorders.

    Abstract translation: 本发明涉及由式I表示的某些新颖的三唑化合物及其药学上可接受的盐，溶剂合物，水合物和前药。 本发明还涉及制备和使用这些化合物和含有这些化合物的药物组合物的方法，以治疗或控制PPAR介导的许多疾病，例如葡萄糖代谢，脂质代谢和胰岛素分泌，特别是2型糖尿病，高胰岛素血症，高脂血症 高尿酸血症，高胆固醇血症，动脉粥样硬化，心血管疾病的一个或多个危险因素，X综合征，高甘油三酯血症，高血糖症，肥胖症和进食障碍。

    High dielectric constant metal oxide gate dielectrics
    88.
    发明申请
    High dielectric constant metal oxide gate dielectrics 失效
    高介电常数金属氧化物栅极电介质

    公开(公告)号：US20050087820A1

    公开(公告)日：2005-04-28

    申请号：US10646034

    申请日：2003-08-22

    Applicant: Gang Bai ,  David Fraser ,  Brian Doyle ,  Peng Cheng ,  Chunlin Liang

    Inventor： Gang Bai ,  David Fraser ,  Brian Doyle ,  Peng Cheng ,  Chunlin Liang

    IPC: H01L21/28 ,  H01L29/51 ,  H01L21/8238 ,  H01L29/76

    CPC classification number: H01L29/513 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/28229 ,  H01L29/517

    Abstract: A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, and reacting the metal with the oxidized surface to form a substantially intrinsic layer of silicon superjacent the substrate, wherein at least a portion of the silicon layer may be an epitaxial silicon layer, and a metal oxide layer superjacent the silicon layer. In a further aspect of the present invention, an integrated circuit includes a plurality of MOSFETs, wherein various ones of the plurality of transistors have metal oxide gate dielectric layers and substantially intrinsic silicon layers subjacent the metal oxide dielectric layers.

    Abstract translation: 形成适合用作金属氧化物半导体场效应晶体管（MOSFET）的栅极电介质层的电介质层的方法包括氧化硅衬底的表面，在氧化表面上形成金属层，并使金属 与氧化表面形成超过衬底的基本上本征的硅层，其中硅层的至少一部分可以是外延硅层，以及位于硅层之上的金属氧化物层。 在本发明的另一方面，集成电路包括多个MOSFET，其中多个晶体管中的各个晶体管具有金属氧化物栅极电介质层和位于金属氧化物电介质层之下的基本上本征的硅层。

    Method of fabricating a feature in an integrated circuit using two edge definition layers and a spacer
    89.
    发明授权
    Method of fabricating a feature in an integrated circuit using two edge definition layers and a spacer 有权
    使用两个边缘限定层和间隔物在集成电路中制造特征的方法

    公开(公告)号：US06596609B2

    公开(公告)日：2003-07-22

    申请号：US09740782

    申请日：2000-12-19

    Applicant: Peng Cheng ,  Brian S. Doyle

    Inventor： Peng Cheng ,  Brian S. Doyle

    IPC: H01L21265

    CPC classification number: H01L21/28132 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  Y10S438/947

    Abstract: A method of fabricating a feature on a substrate is disclosed. In a described embodiment the feature is the gate electrode of an MOS transistor. In this embodiment a polysilicon layer is formed on the substrate. Next, an edge definition layer of silicon nitride is formed on the feature layer. Then, a patterned edge definition layer of silicon dioxide is formed on the first edge definition layer. Then, a silicon nitride spacer is formed adjacent to an edge of the patterned second edge definition layer. Finally, the polysilicon layer is etched, forming the transistor gate electrode from the polysilicon that remains under the spacer.

    Abstract translation: 公开了一种在衬底上制造特征的方法。 在所描述的实施例中，特征是MOS晶体管的栅电极。 在该实施例中，在衬底上形成多晶硅层。 接下来，在特征层上形成氮化硅的边缘限定层。 然后，在第一边缘限定层上形成图案化的二氧化硅边缘限定层。 然后，与图案化的第二边缘限定层的边缘相邻地形成氮化硅间隔物。 最后，蚀刻多晶硅层，从保留在间隔物下方的多晶硅形成晶体管栅电极。

    High dielectric constant metal oxide gate dielectrics
    90.
    发明授权
    High dielectric constant metal oxide gate dielectrics 有权
    高介电常数金属氧化物栅极电介质

    公开(公告)号：US06528856B1

    公开(公告)日：2003-03-04

    申请号：US09212773

    申请日：1998-12-15

    Applicant: Gang Bai ,  David B. Fraser ,  Brian S. Doyle ,  Peng Cheng ,  Chunlin Liang

    Inventor： Gang Bai ,  David B. Fraser ,  Brian S. Doyle ,  Peng Cheng ,  Chunlin Liang

    IPC: H01L2976

    CPC classification number: H01L29/513 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/28229 ,  H01L29/517

    Abstract: A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, and reacting the metal with the oxidized surface to form a substantially intrinsic layer of silicon superjacent the substrate, wherein at least a portion of the silicon layer may be an epitaxial silicon layer, and a metal oxide layer superjacent the silicon layer. In a further aspect of the present invention, an integrated circuit includes a plurality of MOSFETs, wherein various ones of the plurality of transistors have metal oxide gate dielectric layers and substantially intrinsic silicon layers subjacent the metal oxide dielectric layers.

    Abstract translation: 形成适合用作金属氧化物半导体场效应晶体管（MOSFET）的栅极电介质层的电介质层的方法包括氧化硅衬底的表面，在氧化表面上形成金属层，并使金属 与氧化表面形成超过衬底的基本上本征的硅层，其中硅层的至少一部分可以是外延硅层，以及位于硅层之上的金属氧化物层。 在本发明的另一方面，集成电路包括多个MOSFET，其中多个晶体管中的各个晶体管具有金属氧化物栅极电介质层和位于金属氧化物电介质层之下的基本上本征的硅层。

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