公开(公告)号：US06424184B1

公开(公告)日：2002-07-23

申请号：US09269315

申请日：1999-03-24

申请人： Akira Yamamoto ,  Shiro Sakiyama ,  Hiroyuki Nakahira ,  Masaru Fukuda ,  Akira Matsuzawa ,  Shiro Dosho ,  Shinichi Yamamoto

发明人： Akira Yamamoto ,  Shiro Sakiyama ,  Hiroyuki Nakahira ,  Masaru Fukuda ,  Akira Matsuzawa ,  Shiro Dosho ,  Shinichi Yamamoto

IPC分类号： H03D300

CPC分类号： G01R23/06 ,  G06F1/3203 ,  Y02D10/126

摘要： A frequency-voltage conversion circuit 21 receives a clock CLK as an input and provides a voltage IVdd in accordance with the frequency of the clock as an output. The input and output characteristic of the frequency-voltage conversion circuit 21 is adjusted to substantially match a given input and output characteristic.

摘要翻译： 频率电压转换电路21接收时钟CLK作为输入，并根据时钟的频率提供电压IVdd作为输出。 频率电压转换电路21的输入和输出特性被调节以基本匹配给定的输入和输出特性。

公开(公告)号：US06326772B2

公开(公告)日：2001-12-04

申请号：US09735272

申请日：2000-12-12

申请人： Keiichi Kusumoto ,  Akira Matsuzawa

发明人： Keiichi Kusumoto ,  Akira Matsuzawa

IPC分类号： H02M306

CPC分类号： H02M7/537 ,  H02M3/155 ,  H02M3/158

摘要： A power supply apparatus 200 comprises an energy supplying circuit 210 for supplying energy at a predetermined timing, and an energy preserving circuit 220 for receiving the energy supplied from the energy supplying circuit 210 and preserving the energy. The energy preserving circuit 220 includes an inductor 221, a capacitance 223 connected to one end of the inductor 221 at a node 222, and a capacitance 225 connected to the other end of the inductor 221 at a node 224. Energy is supplied to a load via at least one of the node 222 and the node 224.

摘要翻译： 电源装置200包括用于在预定定时提供能量的能量供应电路210，以及用于接收从能量供应电路210提供的能量并保持能量的能量保存电路220。 能量保存电路220包括电感器221，在节点222处连接到电感器221的一端的电容223和在节点224处连接到电感器221的另一端的电容225.能量被供应到负载 经由节点222和节点224中的至少一个。

公开(公告)号：US06284434B1

公开(公告)日：2001-09-04

申请号：US09175319

申请日：1998-10-20

申请人： Hiroyuki Kamei ,  Tsutomu Nishiwaki ,  Makoto Matsuzaki ,  Masato Shimada ,  Akira Matsuzawa

发明人： Hiroyuki Kamei ,  Tsutomu Nishiwaki ,  Makoto Matsuzaki ,  Masato Shimada ,  Akira Matsuzawa

IPC分类号： G03F700

CPC分类号： H01L41/332 ,  H01L41/314

摘要： A piezoelectric thin film element is provided that functions well as an actuator, that yields the desired composition, and that exhibits good piezoelectric thin film distortion characteristics. A lower electrode is formed on a substrate, a piezoelectric thin film precursor thin film layer is formed on the lower electrode, this is subjected to patterning, and a heating solution is applied to the substrate to implement hydrothermal processing, thereby selectively crystallizing the precursor thin film layer and yielding a piezoelectric thin film layer.

摘要翻译： 提供了一种压电薄膜元件，其作为致动器的功能良好，其产生期望的组成，并且表现出良好的压电薄膜失真特性。 在基板上形成下电极，在下电极上形成压电薄膜前体薄膜层，对其进行图案化，将加热溶液施加到基板上进行水热处理，从而选择性地使前体薄膜 膜层并产生压电薄膜层。

公开(公告)号：US06211720B1

公开(公告)日：2001-04-03

申请号：US09551237

申请日：2000-04-17

申请人： Akira Matsuzawa

发明人： Akira Matsuzawa

IPC分类号： H03K1716

CPC分类号： H03K19/01714 ,  H03K19/01735

摘要： A logic circuit includes: a main switching means for changing conduction state between at least two terminals in accordance with a voltage supplied to a control terminal; and a voltage converting means for converting a voltage at an input terminal and outputting the converted voltage to the control terminal.

摘要翻译： 逻辑电路包括：主开关装置，用于根据提供给控制端的电压在至少两个端子之间改变导通状态; 以及电压转换装置，用于转换输入端的电压并将转换的电压输出到控制端。

公开(公告)号：US06172557B2

公开(公告)日：2001-01-09

申请号：US09398817

申请日：1999-09-20

申请人： Yutaka Terada ,  Keiichi Kusumoto ,  Akira Matsuzawa

发明人： Yutaka Terada ,  Keiichi Kusumoto ,  Akira Matsuzawa

IPC分类号： H03D300

CPC分类号： G04F10/005 ,  G01R29/027 ,  H03D3/04 ,  H03K9/06

摘要： Provided is a time counting circuit which can measure the time taken from the rising edge to the falling edge of a pulse signal and the time from the falling edge to the rising edge thereof. The time counting circuit according to the present invention comprises a measuring circuit for measuring the time between either of the rising and falling edges of the pulse signal, and a pulse converting circuit for converting a pulse signal to be measured to a pulse signal having either of the edges in accordance with the rising edge of the pulse signal to be measured and having either of the edges in accordance with the falling edge of the pulse signal to be measured. The time between either of the edges of the pulse signal converted by the pulse converting circuit is measured by the measuring circuit. The time obtained by measurement is the time taken from the rising edge to the falling edge of the pulse signal to be measured or the time taken from the falling edge to the rising edge thereof.

摘要翻译： 提供了一种时间计数电路，其可以测量从脉冲信号的上升沿到下降沿的时间以及从下降沿到上升沿的时间。 根据本发明的计时电路包括：测量脉冲信号的上升沿和下降沿之间的时间的测量电路;以及脉冲转换电路，用于将要测量的脉冲信号转换成具有 根据要测量的脉冲信号的上升沿的边缘，并根据要测量的脉冲信号的下降沿具有任一边缘。 由脉冲转换电路转换的脉冲信号的任一边之间的时间由测量电路测量。 通过测量获得的时间是从要测量的脉冲信号的上升沿到下降沿或从下降沿到其上升沿的时间所花费的时间。

公开(公告)号：US6119250A

公开(公告)日：2000-09-12

申请号：US83389

申请日：1998-05-22

申请人： Kazuko Nishimura ,  Hironori Akamatsu ,  Akira Matsuzawa ,  Mitsuyasu Ohta

发明人： Kazuko Nishimura ,  Hironori Akamatsu ,  Akira Matsuzawa ,  Mitsuyasu Ohta

IPC分类号： G01R31/30 ,  G01R31/317 ,  G11C29/00

CPC分类号： G01R31/31701 ,  G01R31/3004

摘要： A test-target circuit is constructed of circuit blocks each comprising low-Vth MOS transistors including address buffers and a timing generator. A test enable signal for indication of a test, an operation selection signal for indication of an operation, and a block selection signal used to select a desired circuit block are provided. A high-Vth NMOS and a high-Vth PMOS transistor are provided in order to provide to a test circuit one of detected currents of the circuit blocks that was selected by placing a block selection signal and the test enable signal in the state of HIGH.

摘要翻译： 测试目标电路由包括地址缓冲器和定时发生器的低Vth MOS晶体管的电路块构成。 提供了用于指示测试的测试使能信号，用于指示操作的操作选择信号和用于选择期望的电路块的块选择信号。 提供高Vth NMOS和高Vth PMOS晶体管，以便向测试电路提供通过放置块选择信号和测试使能信号处于HIGH状态而选择的电路块的检测电流中的一个。

公开(公告)号：US6083785A

公开(公告)日：2000-07-04

申请号：US874911

申请日：1997-06-16

申请人： Mizuki Segawa ,  Toshiki Yabu ,  Akira Matsuzawa

发明人： Mizuki Segawa ,  Toshiki Yabu ,  Akira Matsuzawa

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/118 ,  H01L27/02

CPC分类号： H01L28/40 ,  H01L27/0629 ,  H01L27/118 ,  H01L28/10 ,  H01L28/20

摘要： An isolation is formed in a part of a P-well of a semiconductor substrate. A resistor film as a first conductor member is formed on the isolation. An insulating film covering the resistor film except for contact formation regions and an upper electrode film as a second conductor member are formed simultaneously with the formation of a gate electrode and a gate oxide film. Silicide films of a refractory metal are formed on the respective surfaces of the gate electrode, N-type high-concentration diffusion layers, the contact formation regions of the resistor film, and the upper electrode film. By utilizing a salicide process, a resistor and an inductor each occupying a small area can be formed without lowering the resistance of the resistor film. A capacitor, the resistor, and like component are selectively allowed to function.

摘要翻译： 在半导体衬底的P阱的一部分中形成隔离。 在隔离件上形成作为第一导体部件的电阻膜。 在形成栅极电极和栅极氧化膜的同时形成覆盖除了接触形成区域之外的电阻膜的绝缘膜和作为第二导体构件的上部电极膜。 在栅电极，N型高浓度扩散层，电阻膜的接触形成区域和上电极膜的各个表面上形成难熔金属的硅化物膜。 通过利用自对准硅化物工艺，可以形成每个占据小面积的电阻器和电感器，而不降低电阻膜的电阻。 选择性地允许电容器，电阻器等组件起作用。

公开(公告)号：US6025794A

公开(公告)日：2000-02-15

申请号：US792769

申请日：1997-02-03

申请人： Keiichi Kusumoto ,  Akira Matsuzawa ,  Kenji Murata ,  Youichi Okamoto

发明人： Keiichi Kusumoto ,  Akira Matsuzawa ,  Kenji Murata ,  Youichi Okamoto

IPC分类号： H03M1/12 ,  H03M1/14 ,  H03M1/36

CPC分类号： H03M1/1245 ,  H03M1/146 ,  H03M1/204 ,  H03M1/365

摘要： According to the present invention, a signal transmission circuit for receiving an input signal and outputting an output signal corresponding to the input signal is provided. The signal transmission circuit includes: a first capacitance; an electric charge supply section for supplying electric charge corresponding to the input signal to the first capacitance; a second capacitance; and a transfer section for transferring the electric charge from the first capacitance to the second capacitance. In the signal transmission circuit, the second capacitance is larger than the first capacitance.

摘要翻译： 根据本发明，提供一种用于接收输入信号并输出​​与输入信号对应的输出信号的信号传输电路。 信号传输电路包括：第一电容; 电荷供给部，用于将对应于所述输入信号的电荷提供给所述第一电容; 第二电容; 以及用于将电荷从第一电容转移到第二电容的转移部分。 在信号传输电路中，第二电容大于第一电容。

公开(公告)号：US5999022A

公开(公告)日：1999-12-07

申请号：US631914

申请日：1996-04-15

申请人： Toru Iwata ,  Hironori Akamatsu ,  Hisakazu Kotani ,  Hiroyuki Yamauchi ,  Akira Matsuzawa ,  Shoichiro Tada

发明人： Toru Iwata ,  Hironori Akamatsu ,  Hisakazu Kotani ,  Hiroyuki Yamauchi ,  Akira Matsuzawa ,  Shoichiro Tada

IPC分类号： H03K19/00 ,  H03K19/0185 ,  H03K3/00

CPC分类号： H03K19/01855 ,  H03K19/0016

摘要： A driver circuit which drives a signal line includes a first output section for outputting a reference voltage potential to the signal line during a first period and a second output section for outputting one of a first information voltage potential and a second information voltage potential in accordance with an input signal during a second period.

摘要翻译： 驱动信号线的驱动器电路包括：第一输出部，用于在第一时段期间向信号线输出参考电压电位;以及第二输出部，用于输出第一信息电压电位和第二信息电压电位之一 在第二时段期间的输入信号。

公开(公告)号：US5812626A

公开(公告)日：1998-09-22

申请号：US664218

申请日：1996-06-11

申请人： Keiichi Kusumoto ,  Akira Matsuzawa

发明人： Keiichi Kusumoto ,  Akira Matsuzawa

IPC分类号： G01R23/10 ,  G01R29/02 ,  G06F1/10 ,  G06F11/25 ,  H03K23/00 ,  H03K23/54 ,  H03M1/50 ,  H03M1/64

CPC分类号： G04F10/005 ,  G01R29/02 ,  G06F1/10 ,  G06F11/25

摘要： There is provided a time counting circuit which measures a pulse spacing of a pulse signal with a high accuracy and exhibits high resistance to variations in power-source voltage. A delay circuit ring consists of a plurality of delay circuits connected in a ring configuration and signal transition is caused to circulate around the delay circuit ring by oscillation. A switch-signal generating circuit outputs first and second switch signals based on the time at which a pulse signal to be measured rises. A row of sampling circuits consists of a plurality of sampling circuits connected to the output terminals of the respective delay circuits and samples the output signals from the delay circuits in response to a direction indicated by the first switch signal. A row of holding circuits consists of a plurality of holding circuits connected to the output terminals of the respective sampling circuits and holds the output signals from the sampling circuits in response to a direction indicated by the second switch signal. An operating circuit calculates the pulse spacing of the pulse signal to be measured based on a logic level signal outputted from the row of holding circuits.

摘要翻译： 提供了一种时间计数电路，其高精度地测量脉冲信号的脉冲间隔，并且对电源电压的变化表现出高的抵抗能力。 延迟电路环由以环形配置连接的多个延迟电路组成，并且使信号转变通过振荡在延迟电路环周围循环。 开关信号发生电路基于要测量的脉冲信号上升的时间输出第一和第二开关信号。 一行采样电路由连接到各个延迟电路的输出端的多个采样电路组成，并响应于第一开关信号指示的方向对来自延迟电路的输出信号进行采样。 一行保持电路由多个保持电路组成，多个保持电路连接到相应采样电路的输出端，并响应于第二开关信号指示的方向保持来自采样电路的输出信号。 操作电路基于从保持电路行输出的逻辑电平信号来计算要测量的脉冲信号的脉冲间隔。