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265 条记录 (耗时 0.025 秒)

    Integrated circuit to identify read disturb condition in memory cell
    84.
    发明授权
    Integrated circuit to identify read disturb condition in memory cell 有权
    用于识别存储器单元中的读取干扰状况的集成电路

    公开(公告)号：US07405964B2

    公开(公告)日：2008-07-29

    申请号：US11494190

    申请日：2006-07-27

    申请人： Jan Boris Philipp ,  Thomas Happ

    发明人： Jan Boris Philipp ,  Thomas Happ

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0033 ,  G11C16/3431

    摘要： A method of operating a phase change memory array is disclosed and includes identifying a read disturb condition associated with the phase change memory array, and performing a conditional refresh operation in response to the identified read disturb condition. A phase change memory is also disclosed and includes an array of phase change memory cells, and a read disturb system configured to identify a read disturb condition and perform a refresh operation on the array in response thereto.

    摘要翻译： 公开了一种操作相变存储器阵列的方法，包括识别与相变存储器阵列相关联的读取干扰条件，以及响应于所识别的读取干扰条件执行条件刷新操作。 还公开了相变存储器，并且包括相变存储器单元的阵列，以及被配置为识别读取干扰条件并响应于该阵列执行刷新操作的读取干扰系统。

    Integrated circuit having resistive memory
    85.
    发明授权
    Integrated circuit having resistive memory 有权
    具有电阻性存储器的集成电路

    公开(公告)号：US07372725B2

    公开(公告)日：2008-05-13

    申请号：US11204201

    申请日：2005-08-15

    申请人： Jan Boris Philipp ,  Thomas Happ

    发明人： Jan Boris Philipp ,  Thomas Happ

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0061 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0092

    摘要： A memory device including a memory cell, a first circuit, and a second circuit. The memory cell includes phase-change material. The first circuit is configured to provide pulses to the phase-change material and to program each of more than two states into the memory cell. The second circuit is configured to sense the present state of the memory cell and provide signals that indicate the present state of the memory cell. The first circuit programs each of the more than two states into the memory cell based on the signals.

    摘要翻译： 一种包括存储单元，第一电路和第二电路的存储器件。 存储单元包括相变材料。 第一电路被配置为向相变材料提供脉冲并将多于两个状态的每一个编程到存储器单元中。 第二电路被配置为感测存储器单元的当前状态并提供指示存储器单元的当前状态的信号。 第一电路基于信号将多于两个状态的每个状态编程到存储器单元中。

    Resistive memory cell accessed using two bit lines
    88.
    发明授权
    Resistive memory cell accessed using two bit lines 失效
    使用两条位线访问电阻式存储单元

    公开(公告)号：US08208294B2

    公开(公告)日：2012-06-26

    申请号：US12692044

    申请日：2010-01-22

    申请人： Thomas Happ ,  Jan Boris Philipp

    发明人： Thomas Happ ,  Jan Boris Philipp

    IPC分类号： G11C11/00

    CPC分类号： H01L45/1286 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144 ,  H01L45/1683

    摘要： An integrated circuit includes a first bit line and a resistance changing memory element coupled to the first bit line. The integrated circuit includes a second bit line and a heater coupled to the second bit line. The integrated circuit includes an access device coupled to the resistance changing memory element and the heater.

    摘要翻译： 集成电路包括耦合到第一位线的第一位线和电阻变化存储元件。 集成电路包括第二位线和耦合到第二位线的加热器。 集成电路包括耦合到电阻变化存储元件和加热器的存取装置。

    Integrated circuit including memory cell having cup-shaped electrode interface
    89.
    发明授权
    Integrated circuit including memory cell having cup-shaped electrode interface 有权
    集成电路包括具有杯形电极界面的存储单元

    公开(公告)号：US07888665B2

    公开(公告)日：2011-02-15

    申请号：US12195964

    申请日：2008-08-21

    申请人： Thomas Happ ,  Jan Boris Philipp

    发明人： Thomas Happ ,  Jan Boris Philipp

    IPC分类号： H01L29/02

    CPC分类号： H01L45/06 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  Y10S438/90

    摘要： An integrated circuit includes a first electrode and a cup-shaped electrode interface coupled to the first electrode. The integrated circuit includes a dielectric spacer at least partially laterally enclosed by the electrode interface and a resistance changing material laterally enclosed by the spacer and contacting the electrode interface. The integrated circuit includes a second electrode coupled to the resistance changing material.

    摘要翻译： 集成电路包括耦合到第一电极的第一电极和杯形电极接口。 集成电路包括至少部分地由电极界面包围的电介质间隔物和由间隔物侧向包围并与电极界面接触的电阻改变材料。 集成电路包括耦合到电阻变化材料的第二电极。