摘要:
Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises forming a gate electrode structure above a semiconducting substrate and forming a plurality of spacers proximate the gate electrode structures, wherein the plurality of spacers comprises a first silicon nitride spacer positioned adjacent a sidewall of the gate electrode structure, a generally L-shaped silicon nitride spacer positioned adjacent the first silicon nitride spacer, and a silicon dioxide spacer positioned adjacent the generally L-shaped silicon nitride spacer.
摘要:
A gate electrode structure may be formed on the basis of a silicon nitride cap material in combination with a very thin yet uniform silicon oxide based etch stop material, which may be formed on the basis of a chemically driven oxidation process. Due to the reduced thickness, a pronounced material erosion, for instance, during a wet chemical cleaning process after gate patterning, may be avoided, thereby not unduly affecting the further processing, for instance with respect to forming an embedded strain-inducing semiconductor alloy, while nevertheless providing the desired etch stop capabilities during removing the silicon nitride cap material.
摘要:
When forming sophisticated semiconductor-based gate electrode structures of transistors, the pre-doping of one type of gate electrode structure may be accomplished after the actual patterning of the electrode material by using an appropriate mask or fill material for covering the active regions and using a lithography mask. In this manner, a high degree of flexibility is provided with respect to selecting an appropriate patterning regime, while at the same time a uniform and superior cross-sectional shape for any type of gate electrode structure is obtained.
摘要:
Sophisticated gate electrode structures may be formed by providing a cap layer including a desired species that may diffuse into the gate dielectric material prior to performing a treatment for stabilizing the sensitive gate dielectric material. In this manner, complex high-k metal gate electrode structures may be formed on the basis of reduced temperatures and doses for a threshold adjusting species compared to conventional strategies. Moreover, a single metal-containing electrode material may be deposited for both types of transistors.
摘要:
In sophisticated semiconductor devices, a replacement gate approach may be applied, in which a channel semiconductor material may be provided through the gate opening prior to forming the gate dielectric material and the electrode metal. In this manner, specific channel materials may be provided in a late manufacturing stage for different transistor types, thereby providing superior transistor performance and superior flexibility in adjusting the electronic characteristics of the transistors.
摘要:
A buried gate electrode structures may be formed in the active regions of sophisticated transistors by providing a recess in the active region and incorporating appropriate gate materials, such as a high-k dielectric material and a metal-containing electrode material. Due to the recessed configuration, the channel length and thus the channel controllability may be increased, without increasing the overall lateral dimensions of the transistor structure.
摘要:
In sophisticated semiconductor devices, the contact structure may be formed on the basis of contact bars formed in a lower portion of an interlayer dielectric material, which may then be contacted by contact elements having reduced lateral dimensions so as to preserve a desired low overall fringing capacitance. The concept of contact bars of reduced height level may be efficiently combined with sophisticated replacement gate approaches.
摘要:
In a P-channel transistor comprising a high-k metal gate electrode structure, a superior dopant profile may be obtained, at least in the threshold adjusting semiconductor material, such as a silicon/germanium material, by incorporating a diffusion blocking species, such as fluorine, prior to forming the threshold adjusting semiconductor material. Consequently, the drain and source extension regions may be provided with a high dopant concentration as required for obtaining the target Miller capacitance without inducing undue dopant diffusion below the threshold adjusting semiconductor material, which may otherwise result in increased leakage currents and increased risk of punch through events.
摘要:
In sophisticated transistor elements, integrity of sensitive gate materials may be enhanced while, at the same time, the lateral offset of extension regions may be reduced. To this end, at least a portion of the extension regions may be implanted at an early manufacturing stage, i.e., in the presence of a protective liner material, which may, after forming the extension regions, be patterned into a protective spacer structure used for preserving integrity of the sensitive gate electrode structure.
摘要:
When forming sophisticated high-k metal gate electrode structures in an early manufacturing stage, the dielectric cap layer of the gate electrode structures may be efficiently removed on the basis of a carbon spacer element, which may thus preserve the integrity of the silicon nitride spacer structure. Thereafter, the sacrificial carbon spacer may be removed substantially without affecting other device areas, such as isolation structures, active regions and the like, which may contribute to superior process conditions during the further processing of the semiconductor device.