Abstract:
An apparatus for notification of a circuit switched event in a mobile station. The apparatus comprising a circuit switched modem, a packetized data modem and a radio. The circuit switched modem, configured to communicate circuit switched data over a circuit switched network. The packetized data modem, configured to communicate packetized data over a packetized data network. The radio, configured to couple the packetized data modem to the packetized data network via a packetized data radio link, and configured to couple the circuit switched modem to the circuit switched network via a circuit switched radio link, wherein said radio comprise one transmitter and two receivers.
Abstract:
A system and method for creating a localized silence area. A mobile device may be registered with an access point base station. Any direct communication links from the mobile device to any other base stations may be removed. An indication may be given to the mobile device that the mobile device is in a localized silence zone. The indication may include a request that the mobile device operate in a silent mode, information about making outgoing calls, information about receiving incoming calls, or a combination of these. Procedures for incoming voice calls to the mobile device may be different for different priority levels.
Abstract:
An electronic device for motion compensation is provided. The electronic device has a processing unit configured to perform a decoding program on a video bitstream to output decoding data, wherein the decoding data has a plurality of inter-prediction macroblocks, and the processing unit further generates a plurality of first pixel interpolation values according to the inter-prediction macroblocks which are smaller than a predetermined macroblock size. A motion compensation acceleration circuit is configured to generate a plurality of second pixel interpolation values according to the inter-prediction macroblocks which are larger than or equal to the predetermined macroblocks size, and generate a plurality of reconstructed macroblocks according to the first pixel interpolation values, the second pixel interpolation values, and a plurality of corresponding residue values.
Abstract:
An analog-to-digital converter with delta-sigma modulation and the modulation unit thereof are disclosed, wherein, for each modulation unit, a pair of input capacitors, a pair of integration capacitors and a differential feedback are operated in a swapping manner for the positive path and the negative path, such that circuit mismatch problems are effectively removed.
Abstract:
An acoustic processing apparatus is provided. The apparatus includes a pre-processing component, a filter and a first signal processing component. The pre-processing component compensates a non-linearity of a reference signal to generate an input signal. The filter coupled to the pre-processing component, the filter executes filtering on the input signal to generate an output signal. The first signal processing component, coupled to the pre-processing component, the reference signal obtains a gain from the first signal processing component to generate a first signal, and the first signal processing component passes the gain to the pre-processing component.
Abstract:
An analog-to-digital converter with delta-sigma modulation and the modulation unit thereof are disclosed, wherein, for each modulation unit, a pair of input capacitors, a pair of integration capacitors and a differential feedback are operated in a swapping manner for the positive path and the negative path, such that circuit mismatch problems are effectively removed.
Abstract:
A communication device wirelessly coupled to another communication device. The communication device includes a first transmitter and a first receiver. The first transmitter is configured to transmit first power control bit information to the base station over a reverse link. The first transmitter has a timeline manager, configured to transmit the first power control bit information at a first rate according to a first pattern within a frame. The first receiver is configured to receive second power control bit information from the another communication device over a forward link. The first receiver has an adaptive controller, configured to determine the first rate and the first pattern. The first rate and the first pattern are selected from a plurality of rates and patterns available for transmission of the first power control bit information and the second power control bit information.
Abstract:
An acoustic shock protection device includes a prediction gain estimator and an audio compressor. The prediction gain estimator is configured to analyze a plurality of linear prediction coefficients of an audio signal and determine a category of the audio signal. The audio compressor is coupled to the prediction gain estimator, and the audio compressor is configured to adjust a signal level of the audio signal according to the category of the audio signal.
Abstract:
An access node wirelessly coupled to a plurality of access terminals, having a subband scheduler, a plurality of orthogonal frequency division multiplex elements, and a plurality of antennas. The subband scheduler receives precoded data, and schedules transmission of a preamble signal and a plurality of data streams. The plurality of orthogonal frequency division multiplex elements converts the preamble signal and the plurality of data streams into a corresponding preamble tone and a corresponding plurality of data tones. The preamble tone indicates a mapping of the plurality of data tones to one or more of the plurality of access terminals. The plurality of antennas transmits the corresponding preamble tone and the corresponding plurality of data tones in timely fashion for receipt by the plurality of access terminals. The corresponding preamble tone and the corresponding data tones are transmitted over subbands of a code division multiple access (CDMA)-based carrier frequency.
Abstract:
A computing system is provided. A flash memory device includes at least one mapping block, at least one modification block and at least one cache block. A processor is configured to perform: receiving a write command with a write logical address and predetermined data, loading content of a cache page from the cache block corresponding to the modification block according to the write logical address to a random access memory device in response to that a page of the mapping block corresponding to the write logical address has been used, the processor, reading orderly the content of the cache page stored in the random access memory device to obtain location information of an empty page of the modification block, and writing the predetermined data to the empty page according to the location information. Each cache page includes data fields to store location information corresponding to the data has been written in the pages of the modification block in order.