Silicon single crystal wafer and production method thereof and soi wafer
    81.
    发明授权
    Silicon single crystal wafer and production method thereof and soi wafer 有权
    硅单晶晶片及其制造方法和硅晶片

    公开(公告)号:US06843847B1

    公开(公告)日:2005-01-18

    申请号:US09869912

    申请日:2000-11-07

    摘要: A silicon single crystal wafer grown by the CZ method, which is doped with nitrogen and has an N-region for the entire plane and an interstitial oxygen concentration of 8 ppma or less, or which is doped with nitrogen and has an interstitial oxygen concentration of 8 ppma or less, and in which at least void type defects and dislocation clusters are eliminated from the entire plane, and a method for producing the same. Thus, there are provided a defect-free silicon single crystal wafer having an N-region for the entire plane, in which void type defects and dislocation clusters are eliminated, produced by the CZ method under readily controllable stable production conditions with a wide controllable range, and a method producing the same.

    摘要翻译: 通过CZ方法生长的硅单晶晶片,其掺杂有氮并具有用于整个平面的N区和8ppma或更小的间隙氧浓度,或者掺杂有氮并且具有间隙氧浓度 8ppma以下,并且其中至少从整个平面除去空隙型缺陷和位错簇及其制造方法。 因此,提供了一种无缺陷的硅单晶晶片,其在具有宽的可控范围的容易控制的稳定生产条件下,通过CZ方法在整个平面上具有N区域,其中消除空隙型缺陷和位错簇 ,及其制造方法。

    Process for making non-uniform minority carrier lifetime distribution in high performance silicon power devices
    82.
    发明申请
    Process for making non-uniform minority carrier lifetime distribution in high performance silicon power devices 有权
    在高性能硅功率器件中制造不均匀少数载流子寿命分布的方法

    公开(公告)号:US20050006796A1

    公开(公告)日:2005-01-13

    申请号:US10911965

    申请日:2004-08-05

    申请人: Robert Falster

    发明人: Robert Falster

    摘要: A process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the segment. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.

    摘要翻译: 一种用于热处理单晶硅片段以影响片段中少数载流子复合中心轮廓的方法。 该段具有前表面,后表面和前表面和后表面之间的中心平面。 在该过程中,对该段进行热处理以形成晶格空位,该空位在大部分硅中形成。 然后将该段从所述热处理的温度以允许一些但不是全部晶格空位扩散到前表面的速率冷却,以产生具有空位浓度分布的区段,其中峰密度在 或靠近中心平面,其浓度通常在片段前表面的方向上减小。 铂原子然后扩散到硅基质中,使得所得的铂浓度分布基本上与晶格空位的浓度分布有关。

    Non-uniform minority carrier lifetime distributions in high performance silicon power devices
    83.
    发明授权
    Non-uniform minority carrier lifetime distributions in high performance silicon power devices 有权
    高性能硅功率器件的非均匀少数载流子寿命分布

    公开(公告)号:US06828690B1

    公开(公告)日:2004-12-07

    申请号:US09366850

    申请日:1999-08-04

    申请人: Robert J. Falster

    发明人: Robert J. Falster

    IPC分类号: H01L2974

    摘要: A process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the segment. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.

    摘要翻译: 一种用于热处理单晶硅片段以影响片段中少数载流子复合中心轮廓的方法。 该段具有前表面,后表面和前表面和后表面之间的中心平面。 在该过程中,对该段进行热处理以形成晶格空位,该空位在大部分硅中形成。 然后将该片段从所述热处理的温度以允许一些但不是全部晶格空位扩散到前表面的速率冷却,以产生具有空位浓度分布的部分,其中峰密度在 或靠近中心平面,其浓度通常在片段前表面的方向上减小。 铂原子然后扩散到硅基质中,使得所得的铂浓度分布基本上与晶格空位的浓度分布有关。

    Production method for anneal wafer and anneal wafer
    84.
    发明申请
    Production method for anneal wafer and anneal wafer 有权
    退火晶圆和退火晶圆的生产方法

    公开(公告)号:US20040231759A1

    公开(公告)日:2004-11-25

    申请号:US10482099

    申请日:2003-12-24

    IPC分类号: C22F001/00

    摘要: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100-1350null C. for 10-600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.

    摘要翻译: 本发明是一种退火晶片的制造方法,其中通过Czochralski(CZ)方法制造的直径为200mm以上的硅单晶晶片在氩气气氛中进行高温热处理, 氢气或其混合气体在1100-1350℃的温度下进行10-600分钟,在高温热处理之前,在低于高温热的温度下进行预退火 从而通过生长氧化物沉淀物来抑制滑移位错的生长。 因此,提供了一种制造退火晶片的方法,其中抑制了在高温热处理中产生的滑移位错的产生和生长,并且即使在硅单晶晶片的情况下晶片表面层中的缺陷密度也降低 具有大直径为200mm以上的退火晶片。

    Epitaxial wafer
    85.
    发明授权
    Epitaxial wafer 有权
    外延晶圆

    公开(公告)号:US06818197B2

    公开(公告)日:2004-11-16

    申请号:US10390941

    申请日:2003-03-18

    IPC分类号: C01B3326

    摘要: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.

    摘要翻译: 本发明的晶片是用于沉积外延层的电阻率为0.02Ω·cm以下的硅晶片,并且晶体起始粒子(COP)的数量和间隙型大位错环(L / D)的数量分别为 每片晶片为0〜10。 本发明的晶片是通过CVD方法在该晶片上形成的外延层的外延层的电阻率为0.1μΩ·m以上,厚度为0.5〜5μm的外延片。 当形成外延层时,本发明的晶片是无OSF的,并且几乎不产生COP和L / D的痕迹出现在外延层的表面上。 通过在形成外延层之后的半导体器件制造工艺中的热处理,BMD在晶片中的密度均匀且高度地发生,并且可以在晶片中获得均匀的IG效应。

    Evaluation method of IG effectivity in semiconductor silicon substrates
    88.
    发明授权
    Evaluation method of IG effectivity in semiconductor silicon substrates 有权
    半导体硅衬底中IG有效性的评估方法

    公开(公告)号:US06803242B2

    公开(公告)日:2004-10-12

    申请号:US10422847

    申请日:2003-04-25

    IPC分类号: H01L2166

    CPC分类号: H01L21/3225 H01L22/14

    摘要: In a conventional evaluation method of IG effectivity on Cu in semiconductor silicon substrates, it is required to actually conduct the device process, or a great deal of time, manpower and expenses for manufacturing a MOS device for dielectric breakdown estimation and the like are needed, but in the present invention, the problem was solved by experimentally finding in advance the optimum ranges of the diagonal length and density of oxygen precipitates which make the IG effectivity on Cu favorable, and conducting a heat treatment for the addition of IG effectivity based on a simulation by calculations using Fokker-Planck equations so that the diagonal length and density of plate-like precipitates fall within the optimum ranges.

    摘要翻译: 在半导体硅衬底中对IG有效性的传统评估方法中,需要实际进行器件工艺或大量时间用于制造用于介质击穿估计的MOS器件等的人力和费用, 但是在本发明中,通过实验性地发现使IG的有效性对Cu的对角线长度和密度的最佳范围有利地进行实验,并且进行热处理以基于 通过使用Fokker-Planck方程的计算进行模拟,使得板状沉淀物的对角线长度和密度落在最佳范围内。

    Method for manufacturing silicon wafer
    90.
    发明申请
    Method for manufacturing silicon wafer 有权
    硅晶片制造方法

    公开(公告)号:US20040023518A1

    公开(公告)日:2004-02-05

    申请号:US10332576

    申请日:2003-01-10

    摘要: Provided is a process for manufacturing a silicon wafer employing heat treatment which is applied on the silicon wafer in inert gas atmosphere represented by Ar annealing to annihilate Grown-in defects in a surface layer region of the silicon wafer as well as to cause no degradation of haze and micro-roughness on a surface thereof. In a process for manufacturing a silicon wafer having a step of heat treating the silicon wafer in inert gas atmosphere, using a purge box with which the silicon wafer heat treated in the inert gas atmosphere can be unloaded to outside a reaction tube of a heat treatment furnace without being put into contact with the open air, the purge box is filled with mixed gas of nitrogen and oxygen or 100% oxygen gas, and the heat treated silicon wafer is unloaded into the purge box.

    摘要翻译: 提供一种使用热处理制造硅晶片的方法,该硅晶片在由Ar退火表示的惰性气体气氛中施加在硅晶片上,以消除硅晶片的表面层区域中的生长缺陷,并且不会导致 其表面上的雾度和微观粗糙度。 在制造具有在惰性气体气氛中对硅晶片进行热处理的步骤的硅晶片的制造方法中,使用在惰性气体气氛中进行了热处理的硅晶片能够在热处理反应管外排出的清洗箱 在不与露天接触的情况下,将氮气和氧气或100%氧气的混合气体充满净化箱,将热处理后的硅晶片卸载到净化箱中。