公开(公告)号：US6128639A

公开(公告)日：2000-10-03

申请号：US174862

申请日：1998-10-19

申请人： Douglas M. Pase

发明人： Douglas M. Pase

IPC分类号： G06F7/52 ,  G06F7/535 ,  G06F7/44

CPC分类号： G06F7/535 ,  G06F2207/5356 ,  G06F7/49942

摘要： Division system and method support a hardware division address centrifuge to provide a flexible addressing scheme, and thus facilitates the reorganization and redistribution of data between remote and local memory blocks in a distributed memory massively parallel processing system. A flexible addressing scheme supports data organizations which can vary widely, depending on the processing task. Different data organizations in memory are supported by a PE internal address having certain bits designated as the target PE number and the remaining bits designating the offset within that PE's local memory. The PE and offset bits are distributed throughout the PE internal address to achieve various data distributions throughout memory. When a transfer occurs, the PE number bits and offset bits are separated via the centrifuge under control of a software-supplied mask. The centrifuge supports scatter-gather as well as constant-stride capabilities and is easily adaptable by the user to fit a wide variety of processing tasks.

摘要翻译： 分区系统和方法支持硬件分割地址离心机，提供灵活的寻址方案，从而便于在分布式存储器大规模并行处理系统中的远程和本地存储块之间的数据重组和重新分配。 灵活的寻址方案支持数据组织，其可以根据处理任务而变化很大。 具有指定为目标PE号码的某些比特的PE内部地址和指定该PE本地存储器内的偏移量的剩余比特来支持存储器中的不同数据组织。 PE和偏移位分布在整个PE内部地址中，以实现整个存储器中的各种数据分布。 当发生转移时，通过软件提供的掩码的控制下，PE号位和偏移位通过离心机分离。 离心机支持分散收集以及不断的跨步功能，并且易于适应用户以适应各种各样的处理任务。

公开(公告)号：US6029212A

公开(公告)日：2000-02-22

申请号：US6449

申请日：1998-01-13

申请人： Richard E. Kessler ,  Steven M. Oberlin ,  Steven L. Scott ,  Eric C. Fromm

发明人： Richard E. Kessler ,  Steven M. Oberlin ,  Steven L. Scott ,  Eric C. Fromm

IPC分类号： G06F9/30 ,  G06F9/318 ,  G06F9/355 ,  G06F12/02 ,  G06F13/14 ,  G06F15/163

CPC分类号： G06F9/342 ,  G06F12/0292 ,  G06F9/3004 ,  G06F9/30101 ,  G06F9/30134 ,  G06F9/30138 ,  G06F9/30167 ,  G06F9/30189 ,  G06F9/3861

摘要： A system and method of accessing a memory location within a system having a processor and a plurality of memory locations separate from the processor. The system includes a plurality of external registers which are connected to the processor over a data bus, address translation means, connected to the processor over the data bus and an address bus, for calculating, based on an index written to the data bus, an address associated with one of the memory locations, and transfer means, connected to the plurality of external registers, for transferring data between the addressed memory location and one of the external registers.

摘要翻译： 一种访问具有处理器和与处理器分离的多个存储器位置的系统内的存储器位置的系统和方法。 该系统包括通过数据总线连接到处理器的多个外部寄存器，通过数据总线连接到处理器的地址转换装置和地址总线，用于基于写入数据总线的索引来计算 连接到多个外部寄存器的传送装置，用于在寻址的存储器位置和外部寄存器之一之间传送数据。

公开(公告)号：US5987626A

公开(公告)日：1999-11-16

申请号：US920177

申请日：1997-08-25

申请人： Terry D. Greyzck

发明人： Terry D. Greyzck

IPC分类号： G06F11/36 ,  G06F11/00

CPC分类号： G06F11/3648

摘要： The precise detection of errors in computer programs using the hardware watchpoint mechanism found in computers is disclosed. In one embodiment, a software detection phase of a method detects the approximate location of an error, generating information regarding this approximate location. In this embodiment, a hardware watchpoint phase of the method detects the precise location of the error based on the information generated by the software detection phase, generating information regarding the precise location. Finally, in this embodiment of the invention, a debugger phase of the method identifies the statement in the computer program causing the error, based on the information generated by the hardware watchpoint phase.

摘要翻译： 公开了使用在计算机中发现的硬件观察点机制的计算机程序中的错误的精确检测。 在一个实施例中，方法的软件检测阶段检测错误的大致位置，产生关于该近似位置的信息。 在该实施例中，该方法的硬件观察点阶段基于由软件检测阶段产生的信息来检测错误的精确位置，产生关于精确位置的信息。 最后，在本发明的该实施例中，该方法的调试器阶段基于由硬件观察点阶段产生的信息来识别导致错误的计算机程序中的语句。

公开(公告)号：US5963428A

公开(公告)日：1999-10-05

申请号：US136908

申请日：1998-08-20

申请人： Richard B. Salmonson ,  Stephen Cermak, III

发明人： Richard B. Salmonson ,  Stephen Cermak, III

IPC分类号： H01L23/04 ,  H01L23/40 ,  H05K7/20

CPC分类号： H01L23/4006 ,  H01L23/04 ,  H01L2023/4062 ,  H01L2023/4087 ,  H01L2924/0002

摘要： The present invention discloses a method and apparatus for bridging the gap between an integrated circuit package or component mounted on a circuit board and a heat sink such that there is little stress placed on the component, but there is still a connection between the component and the heat sink for dissipation of heat. The invention provides mechanical integrity for delicate component packages, and in doing so allows for the use of a variety of heat sinks to provide cooling. A printed circuit board has integrated circuit packages or other components mounted to the circuit board. A cooling cap comprised of a thermally conductive material is mounted on the circuit board, such that the component is enveloped by the circuit board and cooling cap. A layer of thermally conductive material may be deposited between the component and the cooling cap to provide a thermally conductive path from the component to the cooling cap. Risers, which may be either integral to the cooling cap or separate elements, are used to lift the cooling cap above the surface of the circuit board so as to provide space for the component.

摘要翻译： 本发明公开了一种用于桥接安装在电路板上的集成电路封装或部件与散热器之间的间隙的方法和装置，使得部件上施加的应力很小，但是部件和 散热用于散热。 本发明为精密部件包装提供机械完整性，并且在这样做时允许使用各种散热器来提供冷却。 印刷电路板具有安装到电路板的集成电路封装或其它部件。 由导热材料构成的冷却盖安装在电路板上，使得部件被电路板和冷却盖包围。 可以在部件和冷却帽之间沉积导热材料层，以提供从部件到冷却帽的导热路径。 可以将冷却帽或分离元件整体的升降器用于将冷却帽提升到电路板的表面之上，以便为部件提供空间。

公开(公告)号：US5841973A

公开(公告)日：1998-11-24

申请号：US615694

申请日：1996-03-13

申请人： Richard E. Kessler ,  Steven M. Oberlin ,  Steven L. Scott

发明人： Richard E. Kessler ,  Steven M. Oberlin ,  Steven L. Scott

IPC分类号： G06F15/173 ,  G06F13/38 ,  G06F15/16

CPC分类号： G06F15/17381

摘要： A messaging facility in a multiprocessor computer system includes assembly circuitry in a source processing element for assembling a message to be sent from the source processing element to a destination processing element based on information provided from a processor in the source processing element. A network router transmits the assembled message from the source processing element to the destination processing element via an interconnect network. A message queue in a local memory of the destination processing element stores the transmitted message. A control word stored in the local memory of the destination processing element includes a limit field designating a size of the message queue and a tail field designating an index into the corresponding message queue to indicate a location in the message queue where the transmitted message is to be stored. Shell circuitry in the destination processing element atomically reads and updates the tail field.

摘要翻译： 多处理器计算机系统中的消息传递设备包括源处理元件中的组装电路，用于根据源处理元件中的处理器提供的信息来组装要从源处理元件发送到目的地处理元件的消息。 网络路由器经由互连网络将组合的消息从源处理元件发送到目的地处理元件。 目的地处理元件的本地存储器中的消息队列存储发送的消息。 存储在目的地处理元件的本地存储器中的控制字包括指定消息队列的大小的限制字段和指定对应消息队列中的索引的尾部字段，以指示消息队列中发送的消息所在的位置 存储。 目标处理元件中的Shell电路原子地读取和更新尾部字段。

公开(公告)号：US5802375A

公开(公告)日：1998-09-01

申请号：US344236

申请日：1994-11-23

申请人： Viet N. Ngo ,  Wei-Tek Tsai

发明人： Viet N. Ngo ,  Wei-Tek Tsai

IPC分类号： G06F9/45

CPC分类号： G06F8/452

摘要： A system and method for vectorizing a non-innermost loop of a nested loop. Iterative loops of a nested loop are analyzed to determine if they can be vectorized (vector legality). If more than one iterative loop can be vectorized, a selection criteria is applied to select the iterative loop which would provide the most return from vectorization (vector selection).

摘要翻译： 用于向量化嵌套循环的非最内循环的系统和方法。 分析嵌套循环的迭代循环以确定它们是否可以向量化（向量合法性）。 如果多个迭代循环可以向量化，则应用选择标准来选择迭代循环，该循环将提供向量化（向量选择）的最大回报。

公开(公告)号：US5761043A

公开(公告)日：1998-06-02

申请号：US604839

申请日：1996-02-22

申请人： Richard B. Salmonson

发明人： Richard B. Salmonson

IPC分类号： H05K7/20

CPC分类号： H05K7/20636

摘要： A daughter card assembly which provides relatively high conductive heat transfer from the electronic components on the daughter board to either an air or liquid cooled cold plate of a computer circuit module. The daughter card assembly has a daughter board with a plurality of electronic elements carried on an element side of the board. The opposite side of the board is a cooling side. The daughter board has one or more sockets which are electrically connected to the electronic elements on the board. The socket is adapted to plug into a connector carried on a mother board of a circuit module. A thermally conductive plate is disposed adjacent to and in thermal conductive contact with the cooling side of the daughter board. The conductive plate has an inner side facing the circuit module and an outer side on the opposite side. The plate is adapted to be in thermal conductive contact with the module cold plate to dissipate heat generated by the memory elements. Preferably, the conductive plate is sandwiched between the cooling sides of a pair of daughter boards with one board abutting against the inner side and the other board abutting against the outer side of the plate.

摘要翻译： 子卡组件，其提供从子板上的电子部件到计算机电路模块的空气或液体冷却的冷板的相对高的导电热传递。 子卡组件具有在板的元件侧承载的多个电子元件的子板。 板的相对侧是冷却侧。 子板具有一个或多个插座，其电连接到电路板上的电子元件。 插座适于插入电路模块母板上的连接器。 导热板设置成与子板的冷却侧相邻并与其导热接触。 导电板具有面向电路模块的内侧和相对侧的外侧。 板适于与模块冷板导热接触以消散由存储元件产生的热量。 优选地，导电板被夹在一对子板的冷却侧之间，其中一个板抵靠内侧，而另一个板抵靠板的外侧。

公开(公告)号：US5696922A

公开(公告)日：1997-12-09

申请号：US165388

申请日：1993-12-10

申请人： Eric C. Fromm

发明人： Eric C. Fromm

IPC分类号： G06F7/76 ,  G06F12/06 ,  G06F15/173 ,  G06F15/80 ,  G06F12/00

CPC分类号： G06F15/8007 ,  G06F12/0692 ,  G06F15/17381 ,  G06F7/762

摘要： A method for extracting a PE number and offset from an array index by recursive centrifuging. According to one aspect of the present invention, a processing element number is assigned to each processing element, a local memory address is assigned to each memory location and a linearized index is assigned to each array element in a multidimensional array. The processing element number of the processing element in which a particular array element is stored is computed as a function of a linearized index associated with the array element and a mask word determined from the distribution specification associated with the array. The mask word is generated from the distribution specification and applied to a linearized index associated with a particular array element to obtain processing element number bits and local offset bits. The processing element number bits and local offset bits are then accumulated to create the processing element number and local offset for the memory location associated with the array element.

摘要翻译： 通过递归离心提取PE数和从数组索引偏移的方法。 根据本发明的一个方面，处理单元编号被分配给每个处理单元，将局部存储器地址分配给每个存储器单元，并且线性化索引被分配给多维阵列中的每个阵列元素。 作为与阵列元素相关联的线性化索引和从与阵列相关联的分布规范确定的掩码字的函数来计算其中存储特定数组元素的处理元件的处理元件号。 掩模字从分布规范生成并应用于与特定数组元素相关联的线性化索引，以获得处理元素数位和局部偏移位。 然后累积处理元件数位和局部偏移位以产生与数组元素相关联的存储器位置的处理元件号和本地偏移。

公开(公告)号：US5694028A

公开(公告)日：1997-12-02

申请号：US650337

申请日：1996-05-20

申请人： Richard B. Salmonson ,  Robert J. Greener ,  Mark Ronald Sikkink ,  Robert J. Lutz ,  Max C. Logan ,  Richard G. Finstad

发明人： Richard B. Salmonson ,  Robert J. Greener ,  Mark Ronald Sikkink ,  Robert J. Lutz ,  Max C. Logan ,  Richard G. Finstad

IPC分类号： G05F1/46 ,  G05F1/44

CPC分类号： G05F1/465

摘要： A method and apparatus for adjusting power supplied to a device when the device has a first and a second power input. A first voltage level and a ground potential are provided and a second voltage level is created as a function of the first voltage level. The second voltage level is then buffered with a power transistor and, if the second voltage level is needed for a particular device, the buffered second voltage level is selectively applied to the device. The circuit is disabled when the second voltage supply is not needed.

摘要翻译： 一种用于当所述设备具有第一和第二功率输入时调整供应给设备的功率的方法和设备。 提供第一电压电平和接地电位，并且产生作为第一电压电平的函数的第二电压电平。 然后用功率晶体管缓冲第二电压电平，并且如果特定器件需要第二电压电平，则将缓冲的第二电压电平选择性地施加到器件。 当不需要第二个电源时，电路被禁止。

公开(公告)号：US5692123A

公开(公告)日：1997-11-25

申请号：US350648

申请日：1994-12-07

申请人： Peter G. Logghe

发明人： Peter G. Logghe

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/273 ,  G06F15/173 ,  G06F15/177

CPC分类号： G06F15/17343 ,  G06F11/0709 ,  G06F11/0763 ,  G06F11/2033 ,  G06F11/2736

摘要： A maintenance channel for modular computer system reset, configuration, partitioning, and error communication. The maintenance channel includes a sanity code channel to ensure module functionality. The maintenance channel configures the computer system and issues commands to modules using a command channel. Error detection and diagnostics are performed using an error channel. The maintenance channel provides independent processing groups within one computer system, and allows for partial powerdown or isolation of portions of the system without affecting operations in the active portions of the computer system.

摘要翻译： 模块化计算机系统复位，配置，分区和错误通信的维护通道。 维护通道包括确保模块功能的理性代码通道。 维护通道配置计算机系统，并使用命令通道向模块发出命令。 使用错误通道执行错误检测和诊断。 维护通道在一个计算机系统内提供独立的处理组，并允许系统的部分断电或隔离，而不影响计算机系统的有效部分中的操作。