公开(公告)号：US10549476B2

公开(公告)日：2020-02-04

申请号：US14345681

申请日：2012-09-22

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： Emanuel M. Sachs ,  Peter E. Kane ,  Holly G. Gates ,  Damian W. Harris ,  Benjamin F. Polito ,  Hector A. Inirio

IPC: G03F7/00 ,  B29C59/02

Abstract: A workpiece is transported using a porous belt, which belt delivers a workpiece to a chuck, upon which the workpiece is held by vacuum. The belt can be porous PTFE. A flexible stamp is preheated, before it is applied to a workpiece, by drawing the stamp toward a heated plate, for instance by vacuum.

公开(公告)号：US10439095B2

公开(公告)日：2019-10-08

申请号：US15546030

申请日：2015-10-14

Applicant: 1366 TECHNOLOGIES INC.

Inventor： Ralf Jonczyk ,  Brian D. Kernan ,  G. D. Stephen Hudelson ,  Adam M. Lorenz ,  Emanuel M. Sachs

IPC: H01L21/00 ,  H01L31/18 ,  H01L31/0224 ,  H01L31/068 ,  H01L31/056 ,  H01L31/0216 ,  H01L31/0288 ,  C30B29/06 ,  C30B28/04 ,  C30B19/12 ,  C30B35/00 ,  C30B31/04 ,  C30B11/00 ,  C30B31/02

Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant cannot enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.

公开(公告)号：US20210288207A1

公开(公告)日：2021-09-16

申请号：US17202023

申请日：2021-03-15

Applicant: 1366 TECHNOLOGIES INC.

Inventor： Ralf JONCZYK ,  Patrick MCMAHON

IPC: H01L31/18

Abstract: A method includes etching silicon using a mixture of nitric acid and hydrofluoric acid in which less than 6 mols of hydrofluoric acid is used to etch one mol of silicon. The etching may be conducted at an elevated temperature, such as a temperature of at least 70 degrees Celsius.

公开(公告)号：US20150037923A1

公开(公告)日：2015-02-05

申请号：US14370321

申请日：2013-01-06

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： Vladimir S. Tarasov ,  Ali Ersen ,  ERIC Stern ,  Jason M. Criscione ,  Emanuel M. Sachs

IPC: H01L31/0236 ,  H01L31/0248

CPC classification number: H01L31/02363 ,  H01L31/0248 ,  Y02E10/50

Abstract: Processes increase light absorption into silicon wafers by selectively changing the reflective properties of the bottom portions of light trapping cavity features. Modification of light trapping features includes: deepening the bottom portion, increasing the curvature of the bottom portion, and roughening the bottom portion, all accomplished through etching. Modification may also be by the selective addition of material at the bottom of cavity features. Different types of features in the same wafers may be treated differently. Some may receive a treatment that improves light trapping while another is deliberately excluded from such treatment. Some may be deepened, some roughened, some both. No alignment is needed to achieve this selectively. The masking step achieves self-alignment to previously created light trapping features due to softening and deformation in place.

Abstract translation: 通过选择性地改变光阱特征的底部的反射特性，工艺增加了对硅晶片的光吸收。 光捕获特征的改进包括：深化底部部分，增加底部部分的曲率，以及粗糙化底部部分，全部通过蚀刻来实现。 修改也可以通过在腔体特征的底部选择性地添加材料。 不同类型的相同晶片中的特征可以被不同地对待。 有些可能会接受改善光线捕获的治疗方法，而另一种方法被故意排除在这种治疗之外。 有些可能会加深，有些粗糙，有的两个。 不需要对准以选择性地实现。 掩蔽步骤由于在现场的软化和变形而实现了先前产生的光捕获特征的自对准。

公开(公告)号：US20140255615A1

公开(公告)日：2014-09-11

申请号：US14349087

申请日：2012-10-12

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： Guy M. Danner ,  Vladimir S. Tarasov ,  Peter E. Kane ,  Peter G. Madden ,  Holly G. Gates ,  Emanuel M. Sachs

IPC: B05B5/00 ,  B05D1/06

CPC classification number: B05B5/001 ,  B05B5/005 ,  B05B5/087 ,  B05B7/0012 ,  B05B12/16 ,  B05B13/02 ,  B05D1/04 ,  B05D1/06 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/6715 ,  H01L21/6776

Abstract: The present inventions relate to the formation of a thin polymer film on a substrate. Apparatus is described for transforming a solid polymer resist into an aerosol of small particles, electrostatically charging and depositing the particles onto a substrate, and flowing the particles into a continuous layer. Apparatus is further described for transforming solid resist into an aerosol of small particles by heating the resist to form a low viscosity liquid such as is compatible with nebulization and applying the techniques of jet or impact nebulization and aerosol particle sizing to form the aerosol. A method is further described of using ionized gas to confer charge onto the aerosol particles and using a progression of charging devices establish an electric field directing the flow of charged particles to the substrate. The progression of charging devices and associated apparatus results in high collection efficiency for the aerosol particles.

Abstract translation: 本发明涉及在基材上形成薄聚合物膜。 描述了用于将固体聚合物抗蚀剂转化成小颗粒气溶胶的装置，将颗粒静电充电并沉积到基底上，并将颗粒流入连续层。 进一步描述了将固体抗蚀剂转化为小颗粒气溶胶的装置，通过加热抗蚀剂以形成与雾化相容的低粘度液体，并应用喷射或冲击雾化和气溶胶颗粒尺寸的技术以形成气溶胶。 进一步描述了使用电离气体将电荷赋予气溶胶颗粒的方法，并且使用充电装置的进展建立了将带电粒子流引导到基底的电场。 充电装置和相关设备的进展导致气溶胶颗粒的高收集效率。

公开(公告)号：US11562920B2

公开(公告)日：2023-01-24

申请号：US16757497

申请日：2018-10-23

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： Robertus Antonius Steeman

IPC: H01L21/67 ,  H01L21/673 ,  B65G47/90 ,  H01L21/677 ,  H01L31/0352 ,  H01L31/18

Abstract: A semiconductor wafer is as wide as the industry standard width A (presently 156 mm+/−1 mm) and is longer than the industry standard A by at least 1 mm and as much as the standard equipment can reasonably accommodate, presently approximately 3-20 mm and potentially longer, thus, gaining significant additional surface area for sunlight absorption. Modules may be composed of a plurality of such larger wafers. Such wafers can be processed in conventional processing equipment that has a wafer retaining portion of industry standard size A and a configuration that also accommodates a wafer with a perpendicular second edge longer than A by at least 1 and typically 3-20 mm. Wet bench carriers and transport and inspection stations can be so used.

公开(公告)号：US20190393375A1

公开(公告)日：2019-12-26

申请号：US16559971

申请日：2019-09-04

Applicant: 1366 TECHNOLOGIES INC.

Inventor： RALF JONCZYK ,  BRIAN D. KERNAN ,  G.D. STEPHEN HUDELSON ,  ADAM M. LORENZ ,  EMANUEL M. SACHS

IPC: H01L31/18 ,  H01L31/0224 ,  H01L31/056 ,  H01L31/0216 ,  H01L31/0288

Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.

公开(公告)号：US20180119309A1

公开(公告)日：2018-05-03

申请号：US15566785

申请日：2016-04-28

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： RALF JONCZYK ,  RICHARD L WALLACE ,  DAVID S HARVEY

IPC: C30B35/00 ,  C30B29/06

CPC classification number: C30B35/007 ,  C30B11/08 ,  C30B15/10 ,  C30B29/06 ,  C30B29/08 ,  C30B35/002

Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.

公开(公告)号：US08696810B2

公开(公告)日：2014-04-15

申请号：US13654638

申请日：2012-10-18

Applicant: 1366 Technologies Inc.

Inventor： Eerik T. Hantsoo ,  G. D. Stephen Hudelson ,  Ralf Jonczyk ,  Adam M. Lorenz ,  Emanuel M. Sachs ,  Richard L. Wallace

IPC: C30B15/22

CPC classification number: B29C33/44 ,  C30B11/007 ,  C30B15/30 ,  C30B19/068 ,  C30B28/04 ,  C30B29/06

Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.

Abstract translation: 在模板上施加压差，在其上形成半导体（例如硅）晶片（例如，用于太阳能电池）。 压差的放松允许晶片的释放。 模具片可以比熔体更冷。 几乎完全通过成形晶片的厚度提取热量。 液体和固体界面基本上平行于模片。 凝固体的温度在其宽度上基本均匀，导致低应力和位错密度和更高的晶体学质量。 模板必须允许气体流过它。 可以通过以下方式将熔体引入片材：与熔体的顶部完全区域接触; 穿过熔体与模板的部分区域接触，无论是水平还是垂直的，或者在其间; 并将模具浸入熔体中。 可以通过许多方法控制晶粒尺寸。

公开(公告)号：US20130036967A1

公开(公告)日：2013-02-14

申请号：US13654638

申请日：2012-10-18

Applicant: 1366 TECHNOLOGIES INC.

Inventor： Emanuel M. Sachs ,  Richard L. Wallace ,  Eerik T. Hantsoo ,  Adam M. Lorenz ,  G.D. Stephen Hudelson ,  Ralf Jonczyk

IPC: C30B11/02

CPC classification number: B29C33/44 ,  C30B11/007 ,  C30B15/30 ,  C30B19/068 ,  C30B28/04 ,  C30B29/06

Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.

Abstract translation: 在模板上施加压差，在其上形成半导体（例如硅）晶片（例如，用于太阳能电池）。 压差的放松允许晶片的释放。 模具片可以比熔体更冷。 几乎完全通过成形晶片的厚度提取热量。 液体和固体界面基本上平行于模片。 凝固体的温度在其宽度上基本均匀，导致低应力和位错密度和更高的晶体学质量。 模板必须允许气体流过它。 可以通过以下方式将熔体引入片材：与熔体的顶部完全区域接触; 穿过熔体与模板的部分区域接触，无论是水平还是垂直的，或者在其间; 并将模具浸入熔体中。 可以通过许多方法控制晶粒尺寸。