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    TRANSISTOR DEVICES WITH MULTI-LAYER INTERLAYER DIELECTRIC STRUCTURES
    1.
    发明申请
    TRANSISTOR DEVICES WITH MULTI-LAYER INTERLAYER DIELECTRIC STRUCTURES 有权

    公开(公告)号：US20250169116A1

    公开(公告)日：2025-05-22

    申请号：US19029403

    申请日：2025-01-17

    Applicant: Applied Materials, Inc.

    Inventor： Yun-Chu Tsai ,  Dejiu Fan ,  Jung Bae Kim ,  Yang Ho Bae ,  Rodney Shunleong Lim ,  Dong Kil Yim

    IPC: H10D30/67 ,  H10D30/01

    Abstract: A method includes forming a first dielectric layer of an interlayer dielectric (ILD) structure of a transistor device, wherein forming the first dielectric layer includes forming a first sublayer including a first dielectric material on a gate structure and forming a second sublayer including the first dielectric material on the first sublayer, wherein forming the first sublayer includes depositing the first dielectric material of the first sublayer at a first deposition rate, and wherein forming the second sublayer includes depositing the first dielectric material of the second sublayer at a second deposition rate less than the first deposition rate, and forming a second dielectric layer of the ILD structure by forming a third sublayer including a second dielectric material on the first dielectric layer using a third deposition rate, wherein the second dielectric material is different from the first dielectric material.

    MULTIZONE COATED VACUUM CHUCK FOR IR MEASUREMENT
    4.
    发明申请
    MULTIZONE COATED VACUUM CHUCK FOR IR MEASUREMENT 有权

    公开(公告)号：US20250167036A1

    公开(公告)日：2025-05-22

    申请号：US18516849

    申请日：2023-11-21

    Applicant: Applied Materials, Inc.

    Inventor： Sanjay BHAT

    IPC: H01L21/683 ,  H01L21/68 ,  H01L21/687

    Abstract: Embodiments of chuck plates for a substrate support are provided herein. In some embodiments, the chuck plate includes an upper surface defining a support surface for a substrate and having a coating comprising a material with less reflectivity than a base material of the chuck plate, wherein the upper surface includes a plurality of vacuum grooves, wherein the plurality of vacuum grooves are arranged in a plurality of zones that are fluidly independent from each other along the upper surface and fluidly coupled to a common vacuum port disposed at a lower surface of the chuck plate.

    PATTERNING PROCESSES UTILIZING DIRECTIONAL DEPOSITION
    5.
    发明申请
    PATTERNING PROCESSES UTILIZING DIRECTIONAL DEPOSITION 有权

    公开(公告)号：US20250167001A1

    公开(公告)日：2025-05-22

    申请号：US18912134

    申请日：2024-10-10

    Applicant: Applied Materials, Inc.

    Inventor： Tong LIU ,  Sony VARGHESE ,  Madhur Singh SACHAN ,  Keiichi NAKAZAWA ,  Zhiyu HUANG

    IPC: H01L21/308 ,  H01L21/311

    Abstract: A method of forming a pattern in a device structure formed on a substrate includes forming one or more patterning layers over a surface of a device structure formed on the substrate, forming patterning features in the one or more patterning layers, depositing a non-conformal film layer over a surface of the one or more patterning layers and the patterning features, and etching a portion of a device feature of the plurality of device features that is exposed within each film layer opening formed within the patterning features. Each of the patterning features are disposed over at least a portion of a device feature of a plurality of device features, and each of the patterning features comprise a feature opening that comprises a first critical dimension (CD) that is greater than the first lateral dimension.

    PLASMA SHOWERHEAD ASSEMBLY AND METHOD OF REDUCING DEFECTS
    6.
    发明申请
    PLASMA SHOWERHEAD ASSEMBLY AND METHOD OF REDUCING DEFECTS 有权

    公开(公告)号：US20250166973A1

    公开(公告)日：2025-05-22

    申请号：US18813855

    申请日：2024-08-23

    Applicant: Applied Materials, Inc.

    Inventor： Rohit Ode ,  Sanjeev Baluja ,  Kenneth Brian Doering ,  Kevin Griffin ,  Hanhong Chen

    IPC: H01J37/32

    Abstract: Plasma showerhead assemblies are disclosed comprising a conductive plate having a plurality of the conductive plate gas openings, a dielectric faceplate having a thickness and a plurality of dielectric faceplate gas openings extending through the dielectric faceplate thickness in fluid communication with the plurality of the conductive plate gas openings. A plurality of tri-lobed o-rings surrounding the conductive plate gas openings and the dielectric faceplate gas openings are configured to form a seal between the dielectric faceplate gas openings and the conductive plate gas openings from atmospheric pressure.

    SELECTIVE FEATURE MODIFICATION USING DIRECTIONAL DEPOSITION
    9.
    发明申请
    SELECTIVE FEATURE MODIFICATION USING DIRECTIONAL DEPOSITION 有权

    公开(公告)号：US20250157815A1

    公开(公告)日：2025-05-15

    申请号：US18510630

    申请日：2023-11-15

    Applicant: Applied Materials, Inc.

    Inventor： Tassie ANDERSEN ,  Shurong LIANG

    IPC: H01L21/02 ,  C23C14/22 ,  H01J37/32 ,  H01L21/3065

    Abstract: Disclosed herein are approaches for using angle control of deposition plus etch processes to enable 2D and/or 3D device patterning. In one approach, a method may include providing a substrate including a plurality of trenches having different dimensions, and depositing a film atop the substrate. The film may be delivered at a non-zero angle relative to a perpendicular extending from a top surface of the substrate, wherein an amount of the film formed along a bottom surface of a first trench is greater than an amount of the film formed along a bottom surface of a second trench. The method may further include delivering ions into the substrate in a reactive ion etching process to remove material from at least one of: the first sidewall of the first trench, the bottom surface of the second trench, and the film.

    APPARATUS AND METHOD OF DAMAGE MITIGATION AND STEP COVERAGE ENHANCEMENT
    10.
    发明申请
    APPARATUS AND METHOD OF DAMAGE MITIGATION AND STEP COVERAGE ENHANCEMENT 有权

    公开(公告)号：US20250157790A1

    公开(公告)日：2025-05-15

    申请号：US18926504

    申请日：2024-10-25

    Applicant: Applied Materials, Inc.

    Inventor： Bencherki MEBARKI ,  Sang-Heum KIM ,  Joung Joo LEE

    IPC: H01J37/32 ,  C23C14/34 ,  C23C14/35

    Abstract: Embodiments described herein provide an apparatus and method for fabricating semiconductor devices with improved process control and performance. The apparatus includes a processing chamber with first and second RF coil assemblies generating primary and secondary plasmas in distinct regions, along with first and second electromagnet assemblies for independent magnetic field control. A removable biasable flux optimizer is disposed in the apparatus to modulate plasma distribution and directionality. The method involves a three-step sequence comprising Inductive coupled plasma (IMP) low energy deposition, deposition for enhanced step coverage, and etching for overhang removal. The ICP deposition utilizes primary and secondary plasmas generated by the RF coil assemblies, with intensified collisions achieved through chamber pressure increase. Additionally, a simultaneous deposition and etching process can be employed, with optional additional etching steps for improved overhang removal.

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