公开(公告)号：US6061648A

公开(公告)日：2000-05-09

申请号：US30910

申请日：1998-02-26

Applicant: Akitoshi Saito

Inventor： Akitoshi Saito

IPC: G10L19/08 ,  G10L11/04 ,  G10L19/00 ,  G10L19/04 ,  G10L19/12 ,  G10L21/02 ,  H03M7/30 ,  G10L15/20

CPC classification number: G10L21/028 ,  G10L19/00 ,  G10L19/09 ,  G10L21/0264

Abstract: In a speech coding apparatus, an input device inputs a mixed speech signal of a plurality of speakers. A separating device analyzes period characteristics of the input mixed speech signal, and separates the same signal into a plurality of single speech signals each associated with a corresponding one of the speakers, based on a result of the analysis. A first extracting device extracts source speech characteristic parameters included in each of the single speech signals. A second extracting device extracts a generic vocal-tract characteristic parameter from the input mixed speech signal. In a speech decoding apparatus, a first input device inputs the source speech characteristic parameters for each of the speakers. A second input device inputs the vocal-tract characteristic parameter. A source speech decoder decodes source speech signals of the respective speakers, based on the source speech characteristic parameters for the speakers and forms a source speech signal for the speakers by synthesizing the decoded source speech signals of the respective speakers. A vocal-tract filter filters the source speech signal for the speakers, based on the generic vocal-tract characteristic parameter, so as to decode a mixed speech signal indicative of mixed speech of the speakers.

Abstract translation: 在语音编码装置中，输入装置输入多个扬声器的混合语音信号。 分离装置分析输入的混合语音信号的周期特性，并且基于分析的结果将相同的信号分离成与相应的一个扬声器相关联的多个单个语音信号。 第一提取装置提取包含在每个单个语音信号中的源语音特征参数。 第二提取装置从输入的混合语音信号中提取一般的声道特征参数。 在语音解码装置中，第一输入装置输入每个扬声器的源语音特征参数。 第二输入装置输入声道特征参数。 源语音解码器基于用于扬声器的源语音特征参数来解码各个扬声器的源语音信号，并通过合成各个扬声器的解码的源语音信号来形成扬声器的源语音信号。 声道滤波器基于通用声道特性参数对扬声器的源语音信号进行滤波，以解码指示扬声器的混合语音的混合语音信号。

公开(公告)号：US5912657A

公开(公告)日：1999-06-15

申请号：US695308

申请日：1996-08-09

Applicant: Akitoshi Saito

Inventor： Akitoshi Saito

IPC: G06T15/00 ,  G09G5/02 ,  G09G5/36 ,  G09G5/39 ,  G09G5/393 ,  G09G5/42

CPC classification number: G06T15/405 ,  G09G5/36 ,  G09G5/02

Abstract: Pixel data of a two-dimensional image of an object to be displayed is prepared by an image depicting circuit 1, and pixel data in a VRAM 2 is updated by the thus prepared pixel data. On the other hand, pixel data for a single screen in the VRAM 2 is read per frame cycle from the VRAM 2, and the read pixel data is supplied to a digital to analog converter section 5 through a display controller 4. Color signals R', G', and B' for actual display are prepared based on color signals R, G, and B of a pixel forming the pixel data as well as on the Z value of the object corresponding to the pixel, and the respective pixels are displayed. The most remote the object is away from a viewpoint, the more different the display colors of the object displayed by a display unit 3 become from the original colors; the display colors gradually become white. As a result, an object remote from the viewpoint can be displayed on a screen so as to be hazy in opal.

Abstract translation: 通过图像描绘电路1准备要显示的对象的二维图像的像素数据，通过这样准备的像素数据来更新VRAM2中的像素数据。 另一方面，从VRAM2每帧周期读取VRAM2中的单个屏幕的像素数据，并且通过显示控制器4将读取的像素数据提供给数模转换器部分5.颜色信号R' 基于形成像素数据的像素的颜色信号R，G和B以及对应于像素的对象的Z值来准备用于实际显示的“G”和“B”，并且显示各个像素 。 物体远离视点的距离越远，显示单元3显示的对象的显示颜色越不同于原始颜色; 显示颜色逐渐变白。 结果，远离视点的物体可以显示在屏幕上，以便在蛋白石中变得模糊。

公开(公告)号：US5675282A

公开(公告)日：1997-10-07

申请号：US512994

申请日：1995-08-09

Applicant: Akitoshi Saito

Inventor： Akitoshi Saito

IPC: G11C11/41 ,  G06F1/04 ,  G06F1/12 ,  G06F1/32 ,  G06F11/00 ,  H03K1/04 ,  G06F11/10

CPC classification number: G06F11/0757 ,  G06F1/3203 ,  G06F1/3237 ,  G06F1/324 ,  G06F1/3287 ,  Y02B60/1217 ,  Y02B60/1221 ,  Y02B60/1282 ,  Y02B60/32

Abstract: An integrated circuit has a plurality of circuit elements, each of which is equipped with a power saving device for conserving power. This offers design flexibility to more easily change the number of circuit elements in the integrated circuit. Each circuit element detects the input data with the aid of an input detector circuit. The input detector triggers a timer circuit to measure the time required for the circuit element to process the data. The timer circuit turns on an action flag at the start of the process, and turns off the action flag at the end of the process. When the action flag is on, a switch circuit provides either a clock signal or the power to a main circuit. This allows the main circuit to enter an activation mode. When the action flag is off, the switch circuit either provides a low-speed clock signal or suspends the supply of the clock signal or the power to the main circuit. This allows the main circuit to enter a sleep mode.

Abstract translation: 集成电路具有多个电路元件，每个电路元件配备有用于节省功率的节电装置。 这提供了设计灵活性，以更容易地改变集成电路中的电路元件的数量。 每个电路元件借助于输入检测器电路来检测输入数据。 输入检测器触发定时器电路以测量电路元件处理数据所需的时间。 定时器电路在处理开始时打开动作标志，并在处理结束时关闭动作标志。 当动作标志打开时，开关电路为主电路提供时钟信号或电源。 这允许主电路进入激活模式。 当动作标志关闭时，开关电路提供低速时钟信号或暂停提供时钟信号或向主电路供电。 这允许主电路进入睡眠模式。

公开(公告)号：US5867815A

公开(公告)日：1999-02-02

申请号：US528851

申请日：1995-09-15

Applicant: Kazunobu Kondo ,  Akitoshi Saito

Inventor： Kazunobu Kondo ,  Akitoshi Saito

IPC: H04M1/00 ,  G10L21/02 ,  H04B1/10 ,  G10L3/02

CPC classification number: G10L21/0208 ,  G10L21/0264

Abstract: An encoding apparatus provided at the transmission side includes a low pass filter, a high pass filter, a nonvoice band detecter, a switch and an adder for separating a speech component and a background noise component from an inputted signal. The low pass filter provides a voice band of the speech component and the high pass filter provides a nonvoice band of the speech component. The nonvoice band component is separated from the background noise portion of the output of the high pass filter and re-combined with the voice band to provide the separated speech component. The separated speech component and the background component are individually encoded by a speech encoder and a noise encoder, respectively, and transmitted. In a decoding apparatus at the reception side, the speech component and the background noise component are individually decoded by a speech decoder and a noise decoder, respectively. The decoded speech component and the background noise component are level-adjusted based upon an appropriate level ratio by level controllers, respectively, and then mixed by an adder and outputted as a reproduced signal.

Abstract translation: 设置在发送侧的编码装置包括低通滤波器，高通滤波器，非发音频带检测器，用于从输入信号中分离语音分量和背景噪声分量的开关和加法器。 低通滤波器提供语音分量的语音频带，高通滤波器提供语音分量的非发音频带。 非发音频带分量与高通滤波器的输出的背景噪声部分分离，并与语音频带重新组合以提供分离的语音分量。 分离的语音分量和背景分量分别由语音编码器和噪声编码器分别编码并发送。 在接收侧的解码装置中，语音分量和背景噪声分量分别由语音解码器和噪声解码器分别解码。 解码语音分量和背景噪声分量基于电平控制器的适当电平比进行电平调整，然后由加法器混合并作为再现信号输出。

公开(公告)号：US5797118A

公开(公告)日：1998-08-18

申请号：US512311

申请日：1995-08-08

Applicant: Akitoshi Saito

Inventor： Akitoshi Saito

IPC: G06T9/00 ,  G10L19/00 ,  G10L19/12 ,  H03M7/30 ,  G10L5/00 ,  G10L1/06

CPC classification number: G06T9/008 ,  G10L19/12 ,  H03M7/3082

Abstract: An encoding/decoding system employing vector quantization realizes a high quality encoding and decoding with decreased quantizing errors, employing a small sized codebook which faithfully represents each of the inputted waveform vectors. An encoding/decoding system includes an encoding apparatus and a decoding apparatus, each having a codebook for storing information vectors representative of a predetermined number of signal patterns and index that determine the information vectors. The encoding apparatus compares a vector representing an object signal to be quantized with each information vector in the codebook, selects an information vector that is closest to the vector and outputs an index for the information vector. The decoding apparatus obtains an information vector corresponding to the index obtained at the encoding apparatus side by referring to the codebook and decodes the object signal. The codebook utilizes a temporary memory connected thereto. The content of the codebook is temporarily moved to the temporary memory when the identity of the speaker changes. The contents of the temporary memory are read out when the original speakers returns to the system.

Abstract translation: 采用矢量量化的编码/解码系统采用一种忠实地表示每个输入的波形向量的小尺寸码本，实现具有降低的量化误差的高质量编码和解码。 编码/解码系统包括编码装置和解码装置，每个编码装置和解码装置具有用于存储表示预定数量的信号模式的信息矢量的码本和确定信息矢量的索引。 编码装置将表示要量化的对象信号的矢量与码本中的每个信息矢量进行比较，选择最靠近矢量的信息矢量并输出信息矢量的索引。 解码装置通过参照码本获取与在编码装置一侧获得的索引相对应的信息矢量，对该对象信号进行解码。 码本利用与其连接的临时存储器。 当扬声器的身份改变时，码本的内容临时移动到临时存储器。 当原始扬声器返回到系统时，临时存储器的内容被读出。

公开(公告)号：US5406632A

公开(公告)日：1995-04-11

申请号：US93275

申请日：1993-07-16

Applicant: Akira Sogo ,  Akitoshi Saito

Inventor： Akira Sogo ,  Akitoshi Saito

IPC: G11B20/18 ,  G10L19/00 ,  G10L3/00 ,  G06F11/00

CPC classification number: G10L19/005

Abstract: A method and device for correcting an error in digital data in which data of one frame consists of bit assignment data and plural data each consisting of a bit number assigned by the bit assignment data comprises a step of substituting the plural data by noise data when an error has occurred in the bit assignment data. In one aspect of the invention, a method for correcting an error in digital data in which data of one frame consists of bit assignment data and plural data each consisting of exponential data assigned by the bit assignment data and mantissa data of a number of bits assigned by the bit assignment data, comprising a step of correcting the exponential data on the basis of a preceding frame or on the basis of both preceding and subsequent frame and substituting the mantissa data by noise data when an error has occurred in the bit assignment data. The noise data may be band-limited noise. When an irremediable error has occurred in digital data, generation of an extreme noise is prevented and deterioration of a reproduced tone is thereby prevented.

Abstract translation: 一种用于校正数字数据中的错误的方法和装置，其中一帧的数据由比特分配数据组成，并且每个由比特分配数据分配的比特数组成的多个数据包括以下步骤：当 位分配数据发生错误。 在本发明的一个方面，一种用于校正数字数据中的错误的方法，其中一帧的数据由比特分配数据和多个数据组成，每个数据由比特分配数据分配的指数数据和分配的比特数的尾数数据组成 通过比特分配数据，包括基于前一帧或基于前后帧校正指数数据的步骤，并且当在位分配数据中发生错误时用噪声数据代替尾数数据。 噪声数据可以是带限噪声。 当在数字数据中出现不可弥补的错误时，防止产生极端噪声，从而防止再现音色的劣化。

公开(公告)号：US5937403A

公开(公告)日：1999-08-10

申请号：US694337

申请日：1996-08-08

Applicant: Akitoshi Saito

Inventor： Akitoshi Saito

IPC: G06F7/24 ,  G06F7/76 ,  G06F17/30

CPC classification number: G06F7/76 ,  G06F7/24 ,  Y10S707/99937

Abstract: Integer permutation is performed while a data sequence is transferred between buffers 1 and 2 alternately. Each data piece is divided into four elements and integer permutation is executed with the elements as keys from low-order to high-order elements. In the integer permutation, the data pieces are stored in the storage areas in the buffers in pack relation. To enable this, for each value of each element, a dividing analysis section 10 preliminarily surveys the number of data pieces having the element of such a value, and initializes pointers for specifying areas into which data pieces having the elements of each value are to be written. A digit place setting section 21, a digit place sort section 22, a switch circuit 30, and switches SW1 and SW2 determine the value of the corresponding element of data read from the buffer and guide the pointer required for data write to an address terminal of the buffer from the dividing analysis section 10.

Abstract translation: 在数据序列交替地在缓冲器1和2之间传送时执行整数置换。 每个数据段被分成四个元素，并且使用元素作为从低阶到高阶元素的键执行整数置换。 在整数置换中，数据片段以包装关系存储在缓冲器中的存储区域中。 为了实现这一点，对于每个元素的每个值，分割分析部分10预先调查具有这样的值的元素的数据的数量，并且初始化用于指定具有每个值的元素的数据的区域的指针 书面。 数字位置设定部分21，数字位置分类部分22，开关电路30和开关SW1和SW2确定从缓冲器读取的相应的数据元素的值，并将数据写入所需的指针引导到 来自分割分析部10的缓冲器。

公开(公告)号：US5723998A

公开(公告)日：1998-03-03

申请号：US508975

申请日：1995-07-28

Applicant: Akitoshi Saito ,  Shigemitsu Yamaoka ,  Ryo Kamiya

Inventor： Akitoshi Saito ,  Shigemitsu Yamaoka ,  Ryo Kamiya

IPC: G06F1/20 ,  H03K17/08 ,  H01L35/00 ,  H03K3/42

CPC classification number: G06F1/206 ,  H03K2017/0806

Abstract: An electronic circuit with an operation self-control function includes an electronic circuit body. A temperature sensor and a temperature-setting circuit detect the temperature of the electronic circuit body as an operating parameter indicative of an operating condition of the electronic circuit body, and a clock/peripheral circuit control circuit operates to restrict the operation of the electronic circuit body according to the detected temperature, to thereby restrain heat generation of the electronic circuit body.

Abstract translation: 具有操作自我控制功能的电子电路包括电子电路体。 温度传感器和温度设定电路将电子电路体的温度检测为表示电子电路体的工作状态的工作参数，时钟/周边电路控制电路进行操作以限制电子电路体 根据检测出的温度，抑制电子电路体的发热。