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    Methods of Forming Replacement Gate Structures for Semiconductor Devices
    4.
    发明申请
    Methods of Forming Replacement Gate Structures for Semiconductor Devices 审中-公开
    形成半导体器件的替代栅极结构的方法

    公开(公告)号：US20130187236A1

    公开(公告)日：2013-07-25

    申请号：US13354844

    申请日：2012-01-20

    申请人： Ruilong Xie ,  Xiuyu Cai ,  Robert Miller ,  Andreas Knorr

    发明人： Ruilong Xie ,  Xiuyu Cai ,  Robert Miller ,  Andreas Knorr

    IPC分类号： H01L27/092 ,  H01L21/28

    CPC分类号： H01L29/4966 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823842 ,  H01L21/82385 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553

    摘要： Disclosed herein are methods of forming replacement gate structures. In one example, the method includes forming a sacrificial gate structure above a semiconducting substrate, removing the sacrificial gate structure to thereby define a gate cavity, forming a layer of insulating material in the gate cavity and forming a layer of metal within the gate cavity above the layer of insulating material. The method further includes forming a sacrificial material in the gate cavity so as to cover a portion of the layer of metal and thereby define an exposed portion of the layer of metal, performing an etching process on the exposed portion of the layer of metal to thereby remove the exposed portion of the layer of metal from within the gate cavity, and, after performing the etching process, removing the sacrificial material and forming a conductive material above the remaining portion of the layer of metal.

    摘要翻译： 这里公开了形成替换栅极结构的方法。 在一个示例中，该方法包括在半导体衬底之上形成牺牲栅极结构，去除牺牲栅极结构从而限定栅极腔，在栅极腔中形成绝缘材料层并在栅极腔内形成金属层 绝缘材料层。 该方法还包括在栅腔中形成牺牲材料以覆盖金属层的一部分，从而限定金属层的暴露部分，对金属层的暴露部分进行蚀刻工艺，由此 从栅极腔内去除金属层的暴露部分，并且在执行蚀刻工艺之后，去除牺牲材料并在金属层的剩余部分上方形成导电材料。

    Self-aligned silicidation for replacement gate process
    6.
    发明授权
    Self-aligned silicidation for replacement gate process 有权
    用于替代浇口工艺的自对准硅化物

    公开(公告)号：US08361870B2

    公开(公告)日：2013-01-29

    申请号：US12843350

    申请日：2010-07-26

    申请人： Indradeep Sen ,  Thorsten Kammler ,  Andreas Knorr ,  Akif Sultan

    发明人： Indradeep Sen ,  Thorsten Kammler ,  Andreas Knorr ,  Akif Sultan

    IPC分类号： H01L21/336

    CPC分类号： H01L29/78 ,  H01L21/28097 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/66515 ,  H01L29/66545 ,  H01L29/66606

    摘要： A semiconductor device is formed with low resistivity self aligned silicide contacts with high-K/metal gates. Embodiments include postponing silicidation of a metal layer on source/drain regions in a silicon substrate until deposition of a high-K dielectric, thereby preserving the physical and morphological properties of the silicide film and improving device performance. An embodiment includes forming a replaceable gate electrode on a silicon-containing substrate, forming source/drain regions, forming a metal layer on the source/drain regions, forming an ILD over the metal layer on the substrate, removing the replaceable gate electrode, thereby forming a cavity, depositing a high-K dielectric layer in the cavity at a temperature sufficient to initiate a silicidation reaction between the metal layer and underlying silicon, and forming a metal gate electrode on the high-K dielectric layer.

    摘要翻译： 半导体器件形成为具有高K /金属栅极的低电阻率自对准硅化物接触。 实施例包括在硅衬底的源极/漏极区域上延迟金属层的硅化物，直到沉积高K电介质，从而保持硅化物膜的物理和形态特性并提高器件性能。 一个实施例包括在含硅衬底上形成可替换的栅电极，形成源极/漏极区域，在源极/漏极区域上形成金属层，在衬底上的金属层上形成ILD，去除可更换的栅电极，由此 形成空腔，在足以在金属层和下层硅之间引发硅化反应的温度下在腔中沉积高K电介质层，以及在高K电介质层上形成金属栅电极。

    SEMICONDUCTOR STRUCTURES AND METHODS FOR STABILIZING SILICON-COMPRISING STRUCTURES ON A SILICON OXIDE LAYER OF A SEMICONDUCTOR SUBSTRATE
    10.
    发明申请
    SEMICONDUCTOR STRUCTURES AND METHODS FOR STABILIZING SILICON-COMPRISING STRUCTURES ON A SILICON OXIDE LAYER OF A SEMICONDUCTOR SUBSTRATE 审中-公开
    用于稳定半导体衬底的氧化硅层上的含硅结构的半导体结构和方法

    公开(公告)号：US20100308440A1

    公开(公告)日：2010-12-09

    申请号：US12480286

    申请日：2009-06-08

    申请人： Frank S. JOHNSON ,  Andreas KNORR

    发明人： Frank S. JOHNSON ,  Andreas KNORR

    IPC分类号： H01L21/302 ,  H01L29/06

    CPC分类号： H01L29/66795

    摘要： Methods are provided for substantially preventing and filling overetched regions in a silicon oxide layer of a semiconductor substrate. The overetched regions may be formed as a result of overetching of the silicon oxide layer during etching of an overlying silicon-comprising material layer to form a silicon-comprising structure. An etch resistant spacer may be formed after the initial or subsequent overetches. The etch resistant spacer may be formed by depositing an etch resistant material into the overetched region and etching the deposited etch resistant material to leave residual etch resistant material forming the etch resistant spacer. The etch resistant spacer may also be formed by exposing the silicon oxide layer in the overetched region to a nitrogen-supplying material to form a silicon oxynitride etch resistant spacer.

    摘要翻译： 提供了用于基本上防止和填充半导体衬底的氧化硅层中的过蚀刻区域的方法。 在蚀刻覆盖的含硅材料层以形成含硅结构的过程中，可以形成过蚀刻区域作为氧化硅层的过蚀刻的结果。 可以在初始或随后的过程之后形成耐蚀刻间隔物。 耐蚀刻间隔物可以通过将抗蚀刻材料沉积到过蚀刻区域中并蚀刻沉积的耐蚀刻材料以形成形成耐蚀刻间隔物的残留耐蚀刻材料来形成。 也可以通过将过蚀区域中的氧化硅层暴露于氮供给材料以形成氮氧化硅耐腐蚀间隔物来形成耐蚀刻间隔物。