-
1.发明授权Method and circuit for controlling the charge of a bootstrap capacitor in a switching step-down regulator 失效用于控制开关降压调节器中自举电容器充电的方法和电路
公开(公告)号：US6037760A
公开(公告)日：2000-03-14
申请号：US895697
申请日：1997-07-17
CPC分类号： G05F1/465
摘要： A method of controlling the charging of a bootstrap capacitance incorporated into a switching regulator of a power transistor includes the steps of comparing, at each switching cycle, the voltage value at the bootstrap capacitance and a predetermined threshold voltage, to change the mode of operation of the regulator following said comparison. More particularly, the control on the transistor is taken off the regulator when the voltage at the bootstrap capacitance is lower than the threshold voltage, while the transistor is forced into the "on" state through a full cycle. In this way, the minimum current to operate the regulator can be minimised.
摘要翻译： 控制并入功率晶体管的开关调节器的自举电容的充电的方法包括以下步骤：在每个开关周期比较自举电容的电压值和预定阈值电压，以改变操作模式 调节器跟随比较。 更具体地说，当自举电容的电压低于阈值电压时，晶体管的控制被从稳压器中取走，同时晶体管被迫通过整个周期进入“导通”状态。 以这种方式，可以最小化操作调节器的最小电流。
-
2.发明授权Clock circuit and corresponding method for generating and supplying a clock signal to electronic devices 失效时钟电路和用于产生和提供时钟信号到电子设备的相应方法
公开(公告)号：US5982209A
公开(公告)日：1999-11-09
申请号：US899248
申请日：1997-07-23
申请人： Antonio Magazzu' , Bruno Ferrario
发明人： Antonio Magazzu' , Bruno Ferrario
CPC分类号： G06F1/10 , H03L7/00 , H04L7/0083 , H04L7/033
摘要： A synchronization circuit for electronic devices and components, being of the type which includes an internal synchronization signal generator and an input/output terminal whereat an external synchronization signal can be received. The synchronization circuit further includes a comparator for receiving both synchronization signals and having a control output for supplying a terminal with the signal corresponding to the master/slave mode of operation of the synchronization circuit. A method of generating and supplying a synchronization signal to a plurality of electronic devices being operated as slave devices to a synchronization circuit acting as the master device is also provided.
摘要翻译： 一种用于电子设备和组件的同步电路，其类型包括内部同步信号发生器和可以接收外部同步信号的输入/输出端子。 同步电路还包括用于接收两个同步信号并具有用于向终端提供与同步电路的主/从操作模式相对应的信号的比较器。 还提供了向作为主设备的同步电路作为从设备操作的多个电子设备产生和提供同步信号的方法。
-
3.发明授权Driver circuit for MOS transistor switches in switching regulators and related methods 失效用于开关稳压器和相关方法中的MOS晶体管开关的驱动电路
公开(公告)号：US5883505A
公开(公告)日：1999-03-16
申请号：US998951
申请日：1997-12-29
CPC分类号： G05F1/62
摘要： A driver circuit is for turning on at least one power MOS transistor having a diode connected thereto. The driver circuit preferably includes a smart driver circuit portion for increasing a drive current to the power MOS transistor responsive to turning on of the diode. The smart driver circuit may include a comparator having one input connected to the diode and a second input connected to a threshold signal indicative of the turning on of the diode. The smart driver circuit may also comprise: a first current source for supplying a first drive current; a second current source for supplying a second drive current; and a switch for connecting the second current source to the power MOS transistor responsive to the comparator. The smart driver circuit may further include a turn off circuit for turning off the increased drive current a predetermined time after turning on same, such as before turning off the first current. In addition, the second current source may supply a second drive current at least one order of magnitude larger that the first drive current. Of course, the driver circuit may be implemented with bipolar and MOS transistors Buck, boost, and buck-boost regulators may be implemented.
摘要翻译： 驱动电路用于接通至少一个连接有二极管的功率MOS晶体管。 驱动器电路优选地包括智能驱动器电路部分，用于响应于二极管的导通而增加到功率MOS晶体管的驱动电流。 智能驱动器电路可以包括具有连接到二极管的一个输入端的比较器和连接到指示二极管导通的阈值信号的第二输入端。 智能驱动电路还可以包括：用于提供第一驱动电流的第一电流源; 用于提供第二驱动电流的第二电流源; 以及用于响应于比较器将第二电流源连接到功率MOS晶体管的开关。 智能驱动器电路还可以包括关断电路，用于在接通之后的预定时间内关闭增加的驱动电流，诸如在关闭第一电流之前。 此外，第二电流源可以提供比第一驱动电流大至少一个数量级的第二驱动电流。 当然，驱动电路可以用双极和MOS晶体管实现，Buck，boost和buck-boost调节器都可以实现。
-
公开(公告)号：US06774731B2
公开(公告)日：2004-08-10
申请号：US10244113
申请日：2002-09-13
IPC分类号： H03L706
CPC分类号： H03K17/162 , H03L7/0891 , H03L7/183
摘要： A method and a circuit for minimizing glitches in phase-locked loops is presented. The circuit includes an input terminal connected to an input of a phase detector; a series of a charge pump generator, a filter and a voltage controlled oscillator connected downstream of the phase detector; and a frequency divider feedback connected between an output of the voltage controlled oscillator and a second input of the phase detector. The circuit provides for the inclusion of a compensation circuit connected between the charge pump generator and the filter to absorb an amount of the charge passed therethrough. This compensation circuit includes a storage element connected in series to two switches. The first switch is coupled to and controlled by an output of the charge pump and the second switch is coupled to and controlled by an output of a phase detector.
摘要翻译： 提出了一种用于最小化锁相环中的毛刺的方法和电路。 电路包括连接到相位检测器的输入端的输入端子; 一系列电荷泵发生器，滤波器和连接在相位检测器下游的压控振荡器; 以及连接在压控振荡器的输出端和相位检测器的第二输入端之间的分频器反馈。 该电路提供包括连接在电荷泵发生器和滤波器之间的补偿电路，以吸收一定量的通过其的电荷。 该补偿电路包括与两个开关串联连接的存储元件。 第一开关耦合到电荷泵的输出并由电荷泵的输出控制，第二开关耦合到相位检测器的输出并由相位检测器的输出控制。
-
5.发明授权Electronic device for smoothing a charge current peak in RLC output stages of switching step-up regulators 有权用于平滑开关升压调节器的RLC输出级中的充电电流峰值的电子设备
公开(公告)号：US6060875A
公开(公告)日：2000-05-09
申请号：US248924
申请日：1999-02-11
CPC分类号： H02M1/15
摘要： An electronic device smoothes a charge current peak in RLC output stages of switching step-up regulators, which stages include an input terminal and an output terminal with an inductance and a parasitic resistance in series therebetween, the latter corresponding to the series parasitic resistance of the inductance, and a capacitor connected between the output terminal and a ground. The device comprises a parallel of a resistor and a controlled switch connected between the inductance and the output terminal of the stage upstream of the capacitor. Advantageously, the switch would only be open during the charge transient of the capacitor.
摘要翻译： 电子装置平滑开关升压调节器的RLC输出级中的充电电流峰值，这些级包括输入端子和输出端子，其中电感和寄生电阻串联在其中，后者对应于串联寄生电阻 电感和连接在输出端子和地之间的电容器。 该装置包括电阻器和连接在电容器的上游的电感和输出端子之间的受控开关的并联。 有利地，开关仅在电容器的充电瞬变期间是断开的。
-
公开(公告)号：US5977811A
公开(公告)日：1999-11-02
申请号：US893246
申请日：1997-07-15
申请人： Antonio Magazzu
发明人： Antonio Magazzu
CPC分类号： H03K17/063
摘要： A translator circuit for a drive circuit of a power transistor connected to an electric load. The translator circuit includes a first current generator placed between a supply voltage reference and an input terminal of the drive circuit, a controlled switch placed between the input terminal and a ground reference, and a second current generator interposed between the controlled switch and the ground reference. The translator circuit further includes a circuit leg in the form of a current mirror connected in parallel with the second current generator. The translator circuit avoids phenomena of false switching.
摘要翻译： 一种用于连接到电负载的功率晶体管的驱动电路的转换器电路。 所述转换器电路包括放置在所述驱动电路的电源电压基准和输入端子之间的第一电流发生器，设置在所述输入端子和接地基准之间的受控开关，以及置于所述受控开关和所述接地基准之间的第二电流发生器 。 转换器电路还包括与第二电流发生器并联连接的电流镜形式的电路支脚。 翻译电路避免了错误切换的现象。
-
7.发明授权Precision low-noise current mode biasing scheme for BJT with inductive emitter degeneration 有权具有感应发射极退化的BJT精密低噪声电流模式偏置方案公开(公告)号：US06271695B1
公开(公告)日：2001-08-07
申请号：US09561101
申请日：2000-04-28
IPC分类号： H03B100
CPC分类号： H03F3/45085 , H03F1/22 , H03F1/301 , H03F3/45098 , H03F3/45103 , H03F2200/294 , H03F2200/372 , H03F2200/489 , H03F2203/45464 , H03F2203/45704
摘要： A low noise adaptive bias circuit is provided for a low noise bipolar junction input transistor having an emitter degeneration inductance, of an integrated high frequency functional circuit driven by the collector current of the input transistor. The bias circuit includes a shunt line connecting the base node of the input transistor to a first supply node of opposite sign of that of a second supply node to which is coupled, through the degeneration inductance, to the emitter of the input transistor. The shunt line includes a bias current generator dependent, in an inversely proportional manner, on the current gain of the input transistor, and a resistance dependent, in a directly proportional manner, on the current gain of the input transistor.
摘要翻译： 为具有由输入晶体管的集电极电流驱动的集成高频功能电路的发射极退化电感的低噪声双极结输入晶体管提供低噪声自适应偏置电路。 偏置电路包括将输入晶体管的基极节点连接到与第二电源节点的相反符号的第一电源节点的分流线，第二电源节点通过退化电感耦合到输入晶体管的发射极。 分流线包括偏置电流发生器，其以反比例的方式依赖于输入晶体管的电流增益，并且电阻以直接比例的方式取决于输入晶体管的电流增益。
-
公开(公告)号：US5852632A
公开(公告)日：1998-12-22
申请号：US744714
申请日：1996-10-29
CPC分类号： H03K7/08 , H03K6/04 , Y10S388/915
摘要： Switching and propagation delays in generating a PWM control signal by a circuit that generally includes an error amplifier, a sawtooth oscillator and a comparator for comparing the error signal with the sawtooth signal, is compensated by generating a second sawtooth signal synchronous with the master sawtooth signal but having a reduced discharge time and by applying the second synchronous sawtooth signal to the respective input of the PWM comparator.
摘要翻译： 通过一般包括误差放大器，锯齿波振荡器和用于比较误差信号与锯齿波信号的比较器的电路产生PWM控制信号的开关和传播延迟通过产生与主锯齿波信号同步的第二锯齿波信号来补偿 但是具有减小的放电时间并且通过将第二同步锯齿波信号施加到PWM比较器的相应输入端。
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.01 秒)