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公开(公告)号：US06774731B2
公开(公告)日：2004-08-10
申请号：US10244113
申请日：2002-09-13
IPC分类号： H03L706
CPC分类号： H03K17/162 , H03L7/0891 , H03L7/183
摘要： A method and a circuit for minimizing glitches in phase-locked loops is presented. The circuit includes an input terminal connected to an input of a phase detector; a series of a charge pump generator, a filter and a voltage controlled oscillator connected downstream of the phase detector; and a frequency divider feedback connected between an output of the voltage controlled oscillator and a second input of the phase detector. The circuit provides for the inclusion of a compensation circuit connected between the charge pump generator and the filter to absorb an amount of the charge passed therethrough. This compensation circuit includes a storage element connected in series to two switches. The first switch is coupled to and controlled by an output of the charge pump and the second switch is coupled to and controlled by an output of a phase detector.
摘要翻译： 提出了一种用于最小化锁相环中的毛刺的方法和电路。 电路包括连接到相位检测器的输入端的输入端子; 一系列电荷泵发生器，滤波器和连接在相位检测器下游的压控振荡器; 以及连接在压控振荡器的输出端和相位检测器的第二输入端之间的分频器反馈。 该电路提供包括连接在电荷泵发生器和滤波器之间的补偿电路，以吸收一定量的通过其的电荷。 该补偿电路包括与两个开关串联连接的存储元件。 第一开关耦合到电荷泵的输出并由电荷泵的输出控制，第二开关耦合到相位检测器的输出并由相位检测器的输出控制。
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2.发明授权Precision low-noise current mode biasing scheme for BJT with inductive emitter degeneration 有权具有感应发射极退化的BJT精密低噪声电流模式偏置方案公开(公告)号：US06271695B1
公开(公告)日：2001-08-07
申请号：US09561101
申请日：2000-04-28
IPC分类号： H03B100
CPC分类号： H03F3/45085 , H03F1/22 , H03F1/301 , H03F3/45098 , H03F3/45103 , H03F2200/294 , H03F2200/372 , H03F2200/489 , H03F2203/45464 , H03F2203/45704
摘要： A low noise adaptive bias circuit is provided for a low noise bipolar junction input transistor having an emitter degeneration inductance, of an integrated high frequency functional circuit driven by the collector current of the input transistor. The bias circuit includes a shunt line connecting the base node of the input transistor to a first supply node of opposite sign of that of a second supply node to which is coupled, through the degeneration inductance, to the emitter of the input transistor. The shunt line includes a bias current generator dependent, in an inversely proportional manner, on the current gain of the input transistor, and a resistance dependent, in a directly proportional manner, on the current gain of the input transistor.
摘要翻译： 为具有由输入晶体管的集电极电流驱动的集成高频功能电路的发射极退化电感的低噪声双极结输入晶体管提供低噪声自适应偏置电路。 偏置电路包括将输入晶体管的基极节点连接到与第二电源节点的相反符号的第一电源节点的分流线，第二电源节点通过退化电感耦合到输入晶体管的发射极。 分流线包括偏置电流发生器，其以反比例的方式依赖于输入晶体管的电流增益，并且电阻以直接比例的方式取决于输入晶体管的电流增益。
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公开(公告)号：US06593817B1
公开(公告)日：2003-07-15
申请号：US09553612
申请日：2000-04-20
IPC分类号： H03L706
CPC分类号： H03K17/162 , H03L7/0891 , H03L7/183
摘要： A method and a circuit for minimizing glitches in phase-locked loops is presented. The circuit includes an input terminal connected to an input of a phase detector; a series of a charge pump generator, a filter and a voltage controlled oscillator connected downstream of the phase detector; and a frequency divider feedback connected between an output of the voltage controlled oscillator and a second input of the phase detector. The circuit provides for the inclusion of a compensation circuit connected between the charge pump generator and the filter to absorb an amount of the charge passed therethrough. This compensation circuit includes a storage element connected in series to two switches. The first switch is coupled to and controlled by an output of the charge pump and the second switch is coupled to and controlled by an output of a phase detector.
摘要翻译： 提出了一种用于最小化锁相环中的毛刺的方法和电路。 电路包括连接到相位检测器的输入端的输入端子; 一系列电荷泵发生器，滤波器和连接在相位检测器下游的压控振荡器; 以及连接在压控振荡器的输出端和相位检测器的第二输入端之间的分频器反馈。 该电路提供包括连接在电荷泵发生器和滤波器之间的补偿电路，以吸收一定量的通过其的电荷。 该补偿电路包括与两个开关串联连接的存储元件。 第一开关耦合到电荷泵的输出并由电荷泵的输出控制，第二开关耦合到相位检测器的输出并由相位检测器的输出控制。
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公开(公告)号：US20070273448A1
公开(公告)日：2007-11-29
申请号：US11747539
申请日：2007-05-11
申请人： Michele Vaiana , Giuseppe Gramegna
发明人： Michele Vaiana , Giuseppe Gramegna
IPC分类号： H03F3/04
CPC分类号： H03F1/0261 , H03F1/302 , H03F2200/18 , H03F2200/447 , H03F2200/456 , H03F2200/462 , H03F2200/78
摘要： Precision and reliability of a current limited mode output power control of an RF amplifier is enhanced by sensing the base current of the current controlled output power transistor. The base current is compared to a control current that is normalized by scaling it as a function of the current gain of a bipolar junction transistor of similar characteristics as the output power transistor. Fabrication process spread of current gain figures of bipolar junction transistors is effectively compensated. Moreover, by using a band-gap temperature compensation control current that is eventually β-scaled before comparing it with the sensed base current of the output power transistor, the output power may be effectively controlled and maintained constant over temperature as well as process spread variations.
摘要翻译： 通过感测电流控制输出功率晶体管的基极电流，可以提高RF放大器的电流限制模式输出功率控制的精度和可靠性。 将基极电流与通过将其缩放为与输出功率晶体管类似特性的双极结型晶体管的电流增益的函数进行归一化的控制电流进行比较。 双极结型晶体管的电流增益图的制造工艺扩展得到有效的补偿。 此外，通过使用在与输出功率晶体管的检测到的基极电流进行比较之前最终进行β标量的带隙温度补偿控制电流，可以有效地控制输出功率并且在温度以及工艺扩展变化 。
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5.发明授权Device for calibrating the frequency of an oscillator, phase looked loop circuit comprising said calibration device and related frequency calibration method 有权用于校准振荡器的频率的装置，包括所述校准装置的相位环路电路和相关的频率校准方法公开(公告)号：US07129793B2
公开(公告)日：2006-10-31
申请号：US11024327
申请日：2004-12-28
申请人： Giuseppe Gramegna
发明人： Giuseppe Gramegna
IPC分类号： H03L7/00
摘要： A device calibrates the frequency of an oscillator. The oscillator has first and second inputs and generates an output frequency responsive to a first voltage signal at the first input. The calibration device generates a calibration signal applied at the second input of the oscillator for calibrating its output frequency and comprises a counter. The counter has a first input frequency proportional to a reference frequency and a second input frequency proportional to the output frequency. The counter counts the time window number given by the ratio of the second to first frequencies. The device comprises a comparator that compares the counted time window number with a prefixed time window number. The calibration device changes the value of the calibration signal if the counted time window number is different from the prefixed time window number and until the counted time window number is equal to the prefixed time window number.
摘要翻译： 器件校准振荡器的频率。 振荡器具有第一和第二输入，并响应于第一输入端的第一电压信号产生输出频率。 校准装置产生在振荡器的第二输入处施加的校准信号，用于校准其输出频率并包括计数器。 计数器具有与参考频率成比例的第一输入频率和与输出频率成比例的第二输入频率。 计数器对由第二频率与第一频率的比率给出的时间窗数进行计数。 该装置包括将计数的时间窗数与预定时间窗数进行比较的比较器。 如果计数的时间窗口数不同于前缀时间窗口号，并且直到所计数的时间窗口数等于前缀时间窗口号，则校准装置改变校准信号的值。
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公开(公告)号：US08928405B2
公开(公告)日：2015-01-06
申请号：US13609190
申请日：2012-09-10
IPC分类号： H03F3/191
CPC分类号： H03F1/565 , H03F3/195 , H03F3/213 , H03F3/245 , H03F3/45475 , H03F2203/45726 , H03F2203/45731 , H03G3/3042
摘要： A circuit for amplifying the power of signal, the circuit comprising a power amplifier, a transformer and a load; wherein the transformer comprises a primary inductor and a secondary inductor, the first inductor being coupled to, and capable of being driven by, the power amplifier, and the secondary inductor coupled to, and capable of driving, the load; wherein a first one of the primary and secondary inductors is a variable inductor whose inductance is variable responsive to a control input in order to change the output power of the amplifier.
摘要翻译： 一种用于放大信号功率的电路，该电路包括功率放大器，变压器和负载; 其中所述变压器包括初级电感器和次级电感器，所述第一电感器耦合到所述功率放大器并且能够被所述功率放大器驱动，所述次级电感器耦合到所述负载并且能够驱动所述负载; 其中所述主电感器和所述次级电感器中的第一电感器是可变电感器，其电感响应于控制输入而变化，以便改变所述放大器的输出功率。
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公开(公告)号：US08629715B1
公开(公告)日：2014-01-14
申请号：US13596449
申请日：2012-08-28
IPC分类号： H03B1/00
CPC分类号： H04B15/06 , G06F1/10 , H04B2215/064
摘要： An apparatus for propagating local oscillator signals in a circuit, the apparatus comprising two pairs of lines carrying respectively differential in-phase and quadrature signals. The lines are arranged such that in at least one region along their length one of each pair of lines crosses the other of the pair to create a twist. The twist(s) in each respective pair of lines is offset from the twist(s) in the other pair of lines such that the portion of their length over which the in-phase lines magnetically couple to the quadrature lines with a positive coupling coefficient is substantially equal to the portion of their length over which the in-phase lines magnetically couple to the quadrature lines with a negative coupling coefficient.
摘要翻译： 一种用于在电路中传播本地振荡器信号的装置，该装置包括两对带有差分同相和正交信号的线。 线被布置成使得在沿着它们的长度的至少一个区域中，每对线中的一条线与该对中的另一条线交叉以产生扭曲。 每对相应的线对中的扭曲偏离另一对线中的扭曲，使得它们的长度部分在同相线上以正耦合系数磁耦合到正交线 基本上等于其长度的部分，同相线路以负耦合系数磁耦合到正交线。
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8.发明申请Device for calibrating the frequency of an oscillator, phase looked loop circuit comprising said calibration device and related frequency calibration method 有权用于校准振荡器的频率的装置，包括所述校准装置的相位环路电路和相关的频率校准方法公开(公告)号：US20050156677A1
公开(公告)日：2005-07-21
申请号：US11024327
申请日：2004-12-28
申请人： Giuseppe Gramegna
发明人： Giuseppe Gramegna
摘要： A device calibrates the frequency of an oscillator. The oscillatory has first and second inputs and generates an output frequency responsive to a first voltage signal at the first input. The calibration device generates a calibration signal applied at the second input of the oscillator for calibrating its output frequency and comprises a counter. The counter has a first input frequency proportional to a reference frequency and a second input frequency proportional to the output frequency. The counter counts the time window number given by the ratio of the second to first frequencies. The devices comprises a comparator that compares the counted time window numbers with a prefixed time window number. The calibration device changes the value of the calibration signal if the counted time window number is different from the prefixed time window number and until the counted time window number is equal to the prefixed time window number.
摘要翻译： 器件校准振荡器的频率。 振荡器具有第一和第二输入，并响应于第一输入端的第一电压信号产生输出频率。 校准装置产生在振荡器的第二输入处施加的校准信号，用于校准其输出频率并包括计数器。 计数器具有与参考频率成比例的第一输入频率和与输出频率成比例的第二输入频率。 计数器对由第二频率与第一频率的比率给出的时间窗数进行计数。 这些装置包括一个比较器，用于将计数的时间窗口数与预先设定的时间窗口数进行比较。 如果计数的时间窗口数不同于前缀时间窗口号，并且直到所计数的时间窗口数等于前缀时间窗口号，则校准装置改变校准信号的值。
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9.发明授权High-precision biasing circuit for a cascoded CMOS stage, particularly for low noise amplifiers 有权用于级联CMOS级的高精度偏置电路，特别适用于低噪声放大器公开(公告)号：US06392490B1
公开(公告)日：2002-05-21
申请号：US09650022
申请日：2000-08-28
IPC分类号： H03F122
CPC分类号： G05F3/205 , H03F1/223 , H03F1/301 , H03F3/45201 , H03F2200/294 , H03F2200/372 , H03F2200/453 , H03F2203/45464 , H03F2203/45696 , H03F2203/45704
摘要： A high-precision biasing circuit is provided for a CMOS cascode stage with inductive load and degeneration. The cascode stage includes at least two MOS transistors serially connected between a first voltage reference and a second voltage reference. The biasing circuit includes at least a first MOS replica transistor and a second MOS replica transistor, and two current generators for biasing the first and second MOS replica transistors. A circuit block detects a voltage value on a terminal of the second replica MOS transistor and applies a voltage to a gate terminal of the first replica transistor. Two circuit block implementations include a voltage amplifier and a folded cascode amplifier closed in a shunt feedback. Both implementations allow the threshold voltages of the cascode stage transistors to be tracked, as well as their Early and body effects.
摘要翻译： 为具有感性负载和退化的CMOS共源共栅级提供高精度偏置电路。 共射共栅级包括串联连接在第一参考电压和第二电压基准之间的至少两个MOS晶体管。 偏置电路至少包括第一MOS复制晶体管和第二MOS复制晶体管，以及用于偏置第一和第二MOS复制晶体管的两个电流发生器。 电路块检测第二复制MOS晶体管的端子上的电压值，并向第一复制晶体管的栅极端施加电压。 两个电路块实现包括在分流反馈中闭合的电压放大器和折叠共源共栅放大器。 这两种实现允许跟踪共源共栅级晶体管的阈值电压，以及它们的Early和body效应。
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公开(公告)号：US20140070884A1
公开(公告)日：2014-03-13
申请号：US13609190
申请日：2012-09-10
IPC分类号： H03G3/20
CPC分类号： H03F1/565 , H03F3/195 , H03F3/213 , H03F3/245 , H03F3/45475 , H03F2203/45726 , H03F2203/45731 , H03G3/3042
摘要： A circuit for amplifying the power of signal, the circuit comprising a power amplifier, a transformer and a load; wherein the transformer comprises a primary inductor and a secondary inductor, the first inductor being coupled to, and capable of being driven by, the power amplifier, and the secondary inductor coupled to, and capable of driving, the load; wherein a first one of the primary and secondary inductors is a variable inductor whose inductance is variable responsive to a control input in order to change the output power of the amplifier.
摘要翻译： 一种用于放大信号功率的电路，该电路包括功率放大器，变压器和负载; 其中所述变压器包括初级电感器和次级电感器，所述第一电感器耦合到所述功率放大器并且能够被所述功率放大器驱动，所述次级电感器耦合到所述负载并且能够驱动所述负载; 其中所述主电感器和所述次级电感器中的第一电感器是可变电感器，其电感响应于控制输入而变化，以便改变所述放大器的输出功率。
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