公开(公告)号：US20070166866A1

公开(公告)日：2007-07-19

申请号：US11686748

申请日：2007-03-15

Applicant: Bernd APPELT ,  William CHEN

Inventor： Bernd APPELT ,  William CHEN

IPC: H01L21/00

CPC classification number: H01L23/4334 ,  H01L24/48 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An optical semiconductor package includes a substrate, a chip, a plurality of bonding wires, a window, a supporter, and an encapsulant. The chip is disposed on the substrate and has an optical element. The bonding wires are used for electrically connecting the chip to the substrate. The window is supported on the supporter and positioned over the optical element of the chip. The encapsulant is overmolded on the substrate for fixing the window and encapsulating the chip and the bonding wires.

Abstract translation: 光学半导体封装包括基板，芯片，多个接合线，窗口，支撑件和密封剂。 芯片设置在基板上并具有光学元件。 接合线用于将芯片电连接到基板。 窗户支撑在支架上并定位在芯片的光学元件上。 密封剂在基板上被包覆成型，用于固定窗户并封装芯片和接合线。

公开(公告)号：US20070065989A1

公开(公告)日：2007-03-22

申请号：US11601674

申请日：2006-11-20

Applicant: Bernd Appelt ,  Ching-Hua Tsao

Inventor： Bernd Appelt ,  Ching-Hua Tsao

IPC: H01L21/00

CPC classification number: H01L23/3128 ,  H01L21/481 ,  H01L21/6835 ,  H01L23/36 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing an adhesive substrate with a die-cavity sidewall is disclosed. A region for forming die-cavity sidewall is defined on one surface of the substrate. The substrate is laminated with a sacrificial film, a partially cured resin is formed between the substrate and the sacrificial film. And then, an aperture is routed through the substrate, the partially cured resin, and the sacrificial film. The aperture is located corresponding to the region so that the substrate has a die-cavity sidewall formed inside the aperture. Thereafter, the sacrificial film is removed to expose the partially cured resin on the substrate so that the substrate with a die-cavity sidewall can have good adhesion.

Abstract translation: 公开了一种用于制造具有模腔侧壁的粘合剂基材的方法。 用于形成模腔侧壁的区域限定在衬底的一个表面上。 基板与牺牲膜层叠，在基板和牺牲膜之间形成部分固化的树脂。 然后，将孔径穿过衬底，部分固化的树脂和牺牲膜。 孔对应于该区域定位，使得基底具有形成在孔内的模腔侧壁。 此后，去除牺牲膜以暴露基板上的部分固化的树脂，使得具有模腔侧壁的基板可以具有良好的粘合性。

公开(公告)号：US20050124096A1

公开(公告)日：2005-06-09

申请号：US11029969

申请日：2005-01-05

Applicant: Bernd Appelt ,  James Bupp ,  Donald Farquhar ,  Ross Keesler ,  Michael Klodowski ,  Andrew Seman ,  Gary Schild

Inventor： Bernd Appelt ,  James Bupp ,  Donald Farquhar ,  Ross Keesler ,  Michael Klodowski ,  Andrew Seman ,  Gary Schild

IPC: H05K3/06 ,  H05K3/20 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01L21/82 ,  H01L21/44

CPC classification number: H05K3/4007 ,  H05K3/06 ,  H05K3/20 ,  H05K3/427 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4647 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/09736 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K2203/1572 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method of forming a plurality of solid conductive bumps for interconnecting two conductive layers of a circuit board with substantially coplanar upper surfaces. The method comprises the steps of applying a continuous homogenous metal layer onto a dielectric substrate, applying a first photoresist and exposing and developing said first photoresist to define a pattern of conductive bumps, etching the metal layer exposed by said development to form said plurality of conductive bumps, removing said first photoresist, applying a second photoresist onto the metal layer, exposing and developing said second photoresist to define a pattern of conductive bumps and circuit lines; etching the metal layer exposed by said development to form a pattern of circuit lines in said metal layer; and removing said second photoresist. The methods of the present invention also provides for fabricating a multilayer circuit board and a metallic border for providing rigidity to a panel.

Abstract translation: 一种形成多个固体导电凸块的方法，用于将电路板的两个导电层与基本上共面的上表面互连。 该方法包括以下步骤：将连续的均匀金属层施加到电介质基底上，施加第一光致抗蚀剂并暴露和显影所述第一光致抗蚀剂以限定导电凸块的图案，蚀刻由所述显影暴露的金属层以形成所述多个导电 去除所述第一光致抗蚀剂，在所述金属层上施加第二光致抗蚀剂，暴露和显影所述第二光致抗蚀剂以限定导电凸块和电路线的图案; 蚀刻由所述显影曝光的金属层，以在所述金属层中形成电路线图案; 并除去所述第二光致抗蚀剂。 本发明的方法还提供制造用于向面板提供刚性的多层电路板和金属边框。

公开(公告)号：US20050073036A1

公开(公告)日：2005-04-07

申请号：US10667605

申请日：2003-09-23

Applicant: Bernd Appelt ,  William Chen

Inventor： Bernd Appelt ,  William Chen

IPC: H01L23/433 ,  H01L31/0203 ,  H01L31/0232 ,  H01L23/02

CPC classification number: H01L23/4334 ,  H01L24/48 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An optical semiconductor package comprises a substrate, a chip, a plurality of bonding wires, a window, a supporter, and an encapsulant. The chip is disposed on the substrate and has an optical element. The bonding wires are used for electrically connecting the chip to the substrate. The window is supported on the supporter and positioned over the optical element of the chip. The encapsulant is overmolded on the substrate for fixing the window and encapsulating the chip and the bonding wires.

Abstract translation: 光学半导体封装包括衬底，芯片，多个接合线，窗口，支撑件和密封剂。 芯片设置在基板上并具有光学元件。 接合线用于将芯片电连接到基板。 窗户支撑在支架上并定位在芯片的光学元件上。 密封剂在基板上被包覆成型，用于固定窗户并封装芯片和接合线。

公开(公告)号：US20050239235A1

公开(公告)日：2005-10-27

申请号：US10828248

申请日：2004-04-21

Applicant: Bernd Appelt ,  Ching-Hua Tsao

Inventor： Bernd Appelt ,  Ching-Hua Tsao

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/68 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/481 ,  H01L21/6835 ,  H01L23/36 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing an adhesive substrate with a die-cavity sidewall is disclosed. A region for forming die-cavity sidewall is defined on one surface of the substrate. The substrate is laminated with a sacrificial film, a partially cured resin is formed between the substrate and the sacrificial film. And then, an aperture is routed through the substrate, the partially cured resin, and the sacrificial film. The aperture is located corresponding to the region so that the substrate has a die-cavity sidewall formed inside the aperture. Thereafter, the sacrificial film is removed to expose the partially cured resin on the substrate so that the substrate with a die-cavity sidewall can have good adhesion.

Abstract translation: 公开了一种用于制造具有模腔侧壁的粘合剂基材的方法。 用于形成模腔侧壁的区域限定在衬底的一个表面上。 基板与牺牲膜层叠，在基板和牺牲膜之间形成部分固化的树脂。 然后，将孔径穿过衬底，部分固化的树脂和牺牲膜。 孔对应于该区域定位，使得基底具有形成在孔内的模腔侧壁。 此后，去除牺牲膜以暴露基板上的部分固化的树脂，使得具有模腔侧壁的基板可以具有良好的粘附性。

公开(公告)号：US20060205119A1

公开(公告)日：2006-09-14

申请号：US11078384

申请日：2005-03-14

Applicant: Bernd Appelt ,  Ching-Hua Tsao

Inventor： Bernd Appelt ,  Ching-Hua Tsao

IPC: H01L21/50

CPC classification number: H01L23/13 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing a semiconductor package with a laminated chip cavity is disclosed. A board and a metal foil having a layer of adhesive resin are provided. The metal foil is laminated with the board to make the adhesive resin be attached to the board. Next, a through opening is formed to pass through the board, the adhesive resin and the metal foil. Next, the metal foil is removed to expose an adhesive surface of the adhesive resin on the board so as to attach a carrier plate, thereby forming a chip cavity.

Abstract translation: 公开了一种用于制造具有层叠芯片空腔的半导体封装的方法。 提供了具有粘合树脂层的板和金属箔。 将金属箔与板层叠以使粘合剂树脂附着到板上。 接下来，形成贯通板，粘合树脂和金属箔的贯通孔。 接下来，去除金属箔以暴露板上的粘合剂树脂的粘合剂表面，以便附接载板，从而形成芯片腔。