公开(公告)号：US10175949B2

公开(公告)日：2019-01-08

申请号：US15697370

申请日：2017-09-06

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G06F7/58 ,  H03K19/21 ,  H03K3/84

摘要： Implementations of data compilers may include: a physical device including a physical parameter, the physical parameter including at least three states. The data compiler may also include a data stream generated from the physical parameter. The data stream may include a plurality of bits. Each bit may be coded with one of a 0, a 1, and an X; the 0, the 1, and the X may correspond with one of the at least three states of the physical parameter, respectively. The data compiler may also include an exclusive OR (XOR) data processor. The XOR processor may be configured to randomize the at least three states of the data stream and output a randomized output data stream.

公开(公告)号：US20120250391A1

公开(公告)日：2012-10-04

申请号：US13430963

申请日：2012-03-27

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G11C11/22

CPC分类号： G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/5607 ,  G11C15/02 ,  G11C15/046

摘要： The present disclosure concerns a MRAM cell comprising a first tunnel barrier layer comprised between a soft ferromagnetic layer having a free magnetization and a first hard ferromagnetic layer having a first storage magnetization; a second tunnel barrier layer comprised between the soft ferromagnetic layer and a second hard ferromagnetic layer having a second storage magnetization; the first storage magnetization being freely orientable at a first high predetermined temperature threshold and the second storage magnetization being freely orientable at a second predetermined high temperature threshold; the first high predetermined temperature threshold being higher than the second predetermined high temperature threshold. The MRAM cell can be used as a ternary content addressable memory (TCAM) and store up to three distinct state levels. The MRAM cell has a reduced size and can be made at low cost.

摘要翻译： 本公开涉及一种MRAM单元，其包括第一隧道势垒层，其包括具有自由磁化的软铁磁层和具有第一存储磁化的第一硬铁磁层; 第二隧道势垒层，包括在所述软铁磁层和具有第二存储磁化的第二硬铁磁层之间; 所述第一存储磁化可在第一高预定温度阈值自由定向，并且所述第二存储磁化可自由地定向在第二预定高温阈值; 第一高预定温度阈值高于第二预定高温阈值。 MRAM单元可用作三元内容可寻址存储器（TCAM），并存储多达三个不同的状态级别。 MRAM电池具有减小的尺寸并且可以以低成本制造。

公开(公告)号：US5283454A

公开(公告)日：1994-02-01

申请号：US943642

申请日：1992-09-11

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： H01L21/336 ,  H01L21/74 ,  H01L29/10 ,  H01L29/41 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/66712 ,  H01L21/74 ,  H01L29/41 ,  H01L29/7809 ,  H01L29/1079 ,  H01L29/41766

摘要： A metal or silicide buried layer in MOS semiconductor devices provides a drain contact on the upper surface of the device with a greatly reduced resistance. The methods of manufacture include depositing the buried layer, rather than diffusing, so that interference with other components is greatly reduced and spacing between components is reduced to reduce the over-all size of the device.

摘要翻译： MOS半导体器件中的金属或硅化物掩埋层在器件的上表面上提供大大降低的电阻的漏极接触。 制造方法包括沉积掩埋层而不是扩散，使得与其它部件的干涉大大降低，并且减小部件之间的间隔以减小装置的整体尺寸。

公开(公告)号：US08630112B2

公开(公告)日：2014-01-14

申请号：US13281507

申请日：2011-10-26

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G11C11/00

CPC分类号： G11C11/1675 ,  G11C11/16 ,  G11C11/5607 ,  Y10S977/933 ,  Y10S977/935

摘要： The present disclosure concerns a multilevel magnetic element comprising a first tunnel barrier layer between a soft ferromagnetic layer having a magnetization that can be freely aligned and a first hard ferromagnetic layer having a magnetization that is fixed at a first high temperature threshold and freely alignable at a first low temperature threshold. The magnetic element further comprises a second tunnel barrier layer and a second hard ferromagnetic layer having a magnetization that is fixed at a second high temperature threshold and freely alignable at a first low temperature threshold; the soft ferromagnetic layer being comprised between the first and second tunnel barrier layers. The magnetic element disclosed herein allows for writing four distinct levels using only a single current line.

摘要翻译： 本公开涉及一种多电平磁性元件，其包括在具有可自由对准的磁化的软铁磁层之间的第一隧道势垒层和具有固定在第一高温阈值的磁化的第一硬铁磁层，并且可在 第一低温阈值。 磁性元件还包括第二隧道势垒层和具有固定在第二高温阈值并且可在第一低温阈值自由对准的磁化的第二硬铁磁层; 软铁磁层包括在第一和第二隧道势垒层之间。 这里公开的磁性元件允许仅使用单个电流线来写入四个不同的电平。

公开(公告)号：US20120120720A1

公开(公告)日：2012-05-17

申请号：US13281507

申请日：2011-10-26

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G11C11/16 ,  H01L29/82

CPC分类号： G11C11/1675 ,  G11C11/16 ,  G11C11/5607 ,  Y10S977/933 ,  Y10S977/935

摘要： The present disclosure concerns a multilevel magnetic element comprising a first tunnel barrier layer between a soft ferromagnetic layer having a magnetization that can be freely aligned and a first hard ferromagnetic layer having a magnetization that is fixed at a first high temperature threshold and freely alignable at a first low temperature threshold. The magnetic element further comprises a second tunnel barrier layer and a second hard ferromagnetic layer having a magnetization that is fixed at a second high temperature threshold and freely alignable at a first low temperature threshold; the soft ferromagnetic layer being comprised between the first and second tunnel barrier layers. The magnetic element disclosed herein allows for writing four distinct levels using only a single current line.

摘要翻译： 本公开涉及一种多电平磁性元件，其包括在具有可自由对准的磁化的软铁磁层之间的第一隧道势垒层和具有固定在第一高温阈值的磁化的第一硬铁磁层，并且可在 第一低温阈值。 磁性元件还包括第二隧道势垒层和具有固定在第二高温阈值并且可在第一低温阈值自由对准的磁化的第二硬铁磁层; 软铁磁层包括在第一和第二隧道势垒层之间。 这里公开的磁性元件允许仅使用单个电流线来写入四个不同的电平。

公开(公告)号：US5070382A

公开(公告)日：1991-12-03

申请号：US395695

申请日：1989-08-18

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/74 ,  H01L21/761 ,  H01L21/8234 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L29/78

CPC分类号： H01L27/088

摘要： A semiconductor structure for high power integrated circuits is fabricated having a substrate, a first and second epitaxial layer, each having a patterned buried layer, and a third epitaxial layer in which power, logic and analogic devices are formed. The power device is formed in an isolated region of the third epitaxial layer over the buried layers, which provide for good electrical contact to the back of the substrate. The analogic and logic devices are formed in the third epitaxial layer outside the isolated region of the power device. The thickness of the first and second epitaxial layers reduces the NPN parasitic transistor effect. The first epitaxial layer may be fabricated with a lower resistivity to further reduce the parasitic NPN transistor effect. The second epitaxial layer can be of a higher resistivity in order to reduce autodoping of the third epitaxial layer.

公开(公告)号：US20180067725A1

公开(公告)日：2018-03-08

申请号：US15697370

申请日：2017-09-06

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G06F7/58 ,  H03K19/21

CPC分类号： G06F7/588 ,  H03K3/84 ,  H03K19/21

摘要： Implementations of data compilers may include: a physical device including a physical parameter, the physical parameter including at least three states. The data compiler may also include a data stream generated from the physical parameter. The data stream may include a plurality of bits. Each bit may be coded with one of a 0, a 1, and an X; the 0, the 1, and the X may correspond with one of the at least three states of the physical parameter, respectively. The data compiler may also include an exclusive OR (XOR) data processor. The XOR processor may be configured to randomize the at least three states of the data stream and output a randomized output data stream.

公开(公告)号：US09007807B2

公开(公告)日：2015-04-14

申请号：US13430963

申请日：2012-03-27

申请人： Bertrand Cambou

发明人： Bertrand Cambou

IPC分类号： G11C11/22 ,  G11C15/04 ,  G11C11/56 ,  G11C15/02

CPC分类号： G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/5607 ,  G11C15/02 ,  G11C15/046

摘要： The present disclosure concerns a MRAM cell comprising a first tunnel barrier layer comprised between a soft ferromagnetic layer having a free magnetization and a first hard ferromagnetic layer having a first storage magnetization; a second tunnel barrier layer comprised between the soft ferromagnetic layer and a second hard ferromagnetic layer having a second storage magnetization; the first storage magnetization being freely orientable at a first high predetermined temperature threshold and the second storage magnetization being freely orientable at a second predetermined high temperature threshold; the first high predetermined temperature threshold being higher than the second predetermined high temperature threshold. The MRAM cell can be used as a ternary content addressable memory (TCAM) and store up to three distinct state levels. The MRAM cell has a reduced size and can be made at low cost.

摘要翻译： 本公开涉及一种MRAM单元，其包括包含具有自由磁化的软铁磁层和具有第一存储磁化的第一硬铁磁层之间的第一隧道势垒层; 第二隧道势垒层，包括在所述软铁磁层和具有第二存储磁化的第二硬铁磁层之间; 所述第一存储磁化可在第一高预定温度阈值自由定向，并且所述第二存储磁化可自由地定向在第二预定高温阈值; 第一高预定温度阈值高于第二预定高温阈值。 MRAM单元可用作三元内容可寻址存储器（TCAM），并存储多达三个不同的状态级别。 MRAM电池具有减小的尺寸并且可以以低成本制造。