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    Forming facet-less epitaxy with a cut mask
    1.
    发明授权
    Forming facet-less epitaxy with a cut mask 有权
    用切割面罩形成小面外延

    公开(公告)号：US08658486B2

    公开(公告)日：2014-02-25

    申请号：US13478411

    申请日：2012-05-23

    申请人： Michael Vincent Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    发明人： Michael Vincent Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/336 ,  H01L21/8234

    CPC分类号： H01L21/823807 ,  H01L21/76897 ,  H01L21/823814 ,  H01L29/66636 ,  H01L29/78

    摘要： A method of forming a semiconductor structure on a substrate is provided. The method may include preparing a continuous active layer on a region of the substrate and depositing a first raised epitaxial layer on a first region of the continuous active layer. A second raised epitaxial layer is also deposited on a second region of the continuous active layer such that the first raised epitaxial layer is in close proximity to the second raised epitaxial layer. A mask may be used to etch a trench structure into the continuous active layer at both the first and the second raised epitaxial layer, whereby the etched trench structure is filled with isolation material for electrically isolating the first raised epitaxial layer from the second raised epitaxial layer.

    摘要翻译： 提供了在基板上形成半导体结构的方法。 该方法可以包括在衬底的区域上制备连续的有源层并且在连续有源层的第一区域上沉积第一凸起的外延层。 第二凸起外延层也沉积在连续有源层的第二区上，使得第一凸起外延层紧邻第二凸起外延层。 可以使用掩模将沟槽结构蚀刻到第一和第二凸起外延层两端的连续有源层，由此蚀刻沟槽结构填充有用于将第一凸起外延层与第二凸起外延层电隔离的隔离材料 。

    FORMING FACET-LESS EPITAXY WITH SELF-ALIGNED ISOLATION
    2.
    发明申请
    FORMING FACET-LESS EPITAXY WITH SELF-ALIGNED ISOLATION 有权
    具有自对准隔离的成形面较小的外观

    公开(公告)号：US20140027820A1

    公开(公告)日：2014-01-30

    申请号：US13556406

    申请日：2012-07-24

    申请人： Michael V. Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    发明人： Michael V. Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    IPC分类号： H01L21/336 ,  H01L29/78

    CPC分类号： H01L21/76232 ,  H01L29/66628 ,  H01L29/66636

    摘要： A method of forming a semiconductor structure may include preparing a continuous active layer in a region of the substrate and forming a plurality of adjacent gates on the continuous active layer. A first raised epitaxial layer may be deposited on a recessed region of the continuous active layer between a first and a second one of the plurality of gates, whereby the first and second gates are adjacent. A second raised epitaxial layer may be deposited on another recessed region of the continuous active layer between the second and a third one of the plurality of gates, whereby the second and third gates are adjacent. Using a cut mask, a trench structure is etched into the second gate structure and a region underneath the second gate in the continuous active layer. The trench is filled with isolation material for electrically isolating the first and second raised epitaxial layers.

    摘要翻译： 形成半导体结构的方法可以包括在衬底的区域中制备连续有源层，并在连续有源层上形成多个相邻栅极。 第一凸起的外延层可以沉积在多个栅极中的第一和第二栅极之间的连续有源层的凹陷区域上，由此第一和第二栅极相邻。 第二凸起的外延层可以沉积在多个栅极中的第二和第三栅极之间的连续有源层的另一个凹陷区域上，由此第二和第三栅极相邻。 使用切割掩模，沟槽结构被蚀刻到第二栅极结构中以及连续有源层中的第二栅极下方的区域。 沟槽填充有用于电隔离第一和第二凸起外延层的隔离材料。

    PASSENGER DISCRIMINATING APPARATUS EMPLOYING TWO LOAD SENSORS
    4.
    发明申请
    PASSENGER DISCRIMINATING APPARATUS EMPLOYING TWO LOAD SENSORS 有权
    乘客识别装置使用两个负载传感器

    公开(公告)号：US20090151477A1

    公开(公告)日：2009-06-18

    申请号：US12038306

    申请日：2008-02-27

    申请人： Jae Ho HWANG ,  Byeong Yeol KIM

    发明人： Jae Ho HWANG ,  Byeong Yeol KIM

    IPC分类号： G01L1/04 ,  G01G9/00

    CPC分类号： B60R21/01516

    摘要： A passenger discriminating apparatus according to the present invention includes a plurality of load sensors for measuring a load of a passenger, which is applied to a passenger seat disposed within a vehicle, and a pair of dummy sensors configured to support the load of the passenger seat and not having a load sensing function. The type of the passenger is discriminated by comparing a sum of values in which the load values measured by the plurality of load sensors, respectively, are multiplied by a load weight of the load sensors and a reference value. Accordingly, the passenger discriminating apparatus can save the prime cost, reduce its weight, and secure an equivalent or more performance.

    摘要翻译： 根据本发明的乘客识别装置包括多个用于测量乘客负载的负载传感器，该负载传感器应用于设置在车辆内的乘客座椅上，以及一对虚拟传感器，其构造成支撑乘客座椅的负载 并且没有负载感测功能。 通过将由多个负载传感器测量的负载值分别乘以负载传感器的负载重量和参考值的值的总和来区分乘客的类型。 因此，乘客鉴别装置可以节省主要成本，减轻其重量并确保相当或更多的性能。

    FORMING FACET-LESS EPITAXY WITH A CUT MASK
    5.
    发明申请
    FORMING FACET-LESS EPITAXY WITH A CUT MASK 有权
    用切割面膜形成面积小的外观

    公开(公告)号：US20130313647A1

    公开(公告)日：2013-11-28

    申请号：US13478411

    申请日：2012-05-23

    申请人： Michael Vincent Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    发明人： Michael Vincent Aquilino ,  Byeong Yeol Kim ,  Ying Li ,  Carl John Radens

    IPC分类号： H01L21/8234 ,  H01L27/088

    CPC分类号： H01L21/823807 ,  H01L21/76897 ,  H01L21/823814 ,  H01L29/66636 ,  H01L29/78

    摘要： A method of forming a semiconductor structure on a substrate is provided. The method may include preparing a continuous active layer on a region of the substrate and depositing a first raised epitaxial layer on a first region of the continuous active layer. A second raised epitaxial layer is also deposited on a second region of the continuous active layer such that the first raised epitaxial layer is in close proximity to the second raised epitaxial layer. A mask may be used to etch a trench structure into the continuous active layer at both the first and the second raised epitaxial layer, whereby the etched trench structure is filled with isolation material for electrically isolating the first raised epitaxial layer from the second raised epitaxial layer.

    摘要翻译： 提供了在基板上形成半导体结构的方法。 该方法可以包括在衬底的区域上制备连续的有源层并且在连续有源层的第一区域上沉积第一凸起的外延层。 第二凸起外延层也沉积在连续有源层的第二区上，使得第一凸起外延层紧邻第二凸起外延层。 可以使用掩模将沟槽结构蚀刻到第一和第二凸起外延层两端的连续有源层，由此蚀刻沟槽结构填充有用于将第一凸起外延层与第二凸起外延层电隔离的隔离材料 。

    Passenger discriminating apparatus employing two load sensors
    6.
    发明授权
    Passenger discriminating apparatus employing two load sensors 有权
    乘客识别装置采用两个负载传感器

    公开(公告)号：US07762149B2

    公开(公告)日：2010-07-27

    申请号：US12038306

    申请日：2008-02-27

    申请人： Jae Ho Hwang ,  Byeong Yeol Kim

    发明人： Jae Ho Hwang ,  Byeong Yeol Kim

    IPC分类号： G01L1/00

    CPC分类号： B60R21/01516

    摘要： A passenger discriminating apparatus according to the present invention includes a plurality of load sensors for measuring a load of a passenger, which is applied to a passenger seat disposed within a vehicle, and a pair of dummy sensors configured to support the load of the passenger seat and not having a load sensing function. The type of the passenger is discriminated by comparing a sum of values in which the load values measured by the plurality of load sensors, respectively, are multiplied by a load weight of the load sensors and a reference value. Accordingly, the passenger discriminating apparatus can save the prime cost, reduce its weight, and secure an equivalent or more performance.

    摘要翻译： 根据本发明的乘客识别装置包括多个用于测量乘客负载的负载传感器，该负载传感器应用于设置在车辆内的乘客座椅上，以及一对虚拟传感器，其构造成支撑乘客座椅的负载 并且没有负载感测功能。 通过将由多个负载传感器测量的负载值分别乘以负载传感器的负载重量和参考值的值的总和来区分乘客的类型。 因此，乘客鉴别装置可以节省主要成本，减轻其重量并确保相当或更多的性能。

    STRUCTURES, FABRICATION METHODS, DESIGN STRUCTURES FOR STRAINED FIN FIELD EFFECT TRANSISTORS (FINFETS)
    8.
    发明申请
    STRUCTURES, FABRICATION METHODS, DESIGN STRUCTURES FOR STRAINED FIN FIELD EFFECT TRANSISTORS (FINFETS) 有权
    结构，制造方法，应变金属场效应晶体管的设计结构（FINFETS）

    公开(公告)号：US20090321828A1

    公开(公告)日：2009-12-31

    申请号：US12146728

    申请日：2008-06-26

    申请人： Xiaomeng Chen ,  Byeong Yeol Kim ,  Mahender Kumar ,  Huilong Zhu

    发明人： Xiaomeng Chen ,  Byeong Yeol Kim ,  Mahender Kumar ,  Huilong Zhu

    IPC分类号： H01L29/00 ,  H01L21/20

    CPC分类号： H01L29/7848 ,  H01L29/66795 ,  H01L29/785

    摘要： A semiconductor structure, a fabrication method, and a design structure for a FinFet. The FinFet includes a dielectric layer, a central semiconductor fin region on the dielectric layer, a first semiconductor seed region on the dielectric layer, and a first strain creating fin region. The first semiconductor seed region is sandwiched between the first strain creating fin region and the dielectric layer. The first semiconductor seed region includes a first semiconductor material. The first strain creating fin region includes the first semiconductor material and a second semiconductor material different than the first semiconductor material. A first atom percent of the first semiconductor material in the first semiconductor seed region is different than a second atom percent of the first semiconductor material in the first strain creating fin region.

    摘要翻译： FinFet的半导体结构，制造方法和设计结构。 FinFet包括电介质层，电介质层上的中央半导体鳍片区域，电介质层上的第一半导体种子区域和第一应变产生鳍片区域。 第一半导体种子区域夹在第一应变产生鳍区域和电介质层之间。 第一半导体种子区域包括第一半导体材料。 第一应变产生鳍区域包括第一半导体材料和与第一半导体材料不同的第二半导体材料。 第一半导体晶种区域中的第一半导体材料的第一原子百分比不同于第一应变产生鳍区域中的第一半导体材料的第二原子百分比。

    Method for forming isolation regions in a semiconductor memory device
    10.
    发明授权
    Method for forming isolation regions in a semiconductor memory device 失效
    在半导体存储器件中形成隔离区域的方法

    公开(公告)号：US5372950A

    公开(公告)日：1994-12-13

    申请号：US845705

    申请日：1992-03-04

    申请人： Yun-gi Kim ,  Cheon-su Bhan ,  Byeong-yeol Kim

    发明人： Yun-gi Kim ,  Cheon-su Bhan ,  Byeong-yeol Kim

    IPC分类号： H01L21/76 ,  H01L21/316 ,  H01L21/32 ,  H01L21/762

    CPC分类号： H01L21/76213 ,  H01L21/32 ,  Y10S438/911

    摘要： A method for forming an isolation region within a semiconductor device is disclosed. A trench is first formed in a predefined isolation region of a semiconductor substrate. An oxidation blocking material is injected into the inside walls of the trench before growing a field oxide film inside the trench. Accordingly, the present invention can simplify the fabrication of isolation regions within a semiconductor device by directly implanting the oxidation blocking material at a predetermined angle into the inside walls of the trench which constitutes the isolation region. In the present invention, unlike conventional fabrication processes using spacers to prevent penetration of a field oxide film into the surface of semiconductor non-isolation regions, the need for spacers is obviated.

    摘要翻译： 公开了一种在半导体器件内形成隔离区域的方法。 首先在半导体衬底的预定隔离区中形成沟槽。 在沟槽内生长场氧化物膜之前，将氧化阻挡材料注入沟槽的内壁。 因此，本发明可以通过将预定角度的氧化阻挡材料直接注入构成隔离区域的沟槽的内壁来简化半导体器件内的隔离区的制造。 在本发明中，与使用间隔物以防止场氧化物膜渗透到半导体非隔离区域的表面中的常规制造方法不同，不需要间隔物。