公开(公告)号：US08460949B2

公开(公告)日：2013-06-11

申请号：US12648358

申请日：2009-12-29

申请人： Chang Hee Hong ,  Hyung Gu Kim

发明人： Chang Hee Hong ,  Hyung Gu Kim

IPC分类号： H01L33/00

CPC分类号： H01L33/22 ,  H01L33/007 ,  H01L33/20

摘要： Disclosed are a light emitting device having at least one air bar capable of improving light extracting efficiency and a method of manufacturing the same. With the present invention, there is provided a method of manufacturing a light emitting device including a semiconductor layer(s) having an air-bar layer(s) with a plurality of air bars. The method includes at least one process cycle for forming the semiconductor layer(s). The process cycle includes: forming a patterning thin-film layer on a substrate or a thin-film layer; forming on the patterning thin-film layer an etching guide pattern and an air-bar pattern connected to the etching guide pattern; forming a semiconductor layer(s) on the patterns and exposing the etching guide pattern; wet-etch the exposed etching guide pattern by using a wet-etching solution; and etch the air-bar pattern connected to the etching guide pattern.

摘要翻译： 公开了具有能够提高光提取效率的至少一个气棒的发光装置及其制造方法。 通过本发明，提供一种制造发光器件的方法，该发光器件包括具有多个气棒的空气棒层的半导体层。 该方法包括用于形成半导体层的至少一个工艺循环。 工艺循环包括：在衬底或薄膜层上形成图案化薄膜层; 在图案化薄膜层上形成蚀刻引导图案和连接到蚀刻引导图案的空气棒图案; 在所述图案上形成半导体层并暴露所述蚀刻引导图案; 通过使用湿蚀刻溶液湿蚀刻暴露的蚀刻导向图案; 并蚀刻连接到蚀刻引导图案的气条图案。

公开(公告)号：US07619444B1

公开(公告)日：2009-11-17

申请号：US11299080

申请日：2005-12-08

申请人： Ashfaq R. Shaikh ,  Chang Hee Hong ,  Ting-Sheng Ku

发明人： Ashfaq R. Shaikh ,  Chang Hee Hong ,  Ting-Sheng Ku

IPC分类号： H03K19/0175 ,  H03K19/094

CPC分类号： H03K19/017545

摘要： Techniques and circuits for ensuring one or more circuit components are not subjected to voltage levels above their rated voltage tolerance due to core logic and I/O logic supply voltages reaching final voltage levels at different times are provided. According to some embodiments, an internal voltage supply sense circuit may monitor a level of a voltage supply that powers core logic that generates control signals used to program a voltage regulator. In response to determining the core logic voltage supply is below a predetermined level, the sense circuit may generate one or more regulated voltage signals to override regulated voltage signals generated by the voltage regulator.

摘要翻译： 确保一个或多个电路组件的技术和电路由于核心逻辑而不会受到高于其额定电压容限的电压电平，并且提供了在不同时间达到最终电压电平的I / O逻辑电源电压。 根据一些实施例，内部电压供应检测电路可以监视为产生用于编程电压调节器的控制信号的核心逻辑供电的电压电平的电平。 响应于确定核心逻辑电压电源低于预定电平，感测电路可以产生一个或多个调节电压信号以覆盖由电压调节器产生的调节电压信号。

公开(公告)号：US08344401B2

公开(公告)日：2013-01-01

申请号：US12724791

申请日：2010-03-16

申请人： Hyun Kyong Cho ,  Hyun Don Song ,  Chang Hee Hong ,  Hyung Gu Kim

发明人： Hyun Kyong Cho ,  Hyun Don Song ,  Chang Hee Hong ,  Hyung Gu Kim

IPC分类号： H01L33/00

CPC分类号： H01L33/20 ,  F21K9/23 ,  F21Y2113/13 ,  F21Y2115/10 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/16 ,  H01L33/382 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

摘要： Provided are a light emitting device, a light emitting device package and a lighting system including the same. The light emitting device (LED) comprises a light emitting structure comprising a second conductive type semiconductor layer, an active layer, and a first conductive type semiconductor layer and a first electrode over the light emitting structure. A portion of the light emitting structure is sloped at a predetermined angle.

摘要翻译： 提供了一种发光器件，发光器件封装以及包括该发光器件的照明系统。 发光器件（LED）包括发光结构，该发光结构包括在发光结构上的第二导电类型半导体层，有源层和第一导电类型半导体层以及第一电极。 发光结构的一部分以预定角度倾斜。

公开(公告)号：US20100163906A1

公开(公告)日：2010-07-01

申请号：US12648358

申请日：2009-12-29

申请人： Chang Hee Hong ,  Hyung Gu Kim

发明人： Chang Hee Hong ,  Hyung Gu Kim

IPC分类号： H01L33/00

CPC分类号： H01L33/22 ,  H01L33/007 ,  H01L33/20

摘要： Disclosed are a light emitting device having at least one air bar capable of improving light extracting efficiency and a method of manufacturing the same. With the present invention, there is provided a method of manufacturing a light emitting device including a semiconductor layer(s) having an air-bar layer(s) with a plurality of air bars. The method includes at least one process cycle for forming the semiconductor layer(s). The process cycle includes: forming a patterning thin-film layer on a substrate or a thin-film layer; forming on the patterning thin-film layer an etching guide pattern and an air-bar pattern connected to the etching guide pattern; forming a semiconductor layer(s) on the patterns and exposing the etching guide pattern; wet-etch the exposed etching guide pattern by using a wet-etching solution; and etch the air-bar pattern connected to the etching guide pattern.

摘要翻译： 公开了具有能够提高光提取效率的至少一个气棒的发光装置及其制造方法。 通过本发明，提供一种制造发光器件的方法，该发光器件包括具有多个气棒的空气棒层的半导体层。 该方法包括用于形成半导体层的至少一个工艺循环。 工艺循环包括：在衬底或薄膜层上形成图案化薄膜层; 在图案化薄膜层上形成蚀刻引导图案和连接到蚀刻引导图案的空气棒图案; 在所述图案上形成半导体层并暴露所述蚀刻引导图案; 通过使用湿蚀刻溶液湿蚀刻暴露的蚀刻导向图案; 并蚀刻连接到蚀刻引导图案的气条图案。

公开(公告)号：US07570088B1

公开(公告)日：2009-08-04

申请号：US11293627

申请日：2005-12-01

申请人： Ting-Sheng Ku ,  Chang Hee Hong ,  Ashfaq R. Shaikh ,  Shifeng Yu

发明人： Ting-Sheng Ku ,  Chang Hee Hong ,  Ashfaq R. Shaikh ,  Shifeng Yu

IPC分类号： H03K3/00

CPC分类号： H03K19/00315

摘要： Embodiments for providing a plurality of bias voltages to input/output circuitry are disclosed.

摘要翻译： 公开了向输入/输出电路提供多个偏置电压的实施例。

公开(公告)号：US06363020B1

公开(公告)日：2002-03-26

申请号：US09455045

申请日：1999-12-06

申请人： Alex Shubat ,  Chang Hee Hong

发明人： Alex Shubat ,  Chang Hee Hong

IPC分类号： G11C700

CPC分类号： G11C29/848 ,  G11C29/785 ,  G11C29/802

摘要： A semiconductor memory architecture for embedded memory instances having redundancy. A fuse box register is provided outside the memory macro associated with the memory instances. The memory instances are daisy-chained to the fuse box register containing a plurality of fuses used for storing fuse data associated with the defective rows and columns of main memory. During power-up or after blowing the fuses, the contents of the fuses (i.e., fuse data) are transferred to a plurality of volatile redundancy scan flip-flops. The fuse box is then deactivated to eliminate quiescent current through the fuses. The redundancy scan flip-flops, connected in a scan chain, are located inside the fuse box as well as the memory instances. During the shifting mode of operation, the fuse contents are scanned into individual flip-flops, organized as scan registers for row redundancy and column redundancy, of the memory instances. Redundant elements are pre-tested by bypassing the fuses and directly scanning in arbitrary patterns into the redundancy scan flip-flops (override mode operation). The contents of row redundancy scan register (i.e., faulty wordline address information) are compared with an incoming wordline address and if there is a match found, the primary wordline or wordlines are de-selected and the redundant wordline or wordlines are selected.

摘要翻译： 一种具有冗余性的嵌入式存储器实例的半导体存储器架构。 在与存储器实例相关联的存储器宏之外提供保险丝盒寄存器。 存储器实例被菊花链连接到保险丝盒寄存器，其包含用于存储与主存储器的有缺陷行和列相关联的熔丝数据的多个熔丝。 在上电期间或在熔断保险丝之后，保险丝（即，熔丝数据）的内容被传送到多个易失性冗余扫描触发器。 然后禁用保险丝盒以消除通过保险丝的静态电流。 连接在扫描链中的冗余扫描触发器位于保险丝盒内部以及存储器实例中。 在移动操作模式期间，熔丝内容被扫描到单独的触发器中，被组织为存储器实例的行冗余和列冗余的扫描寄存器。 冗余元件通过旁路保险丝并以任意图案直接扫描到冗余扫描触发器（覆盖模式操作）中进行预测试。 将行冗余扫描寄存器的内容（即，错误的字线地址信息）与输入字线地址进行比较，并且如果找到匹配项，则取消选择主字线或字线，并选择冗余字线或字线。

公开(公告)号：US5886561A

公开(公告)日：1999-03-23

申请号：US749618

申请日：1996-11-18

申请人： Boaz Eitan ,  Chang Hee Hong

发明人： Boaz Eitan ,  Chang Hee Hong

IPC分类号： G01R19/165 ,  H02J9/06 ,  H03K17/62

CPC分类号： H02J9/061 ,  Y10T307/615

摘要： A switching circuit for switching between a main power supply and a battery power supply includes a comparator, a p-channel battery power transfer transistor, a p-channel main power transfer transistor and an inverter. The comparator operates on the main power supply and is connected on input to the main power supply and to the battery power supply. The comparator compares the voltage level of the main power supply with the voltage level of the battery power supply and provides a selection signal which is low when the voltage level of the battery power supply is higher than the voltage level of the main power supply. The p-channel battery power transfer transistor is controlled by the selection signal and transfers the battery supply signal to a switched power supply node. The inverter operates on the battery power supply and inverts the voltage level of the selection signal. The p-channel main power transfer transistor is controlled by the inverter and transfers the main power supply to the switched power supply node.

摘要翻译： 用于在主电源和电池电源之间切换的开关电路包括比较器，p沟道电池功率传输晶体管，p沟道主功率传输晶体管和反相器。 比较器在主电源上工作，并连接到主电源和电池电源的输入。 比较器将主电源的电压与电池电源的电压进行比较，并且当电池电源的电压高于主电源的电压时，提供低的选择信号。 p沟道电池电力传输晶体管由选择信号控制，并将电池电源信号传送到开关电源节点。 变频器对电池电源进行工作，并反转选择信号的电压电平。 p沟道主电力传输晶体管由逆变器控制，并将主电源传送到开关电源节点。

公开(公告)号：US5834859A

公开(公告)日：1998-11-10

申请号：US749617

申请日：1996-11-18

申请人： Boaz Eitan ,  Chang Hee Hong

发明人： Boaz Eitan ,  Chang Hee Hong

IPC分类号： G06F1/26 ,  G05F1/56 ,  G06F3/00 ,  G11C11/413 ,  G11C11/417 ,  H02J1/00 ,  H02J9/06 ,  H03K19/0175 ,  H03K19/017

CPC分类号： H02J9/061 ,  Y10T307/615 ,  Y10T307/625

摘要： The present invention is a battery backed output buffer which provides a well-defined signal, even during battery power. The buffer includes a regular output buffer for providing output data during operation with a main power supply and for switching to a tri-state during battery power. The buffer also includes a configurable battery backed output buffer which provides a predetermined output signal during battery operation and produces a signal in the tri-stated during main power operation.

摘要翻译： 本发明是一种电池供电的输出缓冲器，即使在电池供电期间也能提供良好定义的信号。 缓冲器包括一个常规输出缓冲器，用于在主电源运行期间提供输出数据，并在电池供电期间切换到三态。 缓冲器还包括可配置的电池供电输出缓冲器，其在电池操作期间提供预定的输出信号，并且在主电源操作期间在三态中产生信号。

公开(公告)号：US08232566B2

公开(公告)日：2012-07-31

申请号：US12772532

申请日：2010-05-03

申请人： Hyun Kyong Cho ,  Chang Hee Hong ,  Hyung Gu Kim

发明人： Hyun Kyong Cho ,  Chang Hee Hong ,  Hyung Gu Kim

IPC分类号： H01L33/00

CPC分类号： H01L33/44 ,  H01L33/02 ,  H01L33/16 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A light emitting device includes a first semiconductor layer of a first conductivity type, an active layer adjacent to the first semiconductor layer, a second semiconductor layer of a second conductivity type and provided adjacent to the active layer, and a passivation layer provided on a side surface of the active layer. The passivation layer may be a semiconductor layer of one of the first conductivity type, the second conductivity type or a first undoped semiconductor layer. A first electrode may be coupled to the first semiconductor layer and a second electrode may be coupled to the second semiconductor layer.

摘要翻译： 发光器件包括第一导电类型的第一半导体层，与第一半导体层相邻的有源层，第二导电类型的第二半导体层，并且邻近有源层设置钝化层， 活性层的表面。 钝化层可以是第一导电类型，第二导电类型或第一未掺杂半导体层之一的半导体层。 第一电极可以耦合到第一半导体层，并且第二电极可以耦合到第二半导体层。

公开(公告)号：US06556490B2

公开(公告)日：2003-04-29

申请号：US10099750

申请日：2002-03-15

申请人： Alex Shubat ,  Chang Hee Hong

发明人： Alex Shubat ,  Chang Hee Hong

IPC分类号： G11C700

CPC分类号： G11C29/848 ,  G11C29/785 ,  G11C29/802

摘要： A system and method for redundancy implementation in an integrated semiconductor device having at least one memory instance that includes a prime memory array and a redundant portion. A fuse box register is provided outside the memory macro cell associated with the memory instance. The fuse box register is operable to store location information pertaining to a faulty portion in the prime memory array. A redundancy scan storage element in the memory instance is operable to receive the location information from the fuse box register, which location information is used for replacing at least a part of the faulty portion in the prime memory array with at least a part of the redundant portion.