摘要:
A method of lithography patterning includes forming a mask layer on a material layer and forming a capping layer on the mask layer. The capping layer is a boron-containing layer with a higher resistance to an etching reaction of patterning process of the material layer. By adapting the boron-containing layer as the capping layer, the thickness of the mask layer can be thus reduced. Hence, a better gap filling for forming an interconnect metallization in the material layer could be achieved as well.
摘要:
An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging underlying material layers and electrical devices. The UV protection layer comprises a layer of silicon doped with an impurity, wherein the impurity comprises O, C, H, N, or combinations thereof. The UV protection layer may comprise SiOC:H, SiON, SiN, SiCO:H, combinations thereof, or multiple layers thereof, as examples.
摘要:
An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging underlying material layers and electrical devices. The UV protection layer comprises a layer of silicon doped with an impurity, wherein the impurity comprises O, C, H, N, or combinations thereof. The UV protection layer may comprise SiOC:H, SiON, SiN, SiCO:H, combinations thereof, or multiple layers thereof, as examples.
摘要:
Interconnect structures are provided. An exemplary embodiment of an interconnect structure comprises a substrate with a low-k dielectric layer thereon. A via opening and a trench opening are formed in the low-k dielectric layer, wherein the trench opening is formed over the via opening and the via opening exposes a portion of the substrate. A liner layer is formed on sidewalls of the low-k dielectric layer exposed by the trench and via protions and a bottom surface exposed by the trench via portion, wherein the portion of the liner layer on sidewalls of the low-k dielectric layer exposed by the trench and via protions and the portion of the liner layer formed on a bottom surface exposed by the trench portion comprise different materials. A conformal conductive barrier layer is formed in the trench and via openings, covering the liner layer and the exposed portion of the substrate. A conductive layer is formed on the conductive barrier layer, filling in the trench and via openings.
摘要:
An UV treatment for making a low-k dielectric layer having improved properties in a damascene structure. A low-k dielectric layer in a damascene structure is subjected to an UV treatment with He gas or H2 gas to eliminate etching damage to the exposed surfaces of the low-k dielectric layer.
摘要翻译:用于制造具有改进的镶嵌结构性能的低k电介质层的UV处理。 用Ho气体或H 2 O 2气体对镶嵌结构中的低k电介质层进行UV处理,以消除对低k电介质层的暴露表面的蚀刻损伤。
摘要:
A method for forming an interconnect structure. A substrate is provided with a low-k dielectric layer thereon. At least one conductive feature is then formed in the low-k dielectric layer. A cap layer is formed overlying the low-k dielectric layer, and the conductive feature and the low-k dielectric layer is then subjected to an energy source to reduce a dielectric constant thereof.
摘要:
A method of forming a low dielectric constant film that can be used in a damascene process is disclosed. An organosilicon precursor such as octamethylcyclotrisiloxane (OMCTS) or any other compound that contains Si, C, and H and optionally O is transported into a PECVD chamber with a carrier gas such as CO or CO2 to provide a soft oxidation environment that leads to a higher carbon content and low k value in the deposited film. The carrier gas may replace helium or argon that have a higher bombardment property that can damage the substrate. Since CO and CO2 can contribute carbon to the deposited film, a lower k value is achieved than when an inert carrier gas is employed. The deposited film can be employed, for example, as a dielectric layer in a damascene stack or as an etch stop layer.
摘要:
A method of forming a low-k dielectric material layer comprising the following steps. A first dielectric material sub-layer is formed over a substrate. The first dielectric material sub-layer is treated with an energy treatment to form a hardened layer on the upper surface of the first dielectric material sub-layer. A second dielectric material sub-layer is formed over the hardened layer, wherein the first dielectric sub-layer, the hardened layer and the second dielectric sub-layer comprise the low-k dielectric material layer. And a dual damascene structure and a dielectric material structure formed thereby.
摘要:
A foldable stick assembly includes a foldable tube unit, a sliding handle, a push rod unit, a ratchet socket, an upper ratchet, a pawl member, a lower ratchet, and a push block. The foldable tube unit includes a handle, an upper mounting tube, a lower mounting tube, an upper pivot sleeve, and a lower pivot sleeve. The push rod unit includes a main push rod and an upper push rod. Thus, the foldable stick assembly may be used to cut and remove the weeds and to loosen the soil. In addition, the foldable stick assembly is folded easily and conveniently, so that the volume of the foldable stick assembly is reduced, thereby facilitating storage and transportation of the foldable stick assembly, and thereby decreasing the cost of assembly.