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    EDUCATION MANAGEMENT SYSTEM AND METHOD FOR ENABLING CREDITS TO BE ADMITTED BASED ON TALENTS AND CAREERS
    1.
    发明申请
    EDUCATION MANAGEMENT SYSTEM AND METHOD FOR ENABLING CREDITS TO BE ADMITTED BASED ON TALENTS AND CAREERS 审中-公开
    教育管理制度和方法，用于根据招聘和招聘实行入学资格

    公开(公告)号：US20150356700A1

    公开(公告)日：2015-12-10

    申请号：US14763637

    申请日：2013-12-10

    申请人： Ki Chul HAM

    发明人： Ki Chul HAM

    IPC分类号： G06Q50/20 ,  G06Q10/10

    CPC分类号： G06Q50/2057 ,  G06Q10/10

    摘要： Provided are an education management system and an education management method which enable talents and careers to be admitted as credits, the education management system connected to a user terminal and an authentication server through a network, including: a receiving unit configured to receive career data from the user terminal; a career assessment unit configured to assess career matters included in the career data on the basis of predetermined standards; and a credit-awarding unit configured to give credits corresponding to grades resulting from career assessment for a student's major to the career matters.

    摘要翻译： 提供了一种教育管理系统和教育管理方法，使人才和职业被认可为信用，通过网络连接到用户终端和认证服务器的教育管理系统，包括：接收单元，被配置为从 用户终端; 一个职业评估单位，用于根据预定标准评估职业数据中包含的职业事项; 以及一个信用评估单位，配置为给学生的职业生涯职业评估所得到的成绩与职业生涯有关。

    Test tray for handler for testing semiconductor devices
    6.
    发明申请
    Test tray for handler for testing semiconductor devices 失效
    用于测试半导体器件的处理器的测试托盘

    公开(公告)号：US20060192583A1

    公开(公告)日：2006-08-31

    申请号：US11235248

    申请日：2005-09-27

    申请人： Chul Ham ,  Ho Song ,  Young Park ,  Jae Seo

    发明人： Chul Ham ,  Ho Song ,  Young Park ,  Jae Seo

    IPC分类号： G01R31/26

    CPC分类号： G01R1/04 ,  G01R31/2893

    摘要： A test tray for a handler for testing semiconductor devices is disclosed which is capable of reducing the costs and time taken for replacement of carrier modules, and achieving an enhancement in workability. The test tray includes a frame, pockets mounted to the frame while being uniformly spaced apart from one another, each of the pockets including a seat on which a semiconductor device is to be seated, latches mounted to the frame to be arranged in pairs for respective pockets such that the latches of each latch pair face each other at opposite sides of an associated one of the pockets, respectively, each of the latches being movable between a first position where the latch holds a semiconductor device seated in the seat of the associated pocket and a second position where the latch releases the held state of the semiconductor device, and latch operating members each mounted to the frame, and adapted to move an associated one of the latches between the first position and the second position, each of the latch operating members being separate from the associated latch.

    摘要翻译： 公开了一种用于测试半导体器件的处理器的测试盘，其能够降低更换载体模块所需的成本和时间，并且实现可加工性的提高。 测试托盘包括框架，在彼此均匀间隔地安装到框架上的袋子，每个凹穴包括座，半导体装置将要安置在其上，安装到框架的闩锁成对布置成相应的 每个闩锁组的闩锁分别在相关联的一个凹穴的相对侧彼此面对，每个闩锁可在第一位置和第二位置之间移动，该第一位置之间闩锁保持坐在相关联的口袋的座中的半导体器件 以及第二位置，其中所述闩锁释放所述半导体器件的保持状态，以及锁定每个安装到所述框架的操作构件，并且适于在所述第一位置和所述第二位置之间移动相关联的一个闩锁，所述闩锁操作 构件与相关联的闩锁分离。

    Handler for testing semiconductor devices
    7.
    发明申请
    Handler for testing semiconductor devices 失效

    公开(公告)号：US20070152655A1

    公开(公告)日：2007-07-05

    申请号：US11713683

    申请日：2007-03-05

    申请人： Chul Ham ,  Ho Song ,  Young Park ,  Woo Lim ,  Jae Seo

    发明人： Chul Ham ,  Ho Song ,  Young Park ,  Woo Lim ,  Jae Seo

    IPC分类号： G01R31/28

    CPC分类号： G01R31/2893 ,  G01R31/2867

    摘要： A handler for testing semiconductor devices is disclosed which is capable of simplifying the process carried out in an exchanging station, namely, the process of loading/unloading semiconductor devices in/from test trays, and greatly increasing the number of simultaneously testable semiconductor devices. The handler includes a loading station, an unloading station, test trays, an exchanging station comprising a horizontal moving unit for horizontally moving a selected one of the test trays by a predetermined pitch at a working place, a test station in which at least one test board having a plurality of test sockets to be electrically connected with semiconductor devices is mounted, the test station performing a test while connecting the semiconductor devices in one of the test trays, which is fed from the exchanging station to the test station, to the test sockets, device transfer units for transfer the semiconductor devices between the loading station and the exchanging station and between the exchanging station and the unloading station, respectively, and a tray transfer unit for transfer the test trays between the exchanging station and the test station.

    Sokcet assembly for testing semiconductor device
    8.
    发明申请
    Sokcet assembly for testing semiconductor device 失效
    用于测试半导体器件的Sokcet组件

    公开(公告)号：US20060170412A1

    公开(公告)日：2006-08-03

    申请号：US11196238

    申请日：2005-08-04

    申请人： Chan Park ,  Chul Ham ,  Young Park ,  Ho Song ,  Woo Lim ,  Jae Seo

    发明人： Chan Park ,  Chul Ham ,  Young Park ,  Ho Song ,  Woo Lim ,  Jae Seo

    IPC分类号： G01R31/28

    CPC分类号： G01R1/0433

    摘要： The present invention relates to a socket assembly for testing semiconductor device comprising a socket board electrically connected to an outside testing device wherein a plurality of connection pins connected to leads of a semiconductor is provided; a socket guide mounted to cover the socket board, with an open part formed so that the semiconductor may in/out, thereby connecting the semiconductor to the connection pins of the socket board; and a spacer interposed between the socket board and the socket guide for maintaining a predetermined distance between the semiconductor and the socket board by touching an surface of the semiconductor having moved into an inside of the socket guide before a surface of each carrier touches the socket guide. According to the present invention, the balls or the leads of each semiconductor may be pressed to the connection pins of the socket in a predetermined depth without replacing the carriers though the semiconductors have the different thicknesses.

    摘要翻译： 本发明涉及一种用于测试半导体器件的插座组件，包括：电连接到外部测试装置的插座板，其中提供连接到半导体引线的多个连接引脚; 安装成覆盖插座板的插座引导件，其形成为使得半导体可以进/出的开口部，从而将半导体连接到插座板的连接引脚; 以及插入在插座板和插座引导件之间的间隔件，用于通过在每个承载件的表面接触插座导向件之前触摸已经移动到插座导向件内部的半导体的表面来保持半导体和插座板之间的预定距离 。 根据本发明，通过半导体具有不同的厚度，每个半导体的球或引线可以以预定深度被压到插座的连接销上，而不需要更换载体。