公开(公告)号：US08665508B2

公开(公告)日：2014-03-04

申请号：US13568616

申请日：2012-08-07

申请人： Daniel Kucharski ,  Brian Welch ,  Sherif Abdalla

发明人： Daniel Kucharski ,  Brian Welch ,  Sherif Abdalla

IPC分类号： G02B26/00 ,  G02F1/01 ,  G02F1/03 ,  G02F1/07 ,  G02B26/06 ,  H04B10/50 ,  H04B10/54 ,  G02B26/08

CPC分类号： H04B10/5161 ,  G02B26/06 ,  G02B26/0841 ,  G02F1/0121 ,  G02F1/225 ,  G02F1/2255 ,  G02F2001/212 ,  G02F2201/58 ,  H04B10/0795 ,  H04B10/505 ,  H04B10/5053 ,  H04B10/541

摘要： Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by two or more electrical input signals. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers. Phase addition may be synchronized utilizing one or more electrical delay lines. The optical modulator may be integrated on a single substrate, which may include one of: silicon, gallium arsenide, germanium, indium gallium arsenide, polymers, or indium phosphide. The optical modulator may include a Mach-Zehnder interferometer or one or more ring modulators.

摘要翻译： 公开了使用集成光电子学来编码多电平脉冲幅度调制信号的方法和系统，并且可以包括利用由两个或多个电输入信号驱动的光调制器来产生多电平调幅光信号。 光调制器可以包括串联耦合并被配置成组的光调制器元件。 光学模块元件和组的数量可以配置多电平调幅光信号中的电平数量。 单元驱动器可以耦合到每个组。 电输入信号可以在将其传送到单元驱动器之前被同步。 可以使用一个或多个电延迟线来使相位相加同步。 光学调制器可以集成在单个衬底上，其可以包括硅，砷化镓，锗，砷化铟镓，聚合物或磷化铟中的一种。 光调制器可以包括马赫 - 曾德尔干涉仪或一个或多个环形调制器。

公开(公告)号：US20120315036A1

公开(公告)日：2012-12-13

申请号：US13568616

申请日：2012-08-07

申请人： Daniel Kucharski ,  Brian Welch ,  Sherif Abdalla

发明人： Daniel Kucharski ,  Brian Welch ,  Sherif Abdalla

IPC分类号： H04B10/04

CPC分类号： H04B10/5161 ,  G02B26/06 ,  G02B26/0841 ,  G02F1/0121 ,  G02F1/225 ,  G02F1/2255 ,  G02F2001/212 ,  G02F2201/58 ,  H04B10/0795 ,  H04B10/505 ,  H04B10/5053 ,  H04B10/541

摘要： Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by two or more electrical input signals. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers. Phase addition may be synchronized utilizing one or more electrical delay lines. The optical modulator may be integrated on a single substrate, which may include one of: silicon, gallium arsenide, germanium, indium gallium arsenide, polymers, or indium phosphide. The optical modulator may include a Mach-Zehnder interferometer or one or more ring modulators.

摘要翻译： 公开了使用集成光电子学来编码多电平脉冲幅度调制信号的方法和系统，并且可以包括利用由两个或多个电输入信号驱动的光调制器来产生多电平调幅光信号。 光调制器可以包括串联耦合并被配置成组的光调制器元件。 光学模块元件和组的数量可以配置多电平调幅光信号中的电平数量。 单元驱动器可以耦合到每个组。 电输入信号可以在将其传送到单元驱动器之前被同步。 可以使用一个或多个电延迟线来使相位相加同步。 光学调制器可以集成在单个衬底上，其可以包括硅，砷化镓，锗，砷化铟镓，聚合物或磷化铟中的一种。 光调制器可以包括马赫 - 曾德尔干涉仪或一个或多个环形调制器。

公开(公告)号：US20100060972A1

公开(公告)日：2010-03-11

申请号：US12555291

申请日：2009-09-08

申请人： Daniel Kucharski ,  Sherif Abdalla ,  Brian Welch

发明人： Daniel Kucharski ,  Sherif Abdalla ,  Brian Welch

IPC分类号： G02F1/21 ,  G02F1/01

CPC分类号： H04B10/5161 ,  G02B26/06 ,  G02B26/0841 ,  G02F1/0121 ,  G02F1/225 ,  G02F1/2255 ,  G02F2001/212 ,  G02F2201/58 ,  H04B10/0795 ,  H04B10/505 ,  H04B10/5053 ,  H04B10/541

摘要： Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by two or more electrical input signals. The optical modulator may include optical modulator elements coupled in series and configured into groups. The number of optical modular elements and groups may configure the number of levels in the multi-level amplitude modulated optical signal. Unit drivers may be coupled to each of the groups. The electrical input signals may be synchronized before communicating them to the unit drivers utilizing flip-flops. Phase addition may be synchronized utilizing one or more electrical delay lines. The optical modulator may be integrated on a single substrate, which may include one of: silicon, gallium arsenide, germanium, indium gallium arsenide, polymers, or indium phosphide. The optical modulator may include a Mach-Zehnder interferometer or one or more ring modulators.

公开(公告)号：US20100059822A1

公开(公告)日：2010-03-11

申请号：US12554449

申请日：2009-09-04

申请人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

发明人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

IPC分类号： H01L27/12 ,  H01L21/782

CPC分类号： H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

摘要翻译： 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的单个CMOS晶片上制造光子和电子器件。 利用体CMOS工艺和/或利用SOI CMOS工艺的SOI晶片，可以在绝缘体上半导体（SOI）晶片上制造器件。 可以使用双重SOI工艺和/或选择性区域生长工艺来制造不同的厚度。 可以利用一个或多个氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。 集成在CMOS晶片中的二氧化硅或硅锗可以用作蚀刻停止层。

公开(公告)号：US20070280576A1

公开(公告)日：2007-12-06

申请号：US11363512

申请日：2006-02-27

申请人： Daniel Kucharski ,  Behnam Analul ,  Lawrence Gunn ,  Roger Koumans ,  Thierry Pinquet ,  Thirnvikraman Sadagopan

发明人： Daniel Kucharski ,  Behnam Analul ,  Lawrence Gunn ,  Roger Koumans ,  Thierry Pinquet ,  Thirnvikraman Sadagopan

IPC分类号： G02B6/12 ,  G02F1/01

CPC分类号： H01S5/0265 ,  G02B2006/12142 ,  G02B2006/12159 ,  G02F1/0121 ,  G02F1/025 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2201/127 ,  G02F2201/16 ,  G02F2201/20 ,  H01S5/5027 ,  H04B10/5051 ,  H04B10/5053

摘要： High speed optical modulators can be made of k modulators connected in series disposed on one of a variety of semiconductor substrates. An electrical signal propagating in a microwave transmission line is tapped off of the transmission line at regular intervals and is amplified by k distributed amplifiers. Each of the outputs of the k distributed amplifiers is connected to a respective one of the k modulators. Distributed amplifier modulators can have much higher modulating speeds than a comparable lumped element modulator, due to the lower capacitance of each of the k modulators. Distributed amplifier modulators can have much higher modulating speeds than a comparable traveling wave modulator, due to the impedance matching provided by the distributed amplifiers.

摘要翻译： 高速光学调制器可以由串联设置在各种半导体衬底之一上的k个调制器组成。 在微波传输线中传播的电信号以规则的间隔从传输线路中分离出来，并由k个分布式放大器放大。 k个分布式放大器的每个输出连接到k个调制器中的相应一个。 分布式放大器调制器可以具有比可比较的集总元件调制器高得多的调制速度，这是由于每个k个调制器的电容较小。 由于分布式放大器提供的阻抗匹配，分布式放大器调制器可以具有比类似的行波调制器更高的调制速度。

公开(公告)号：US07154923B2

公开(公告)日：2006-12-26

申请号：US10925318

申请日：2004-08-24

申请人： Daniel Kucharski

发明人： Daniel Kucharski

IPC分类号： H01S3/13 ,  H01S3/10 ,  H03K3/00

CPC分类号： H01S5/042

摘要： Techniques are disclosed for providing modulation current that includes output impedance compensation with a feed-forward bandwidth enhancement and pre-distortion modulation to control waveform transition symmetry. A feedback circuit senses output node voltage and increases the overdrive voltage of a current source. This offsets the loss of current due to channel length modulation and increases the effective output impedance of the source. A feed-forward circuit enhances the bandwidth of the impedance compensation feedback loop. Waveform transition symmetry is improved by pre-distorting a laser modulation current by introducing an undershoot current on the falling edge of the modulating current.

摘要翻译： 公开了用于提供调制电流的技术，其包括具有前馈带宽增强和预失真调制的输出阻抗补偿以控制波形转换对称性。 反馈电路感测输出节点电压并增加电流源的过驱动电压。 这抵消了由于通道长度调制引起的电流损失，并增加了源的有效输出阻抗。 前馈电路增强了阻抗补偿反馈回路的带宽。 通过在调制电流的下降沿引入下冲电流来预激变激光调制电流来改善波形转变对称性。

公开(公告)号：US20060044072A1

公开(公告)日：2006-03-02

申请号：US10925318

申请日：2004-08-24

申请人： Daniel Kucharski

发明人： Daniel Kucharski

IPC分类号： H03C1/00

CPC分类号： H01S5/042

摘要： Techniques are disclosed for providing modulation current that includes output impedance compensation with a feed-forward bandwidth enhancement and pre-distortion modulation to control waveform transition symmetry. A feedback circuit senses output node voltage and increases the overdrive voltage of a current source. This offsets the loss of current due to channel length modulation and increases the effective output impedance of the source. A feed-forward circuit enhances the bandwidth of the impedance compensation feedback loop. Waveform transition symmetry is improved by pre-distorting a laser modulation current by introducing an undershoot current on the falling edge of the modulating current.

公开(公告)号：US20050264319A1

公开(公告)日：2005-12-01

申请号：US10857238

申请日：2004-05-28

申请人： Daniel Kucharski ,  Kevin Kornegay

发明人： Daniel Kucharski ,  Kevin Kornegay

IPC分类号： H03K3/2885 ,  H03K17/62 ,  H03K19/00 ,  H03K19/0175 ,  H03K19/086 ,  H03K19/20 ,  H03K19/21

CPC分类号： H03K3/2885 ,  H03K17/6264 ,  H03K19/001 ,  H03K19/086 ,  H03K19/212

摘要： A circuit topology for high speed low voltage logic circuits is disclosed that reduces the number of levels of stacked active circuit elements from 3 to 2. Circuits providing a variety of logic functions are presented, including a latch, an exclusive OR gate, a combination XOR and latch, a multiplexer and a demultiplexer. Circuits built according to the principles of the invention have been operated at speeds of 40 GHz. The circuit topology can operate at supply voltages as low as 2V (for silicon or silicon-germanium based devices) and provide power saving of 25%-50% or more, depending on the logic function. In some embodiments, circuits comprising single ended or differential inputs can be provided.

摘要翻译： 公开了一种用于高速低电压逻辑电路的电路拓扑，其将堆叠的有源电路元件的电平数量从3减少到2.提供了各种逻辑功能的电路，包括锁存器，异或门，组合XOR 并锁存，复用器和解复用器。 根据本发明的原理构建的电路已经以40GHz的速度运行。 电路拓扑可以在低至2V的电源电压（基于硅或硅锗器件）下工作，并且可根据逻辑功能提供25％-50％以上的功率节省。 在一些实施例中，可以提供包括单端或差分输入的电路。

公开(公告)号：US08895413B2

公开(公告)日：2014-11-25

申请号：US13364909

申请日：2012-02-02

申请人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

发明人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

IPC分类号： H01L27/12 ,  H01L21/782 ,  H01L21/84

CPC分类号： H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices bonded to at least a portion of each of the wafers together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.

摘要翻译： 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件，用于光子和电子器件，其结合到每个晶片的至少一部分 其中第一CMOS晶片包括光子器件，并且第二CMOS晶片包括电子器件。 电子器件可以利用穿硅通孔耦合到光学器件。 可以使用选择性区域生长过程来制造不同的厚度。 可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

公开(公告)号：US08877616B2

公开(公告)日：2014-11-04

申请号：US12554449

申请日：2009-09-04

申请人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

发明人： Thierry Pinguet ,  Steffen Gloeckner ,  Peter De Dobbelaere ,  Sherif Abdalla ,  Daniel Kucharski ,  Gianlorenzo Masini ,  Kosei Yokoyama ,  John Guckenberger ,  Attila Mekis

IPC分类号： H01L27/12 ,  H01L21/782 ,  H01L21/84

CPC分类号： H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

摘要翻译： 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在具有不同硅层厚度的单个CMOS晶片上制造光子和电子器件。 利用体CMOS工艺和/或利用SOI CMOS工艺的SOI晶片，可以在绝缘体上半导体（SOI）晶片上制造器件。 可以使用双重SOI工艺和/或选择性区域生长工艺来制造不同的厚度。 可以利用一个或多个氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。 集成在CMOS晶片中的二氧化硅或硅锗可以用作蚀刻停止层。