摘要:
Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one tot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.
摘要:
Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one tot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.
摘要:
A method and apparatus for process control in a lithographic process are described. Metrology may be performed on a substrate either before or after performing a lithographic patterning process on the substrate. One or more correctables to the lithographic patterning process may be generated based on the metrology. The lithographic patterning process performed on the substrate (or a subsequent substrate) may be adjusted with the correctables.
摘要:
A combined metrology mark, a system, and a method for calculating alignment on a semiconductor circuit are disclosed. The combined metrology mark may include a mask misregistration structure and a wafer overlay mark structure.
摘要:
Aspects of the present disclosure describe a target for use in measuring a relative position between two substantially coplanar layers of a device. The target includes periodic structures in first and second layers. Differences in relative position of the first and the second layers between the first and second periodic structures and the respective device-like structure can be measured to correct the relative position of the first and the second layers between the first and second periodic structures. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
摘要:
The invention may be embodied in a system and method for monitoring and controlling feedback control in a manufacturing process, such as an integrated circuit fabrication process. The process control parameters may include translation, rotation, magnification, dose and focus applied by a photolithographic scanner or stepper operating on silicon wafers. Overlay errors are used to compute measured parameters used in the feedback control process. Statistical parameters are computed, normalized and graphed on a common set of axes for at-a-glance comparison of measured parameters and process control parameters to facilitate the detection of problematic parameters. Parameter trends and context relaxation scenarios are also compared graphically. Feedback control parameters, such as EWMA lambdas, may be determined and used as feedback parameters for refining the APC model that computes adjustments to the process control parameters based on the measured parameters.
摘要:
Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one lot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.
摘要:
An overlay target for use in imaging based metrology is disclosed. The overlay target includes a plurality of target structures including three or more target structures, each target structure including a set of two or more pattern elements, wherein the target structures are configured to provide metrology information pertaining to different pitches, different coverage ratios, and linearity. Pattern elements may be separated from adjacent pattern elements by non-uniform distance; pattern elements may have non-uniform width; or pattern elements may be designed to demonstrate a specific offset as compared to pattern elements in a different layer.
摘要:
A method and apparatus for process control in a lithographic process are described. Metrology may be performed on a substrate either before or after performing a patterning process on the substrate. One or more correctables to the lithographic patterning process may be generated based on the metrology. The patterning process performed on the substrate (or a subsequent substrate) may be adjusted with the correctables.
摘要:
The invention may be embodied in a system and method for monitoring and controlling feedback control in a manufacturing process, such as an integrated circuit fabrication process. The process control parameters may include translation, rotation, magnification, dose and focus applied by a photolithographic scanner or stepper operating on silicon wafers. Overlay errors are used to compute measured parameters used in the feedback control process. Statistical parameters are computed, normalized and graphed on a common set of axes for at-a-glance comparison of measured parameters and process control parameters to facilitate the detection of problematic parameters. Parameter trends and context relaxation scenarios are also compared graphically. Feedback control parameters, such as EWMA lambdas, may be determined and used as feedback parameters for refining the APC model that computes adjustments to the process control parameters based on the measured parameters.