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公开(公告)号：US06653575B2
公开(公告)日：2003-11-25
申请号：US09764467
申请日：2001-01-17
IPC分类号： H05K114
CPC分类号： H01L23/4985 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/363 , H05K2201/096 , H05K2201/10666 , H05K2203/0338 , H05K2203/041 , H05K2203/0455 , H01L2924/00
摘要： An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
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2.发明授权Use of blind vias for soldered interconnections between substrates and printed wiring boards 有权对基板和印刷电路板之间的焊接互连使用盲孔公开(公告)号：US06452116B2
公开(公告)日：2002-09-17
申请号：US09796389
申请日：2001-02-28
IPC分类号： H01R909
CPC分类号： H05K1/112 , H05K1/0298 , H05K2201/09227 , H05K2201/09509 , H05K2201/10734 , Y10T29/49117 , Y10T29/49126 , Y10T29/49144
摘要： A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
摘要翻译： 提供了一种用于连接电子电路封装中的两个导电层的方法，包括以下步骤：将一个或多个盲孔放置在位于第一导体顶部的第一衬底中; 将一个或多个盲孔放置在位于第二导体下方的第二衬底中; 将一个或多个信号线附接到所述一个或多个盲孔中的一个或多个; 以及组装球栅阵列部件，使得第一导体电连接到第二导体。 还要求保护的是一种电子电路封装，其包括用于根据本发明的层之间的电连接的盲孔。
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3.发明授权Method of forming an electrical connection between a conductive member having a dual thickness substrate and a conductor and electronic package including said connection 失效在具有双重厚度衬底的导电构件和导体之间形成电连接的方法以及包括所述连接的电子封装公开(公告)号：US06281437B1
公开(公告)日：2001-08-28
申请号：US09437506
申请日：1999-11-10
IPC分类号： H01L2302
CPC分类号： H01L24/86 , H01L23/36 , H01L24/80 , H01L2224/05568 , H01L2224/05573 , H01L2224/05647 , H01L2224/13111 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/30105 , H01L2924/00014
摘要： An electrical connection between a flexible circuitized substrate and a separator conductor is formed wherein the substrate's dielectric member has a region of reduced thickness immediately adjacent the portion of the substrate's conductor that is being connected (e.g., using thermocompression bonding) to the separate conductor (e.g., a chip's contact site or a solder ball thereon). Heat and pressure is applied to form the bond between both conductors, this heat passing through the reduced thickness dielectric while appropriate pressure is applied. The reduced thickness assures heat flow (and possibly displacement of the dielectric in this region, e.g., it “melts back”) to thus facilitate bond formation, but also is able to positively retain several conductors of the substrate in spaced alignment during the bonding to respective solder balls or chip contact sites.
摘要翻译： 形成柔性电路化基板和隔板导体之间的电连接，其中基板的电介质构件具有紧邻衬底导体部分的厚度减小的区域，该区域正在与单独的导体连接（例如，使用热压接）。 ，芯片的接触部位或其上的焊球）。 施加热和压力以形成两个导体之间的结合，这种热通过减小厚度的电介质，同时施加适当的压力。 减小的厚度确保热流（并且可能在该区域中的电介质的位移，例如，其“回熔”），从而有助于结合形成，而且还能够在粘合期间将衬底的多个导体间隔开对准 相应的焊球或芯片接触点。
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公开(公告)号：US06574113B2
公开(公告)日：2003-06-03
申请号：US09764465
申请日：2001-01-17
IPC分类号： H05K710
CPC分类号： H01L23/4985 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/363 , H05K2201/096 , H05K2201/10666 , H05K2203/0338 , H05K2203/041 , H05K2203/0455 , H01L2924/00
摘要： An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
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公开(公告)号：US06198634B1
公开(公告)日：2001-03-06
申请号：US09282842
申请日：1999-03-31
IPC分类号： H05K114
CPC分类号： H01L23/4985 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/363 , H05K2201/096 , H05K2201/10666 , H05K2203/0338 , H05K2203/041 , H05K2203/0455 , H01L2924/00
摘要： An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
摘要翻译： 一种电子封装，其包括通过焊料固定在一起的第一和第二电路化基板，该焊接部件包括用于附接到印刷电路板的第一接触部分和用于将两个基板接合在一起的第二接触部分（例如，以形成多芯片 模块）。 半导体芯片可以定位在所形成的焊料部件上并电耦合到所形成的焊接部件上。
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公开(公告)号：US06617528B2
公开(公告)日：2003-09-09
申请号：US09764476
申请日：2001-01-17
IPC分类号： H05K111
CPC分类号： H01L23/4985 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/363 , H05K2201/096 , H05K2201/10666 , H05K2203/0338 , H05K2203/041 , H05K2203/0455 , H01L2924/00
摘要： An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
摘要翻译： 一种电子封装，其包括通过焊料固定在一起的第一和第二电路化基板，该焊接部件包括用于附接到印刷电路板的第一接触部分和用于将两个基板接合在一起的第二接触部分（例如，以形成多芯片 模块）。 半导体芯片可以定位在所形成的焊料部件上并电耦合到所形成的焊接部件上。
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公开(公告)号：US06272742B1
公开(公告)日：2001-08-14
申请号：US09415330
申请日：1999-10-08
IPC分类号： H05K336
CPC分类号： H05K1/112 , H05K1/0298 , H05K2201/09227 , H05K2201/09509 , H05K2201/10734 , Y10T29/49117 , Y10T29/49126 , Y10T29/49144
摘要： A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
摘要翻译： 提供了一种用于连接电子电路封装中的两个导电层的方法，包括以下步骤：将一个或多个盲孔放置在位于第一导体顶部的第一衬底中; 将一个或多个盲孔放置在位于第二导体下方的第二衬底中; 将一个或多个信号线附接到所述一个或多个盲孔中的一个或多个; 以及组装球栅阵列部件，使得第一导体电连接到第二导体。 还要求保护的是一种电子电路封装，其包括用于根据本发明的层之间的电连接的盲孔。
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8.发明授权Use of blind vias for soldered interconnections between substrates and printed wiring boards 失效对基板和印刷电路板之间的焊接互连使用盲孔
公开(公告)号：US6023029A
公开(公告)日：2000-02-08
申请号：US44966
申请日：1998-03-19
CPC分类号： H05K1/112 , H05K1/0298 , H05K2201/09227 , H05K2201/09509 , H05K2201/10734 , Y10T29/49117 , Y10T29/49126 , Y10T29/49144
摘要： A method is provided for connecting two conductive layers in an electronic circuit package including the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
摘要翻译： 提供了一种用于连接电子电路封装中的两个导电层的方法，包括以下步骤：将一个或多个盲孔放置在位于第一导体顶部的第一衬底中; 将一个或多个盲孔放置在位于第二导体下方的第二衬底中; 将一个或多个信号线附接到所述一个或多个盲孔中的一个或多个; 以及组装球栅阵列部件，使得第一导体电连接到第二导体。 还要求保护的是一种电子电路封装，其包括用于根据本发明的层之间的电连接的盲孔。
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