Semiconductor devices having compensated buffer layers
    3.
    发明授权
    Semiconductor devices having compensated buffer layers 失效
    具有补偿缓冲层的半导体器件

    公开(公告)号:US4745448A

    公开(公告)日:1988-05-17

    申请号:US813306

    申请日:1985-12-24

    CPC分类号: H01L29/1075 H01L29/207

    摘要: A field effect transistor includes a substrate of gallium arsenide having a resistivity of at least about 10.sup.7 ohm/cm and a first buffer layer of gallium arsenide disposed over the substrate having a deep level acceptor dopant incorporated into the buffer layer to compensate for donor dopants incorporated into the buffer layer. The concentration of the donor dopants and the acceptor dopant are controlled to provide the buffer layer with a predetermined resistivity characteristic of about 10.sup.7 -10.sup.8 ohm/cm. The concentration of the deep acceptor dopant is substantially constant at about 10.sup.16 acceptors/cc throughout the first buffer layer. The buffer layer preferably has a thickness of at least 2 microns and preferably between 5 and 30 microns. A second buffer layer is disposed over the first buffer layer having a monotonically declining concentration of chromium dopant from about 10.sup.16 to less than about 10.sup.14 acceptors/cc. An active layer and contact layer of suitably n-type doped gallium arsenide are consecutively disposed over at least portions of the second buffer layer.

    摘要翻译: 场效应晶体管包括具有至少约107欧姆/厘米电阻率的砷化镓衬底和布置在衬底上的第一缓冲层砷化镓,其具有并入缓冲层中的深层受主掺杂剂,以补偿掺入的施主掺杂剂 进入缓冲层。 控制施主掺杂剂和受主掺杂剂的浓度,以使缓冲层具有约107-108欧姆/厘米3的预定电阻率特性。 深受体掺杂剂的浓度基本上恒定在整个第一缓冲层中约1016个受体/ cc。 缓冲层优选具有至少2微米,优选5至30微米的厚度。 第二缓冲层设置在第一缓冲层上,其具有从约1016到小于约1014个受体/ cc的单调下降的铬掺杂剂浓度。 适当地n型掺杂砷化镓的有源层和接触层连续设置在第二缓冲层的至少部分上。

    High power microwave circuit packages
    5.
    发明授权
    High power microwave circuit packages 失效
    大功率微波电路封装

    公开(公告)号:US4951014A

    公开(公告)日:1990-08-21

    申请号:US358279

    申请日:1989-05-26

    IPC分类号: H05K7/14

    CPC分类号: H05K7/1417

    摘要: A carrier for high power solid state devices in particular monolithic microwave integrated gallium arsenide circuits includes a dielectric carrier surface comprised of aluminum nitride having disposed over a first surface thereof, a plated ground plane conductor and having disposed over a second surface thereof a ground plane conductor disposed in selected regions of said second surface, connected to the underlying ground plane conductor by via holes. The aluminum nitride carrier provides a dielectric for transmission lines which are supported by said carrier, and a support for resistor and capacitor devices formed over said carrier by thin film techniques. A high power active device such as a FET or gallium arsenide MMIC is bonded to the selective ground plane regions of the second surface of the aluminum nitride carrier. With this approach, a separate metal carrier having separately mounted components such as resistors, capacitors, and transmission lines is eliminated. The techniqu provides improvement in thermal resistance characteristics of the microwave circuit supported by the carrier and simplifies the packaging of such devices.

    摘要翻译: 用于高功率固态器件,特别是单片微波集成砷化镓电路的载体包括由氮化铝构成的电介质载体表面,其上设置有第一表面,电镀接地平面导体,并在其第二表面上设置有接地平面导体 设置在所述第二表面的选定区域中,通过通孔连接到下面的接地平面导体。 氮化铝载体提供了由所述载体支撑的传输线的电介质,以及通过薄膜技术在所述载体上形成的电阻和电容器装置的支撑。 诸如FET或砷化镓MMIC的高功率有源器件被结合到氮化铝载体的第二表面的选择性接地平面区域上。 利用这种方法,消除了具有单独安装的组件如电阻器,电容器和传输线的单独的金属载体。 该技术提供了由载体支撑的微波电路的热阻特性的改进,并且简化了这种装置的封装。