Method and apparatus for performing system power management
    2.
    发明授权
    Method and apparatus for performing system power management 有权
    执行系统电源管理的方法和装置

    公开(公告)号:US09327321B2

    公开(公告)日:2016-05-03

    申请号:US13610909

    申请日:2012-09-12

    摘要: A method and an apparatus for performing charging port detection control are provided, where the method is applied to an electronic device, a communication port of the electronic device has a functionality of obtaining power from an external power source for the electronic device, and a power path switching unit of the electronic device is arranged to control electrical connection between a system within the electronic device and a battery of the electronic device. The method may include the steps of: performing charging port detection; and control operation(s) according to the charging port detection. For example, the method may include: controlling the power path switching unit to have different configuration according to the charging port detection in order to charge the battery with different charging profiles; and detecting the system voltage level during charging for switching from the constant current mode to the constant voltage mode.

    摘要翻译: 提供了一种用于执行充电端口检测控制的方法和装置,其中该方法应用于电子设备,电子设备的通信端口具有从用于电子设备的外部电源获得电力的功能, 电子设备的路径切换单元布置成控制电子设备内的系统与电子设备的电池之间的电连接。 该方法可以包括以下步骤:执行充电端口检测; 并根据充电端口检测进行控制操作。 例如,该方法可以包括:根据充电端口检测来控制功率路径切换单元具有不同的配置,以便对具有不同充电简档的电池进行充电; 并且在充电期间检测从恒定电流模式切换到恒定电压模式的系统电压电平。

    Multiple metal film stack in BSI chips
    3.
    发明授权
    Multiple metal film stack in BSI chips 有权
    BSI芯片中的多个金属膜堆叠

    公开(公告)号:US08796805B2

    公开(公告)日:2014-08-05

    申请号:US13604380

    申请日:2012-09-05

    摘要: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.

    摘要翻译: 一种方法包括形成从半导体衬底的背表面延伸到半导体衬底的前侧上的金属焊盘的开口,以及在半导体衬底中形成包括与有源图像传感器重叠的第一部分的第一导电层,第二部分 半导体衬底中重叠的黑色参考图像传感器,以及开口中的与金属垫接触的第三部分。 在第一导电层上形成第二导电层并与第一导电层接触。 执行第一图案化步骤以去除第二导电层的第一和第二部分,其中第一导电层用作蚀刻停止层。 执行第二图案化步骤以去除第一导电层的第一部分的一部分。 在第二图案化步骤之后,第一导电层的第二和第三部分保留。

    Method of constructing light-measuring look-up table, light-measuring method, and light-measuring system
    5.
    发明授权
    Method of constructing light-measuring look-up table, light-measuring method, and light-measuring system 有权
    光测量查找表,光测量方法和光测量系统的构建方法

    公开(公告)号:US08599380B2

    公开(公告)日:2013-12-03

    申请号:US13148538

    申请日:2009-08-03

    IPC分类号: G01J3/46

    CPC分类号: G01J3/505 G01J3/462 G01J3/465

    摘要: The invention discloses a method of constructing light-measuring look-up table, a light-measuring method, and a light-measuring system. The method of constructing light-measuring look-up table is to construct a look-up table by according to spectrum parameters relative to a light spectrum model, three actual color-matching functions relative to the light-measuring system and three standard color-matching functions, calculating both a look-up color coordinate and a reference color coordinate corresponding to each of the spectrum parameters. The light-measuring method includes: first, measuring a to-be-measured light by the light-measuring system to obtain actual stimulus values and calculating an actual color coordinate; then, comparing the actual color coordinate with the look-up color coordinates to determine both a to-be-measured light spectrum parameter and an estimated color coordinate relative to the to-be-measured light; furthermore, according to the to-be-measured light spectrum parameter, one of the standard color-matching functions and one of the actual stimulus values, calculating an estimated luminance.

    摘要翻译: 本发明公开了一种构造光测量查表,光测量方法和光测量系统的方法。 构建光测查表的方法是根据相对于光谱模型的光谱参数构建查找表,相对于光测系统的三个实际色匹配函数和三个标准色匹配 功能,计算与每个频谱参数对应的查找颜色坐标和参考颜色坐标。 光测量方法包括:首先,通过光测量系统测量待测光以获得实际刺激值并计算实际色坐标; 然后,将实际的颜色坐标与查找的颜色坐标进行比较,以确定相对于待测光的待测光谱参数和估计的颜色坐标; 此外,根据待测光谱参数,标准颜色匹配函数之一和实际刺激值之一,计算估计亮度。

    Integrated circuit and fabricating method thereof
    6.
    发明授权
    Integrated circuit and fabricating method thereof 有权
    集成电路及其制造方法

    公开(公告)号:US08587078B2

    公开(公告)日:2013-11-19

    申请号:US12754610

    申请日:2010-04-06

    IPC分类号: H01L29/84 H01L21/02

    摘要: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.

    摘要翻译: 提供了集成电路的制造方法。 在集成电路的互连结构的制造过程中,在互连结构的两个相邻电介质层之间形成微机电系统(MENS)隔膜。 形成MENS隔膜的方法包括以下步骤。 首先,在任何电介质层内形成多个第一开口以暴露互连结构的相应的导电材料。 其次,在电介质层上形成底部绝缘层并填充到第一开口中。 第三,去除位于第一开口中的底部绝缘层的部分,以形成用于暴露相应导电材料的至少第一沟槽。 然后,第一电极层和顶部绝缘层依次形成在底部绝缘层上,第一电极层被填充到第一沟槽中并与导电材料电连接。

    Programmable output buffer
    7.
    发明授权
    Programmable output buffer 有权
    可编程输出缓冲器

    公开(公告)号:US08531205B1

    公开(公告)日:2013-09-10

    申请号:US13363108

    申请日:2012-01-31

    IPC分类号: H03K17/16

    摘要: One embodiment relates to a programmable output buffer which includes first and second programmable variable-impedance single-ended driver circuits and first and second termination circuits. The first termination circuit is coupled to a first output pin which is driven by the first programmable variable-impedance single-ended driver circuit, and the second termination circuit is coupled to a second output pin which is driven by the second programmable variable-impedance single-ended driver circuit. The first and second termination circuits are programmable to either provide parallel termination for a differential signal or drive single-ended signals with the parallel termination turned off. Other embodiments and features are also disclosed.

    摘要翻译: 一个实施例涉及可编程输出缓冲器,其包括第一和第二可编程可变阻抗单端驱动器电路以及第一和第二终端电路。 第一终端电路耦合到由第一可编程可变阻抗单端驱动电路驱动的第一输出引脚,第二终端电路耦合到由第二可编程可变阻抗单端驱动的第二输出引脚 驱动电路。 第一和第二终端电路是可编程的,以提供用于差分信号的并行终端或者并联终端关断的驱动单端信号。 还公开了其它实施例和特征。

    Method for fabricating integrated circuit
    8.
    发明授权
    Method for fabricating integrated circuit 有权
    集成电路制造方法

    公开(公告)号:US08460960B2

    公开(公告)日:2013-06-11

    申请号:US13186607

    申请日:2011-07-20

    IPC分类号: H01L21/00

    摘要: A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed.

    摘要翻译: 提供一种用于制造集成电路的方法。 首先,在导电基板的MEMS区域上形成包括多个第一电介质层和交替堆叠的多个第一导电图案的第一互连结构。 接下来,在第一互连结构上形成中间层并覆盖第一导电图案。 接下来,在中间层上形成对应于第一导电图案的多晶硅掩模层,并暴露介质层的一部分。 接下来,去除由多晶硅掩模层暴露的层的部分和与其对应的第一介电层的一部分,以形成多个开口。 然后,去除MEMS区域中的导电衬底的一部分。

    PROGRAMMABLE LIGHT-BOX
    9.
    发明申请
    PROGRAMMABLE LIGHT-BOX 审中-公开
    可编程灯箱

    公开(公告)号:US20130076261A1

    公开(公告)日:2013-03-28

    申请号:US13246168

    申请日:2011-09-27

    IPC分类号: H05B37/02

    CPC分类号: H05B33/0857 H05B33/0872

    摘要: A light-box for illuminating a printed image includes a light source having a plurality of light-emitting sections, a plurality of contrast information, and a programmable light source controller. The plurality of contrast information is determined according to the contents of the printed image, with each piece of contrast information corresponding to one contrast generated by the plurality of light-emitting sections. Thus, the programmable light source controller drives the plurality of light-emitting sections according to the plurality of contrast information in order to generate luminance variations within different durations.

    摘要翻译: 用于照射打印图像的灯箱包括具有多个发光部的光源,多个对比度信息以及可编程光源控制器。 根据打印图像的内容来确定多个对比度信息,其中每条对比度信息对应于由多个发光部分产生的一个对比度。 因此,可编程光源控制器根据多个对比度信息驱动多个发光部分,以便在不同持续时间内产生亮度变化。

    METHOD FOR FABRICATING INTEGRATED CIRCUIT
    10.
    发明申请
    METHOD FOR FABRICATING INTEGRATED CIRCUIT 有权
    制造集成电路的方法

    公开(公告)号:US20130023081A1

    公开(公告)日:2013-01-24

    申请号:US13186607

    申请日:2011-07-20

    IPC分类号: H01L21/311

    摘要: A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed.

    摘要翻译: 提供一种用于制造集成电路的方法。 首先,在导电基板的MEMS区域上形成包括多个第一电介质层和交替堆叠的多个第一导电图案的第一互连结构。 接下来,在第一互连结构上形成中间层并覆盖第一导电图案。 接下来,在中间层上形成对应于第一导电图案的多晶硅掩模层,并暴露介质层的一部分。 接下来,去除由多晶硅掩模层暴露的层的部分和与其对应的第一介电层的一部分,以形成多个开口。 然后,去除MEMS区域中的导电衬底的一部分。