Separator including porous coating layer, method for manufacturing the separator and electrochemical device including the separator
    2.
    发明授权
    Separator including porous coating layer, method for manufacturing the separator and electrochemical device including the separator 有权
    包括多孔涂层的分离器,用于制造隔膜的方法和包括隔膜的电化学装置

    公开(公告)号:US08986892B2

    公开(公告)日:2015-03-24

    申请号:US13243081

    申请日:2011-09-23

    IPC分类号: H01M2/16 H01M10/052

    摘要: A separator includes a non-woven fabric substrate having pores, fine thermoplastic powder located inside the pores of the non-woven fabric substrate, and a porous coating layer disposed on at least one surface of the non-woven fabric substrate. The fine thermoplastic powder has an average diameter smaller than that of the pores and a melting point lower than the melting or decomposition point of the non-woven fabric substrate. The porous coating layer includes a mixture of inorganic particles and a binder polymer whose melting point is higher than the melting or decomposition point of the fine thermoplastic powder. In the porous coating layer, the inorganic particles are fixedly connected to each other by the binder polymer and the pores are formed by interstitial volumes between the inorganic particles. Previous filling of the large pores of the non-woven fabric substrate with the fine thermoplastic powder makes the porous coating layer uniform.

    摘要翻译: 隔膜包括具有孔的无纺布基材,位于无纺布基材的孔内的精细热塑性粉末,以及设置在无纺布基材的至少一个表面上的多孔涂层。 细的热塑性粉末的平均直径小于孔的直径,熔点低于无纺布基材的熔点或分解点。 多孔涂层包括无机颗粒和熔点高于细的热塑性粉末的熔点或分解点的粘合剂聚合物的混合物。 在多孔涂层中,无机颗粒通过粘合剂聚合物彼此固定连接,并且通过无机颗粒之间的间隙体积形成孔。 先前用细小的热塑性粉末填充无纺布基材的大孔,使多孔涂层均匀。

    ELECTRODE ASSEMBLY FOR ELECTROCHEMICAL DEVICE AND ELECTROCHEMICAL DEVICE INCLUDING THE SAME
    3.
    发明申请
    ELECTRODE ASSEMBLY FOR ELECTROCHEMICAL DEVICE AND ELECTROCHEMICAL DEVICE INCLUDING THE SAME 审中-公开
    电化学装置用电极组件及其电化学装置

    公开(公告)号:US20130011715A1

    公开(公告)日:2013-01-10

    申请号:US13599403

    申请日:2012-08-30

    摘要: Disclosed is an electrode assembly having a structure in which a plurality of unit cells are bonded to one or both surfaces of a first separator whose length is greater than width and are stacked in a zigzag pattern or wound sequentially. The first separator includes a first porous electrode adhesive layer, to which electrodes of the unit cells are adhered, formed at one surface thereof to which the unit cells are bonded. The first porous electrode adhesive layer includes a mixture of inorganic particles and a binder polymer. Each of the unit cells includes a second separator including second porous electrode adhesive layers, to which electrodes of the unit cell are adhered, formed at both surfaces thereof. Each of the second porous electrode adhesive layers includes a mixture of inorganic particles and a binder polymer. Further disclosed is an electrochemical device including the electrode assembly.

    摘要翻译: 公开了一种电极组件,其具有多个单电池结合到长度大于宽度的第一隔板的一个或两个表面上并且以锯齿形图案重叠或顺序缠绕的结构。 第一分离器包括第一多孔电极粘合剂层,单元电池的电极粘附到单元电池的一个表面上,单元电池与其结合。 第一多孔电极粘合剂层包括无机颗粒和粘合剂聚合物的混合物。 每个单体电池包括第二隔板,该第二隔板包括第二多孔电极粘合剂层,单元电池的电极在其两面形成。 每个第二多孔电极粘合剂层包括无机颗粒和粘合剂聚合物的混合物。 还公开了包括电极组件的电化学装置。

    Duplexing structure of switching system processor and method for maintaining memory coherency
    8.
    发明授权
    Duplexing structure of switching system processor and method for maintaining memory coherency 失效
    交换系统处理器的双工结构和维持内存一致性的方法

    公开(公告)号:US06594778B1

    公开(公告)日:2003-07-15

    申请号:US09617495

    申请日:2000-07-17

    申请人: In-Chul Kim

    发明人: In-Chul Kim

    IPC分类号: G06F702

    摘要: A duplexing structure of a switching system processor and a method for maintaining a memory coherency are provided in which both data of an active memory and of a standby memory are concurrently read. The concurrently read data can be compared using hardware. In the duplexing structure, an address corresponding to the concurrent reading operation is set and a path is provided therefore. Accordingly, when an address of the active memory and the standby memory are compared, they are simultaneously accessed and compared for judgement at one time. Thus, a time required for the operation is reduced. In addition, since the comparison result can be recognized according to the kinds of the termination that is applied by hardware, without comparing the two data relying on a series of program operations on the basis of software using the CPU, the load of the CPU required with respect to memory coherency verification can be reduced.

    摘要翻译: 提供了交换系统处理器的双工结构和用于维持存储器一致性的方法,其中同时读取活动存储器和备用存储器的数据。 可以使用硬件来比较同时读取的数据。 在双工结构中,设置与并行读取操作对应的地址,因此提供路径。 因此,当比较活动存储器和备用存储器的地址时,它们被同时访问并进行比较以供一次判断。 因此,减少了操作所需的时间。 此外,由于可以根据由硬件应用的终端的种类来识别比较结果,而是不依赖于使用CPU的软件依赖于一系列程序操作来比较两个数据,所需的CPU的负载 相对于存储器一致性验证可以减少。