摘要:
A broadly tunable single-mode infrared laser source based on semiconductor lasers. The laser source has two parts: an array of closely-spaced DFB QCLs (or other semiconductor lasers) and a controller that can switch each of the individual lasers in the array on and off, set current for each of the lasers and, and control the temperature of the lasers in the array. The device can be used in portable broadband sensors to simultaneously detect a large number of compounds including chemical and biological agents. A microelectronic controller is combined with an array of individually-addressed DFB QCLs with slightly different DFB grating periods fabricated on the same broadband (or multiple wavelengths) QCL material. This allows building a compact source providing narrow-line broadly-tunable coherent radiation in the Infrared or Terahertz spectral range (as well as in the Ultraviolet and Visible spectral ranges, using semiconductor lasers with different active region design). The performance (tuning range, line width, power level) is comparable to that of external grating tunable semiconductor lasers, but the proposed design is much smaller and much easier to manufacture.
摘要:
A mask programmable integrated circuit includes a read only memory (ROM), a random access memory (RAM), and a controller. The controller couples to the ROM and RAM. The controller senses a reset condition and, in response, directs a clear of the RAM or a preload of contents of the ROM to the RAM. The preload can be performed after a successful self-test of the RAM is achieved. The RAM has a variable word length and depth size and can be configured to operate in one of many modes. The integrated circuit further includes a first and a second multiplexer (MUX). The first MUX is interposed between the RAM and the ROM, and selectively couples either the ROM data or the built-in self-test (BIST) data to the first MUX output. The second MUX is interposed between the first MUX and the RAM, and selectively couples either the output of the first MUX or a (synchronous or asynchronous) data input to the RAM. With the preload feature, the invention can emulate a ROM, a preloaded RAM, or look-up table logic functions as well as conventional RAM. Further, BIST allows for testing of the RAM without the needs for external support.
摘要:
A mask programmable integrated circuit includes a read only memory (ROM), a random access memory (RAM), and a controller. The controller couples to the ROM and RAM. The controller senses a reset condition and, in response, directs a clear of the RAM or a preload of contents of the ROM to the RAM. The preload can be performed after a successful self-test of the RAM is achieved. The RAM has a variable word length and depth size and can be configured to operate in one of many modes. The integrated circuit further includes a first and a second multiplexer (MUX). The first MUX is interposed between the RAM and the ROM, and selectively couples either the ROM data or the built-in self-test (BIST) data to the first MUX output. The second MUX is interposed between the first MUX and the RAM, and selectively couples either the output of the first MUX or a (synchronous or asynchronous) data input to the RAM. With the preload feature, the invention can emulate a ROM, a preloaded RAM, or looktip table logic functions as well as conventional RAM. Further, BIST allows for testing of the RAM without the needs for external support.
摘要:
The invention described herein relates to a novel process for reducing the carbon dioxide emissions from a coal and/or biomass liquefaction facility by utilizing a steam methane reformer unit in the complex designed to produce additional hydrogen which can be thereafter utilized in the process, as required for the plant fired heaters (including the SMR furnace), and for the production of plant steam. The plant light ends (C1, C2, etc.), which are normally utilized as fuel gas streams are the primary feeds to the SMR Unit along with the tail gas purge from a gasification complex within the facility.
摘要:
A multi-stage catalytic process for the direct liquefaction of coal is utilized with a hydrotreater to first liquefy and subsequently treat the product in one integrated process. A fresh hydrogenation catalyst is used to reduce heteroatoms (S, N) from coal liquids in the downstream hydrotreater. This catalyst is then cascaded and re-used in the direct coal liquefaction process, first in the low temperature Stage 1, and then re-used in the high temperature Stage 2. Coal liquid products have very low contaminants and can be readily used to produce gasoline and diesel fuel. Catalyst requirements are substantially lowered utilizing this novel process.
摘要:
A broadly tunable single-mode infrared laser source based on semiconductor lasers. The laser source has two parts: an array of closely-spaced DFB QCLs (or other semiconductor lasers) and a controller that can switch each of the individual lasers in the array on and off, set current for each of the lasers and, and control the temperature of the lasers in the array. The device can be used in portable broadband sensors to simultaneously detect a large number of compounds including chemical and biological agents. A microelectronic controller is combined with an array of individually-addressed DFB QCLs with slightly different DFB grating periods fabricated on the same broadband (or multiple wavelengths) QCL material. This allows building a compact source providing narrow-line broadly-tunable coherent radiation in the Infrared or Terahertz spectral range (as well as in the Ultraviolet and Visible spectral ranges, using semiconductor lasers with different active region design). The performance (tuning range, line width, power level) is comparable to that of external grating tunable semiconductor lasers, but the proposed design is much smaller and much easier to manufacture.
摘要:
This invention utilizes a novel method and set of operating conditions to efficiently and economically process a potentially very fouling hydrocarbon feedstock. A multi-stage catalytic process for the upgrading of coal pyrolysis oils is developed. Coal Pyrolysis Oils are highly aromatic, olefinic, unstable, contain objectionable sulfur, nitrogen, and oxygen contaminants, and,may contain coal solids which will plug fixed-bed reactors. The pyrolysis oil is fed with hydrogen to a multi-stage ebullated-bed hydrotreater and hydrocracker containing a hydrogenation or hydrocracking catalyst to first stabilize the feed at low temperature and is then fed to downstream reactor(s) at higher temperatures to further treat and hydrocrack the pyrolysis oils to a more valuable syncrude or to finished distillate products. The relatively high heat of reaction is used to provide the energy necessary to increase the temperature of the subsequent stage thus eliminating the need for additional external heat input. A refined heavy oil product stream is recycled to the fresh feed to minimize feedstock fouling of heat exchangers and feed heaters.
摘要:
A process for catalytic multi-stage hydrogenation of heavy carbonaceous feedstocks using catalytic ebullated bed reactors is operated at selected flow and operating conditions so as to provide improved reactor operations and produce increased yield of lower boiling hydrocarbon liquid and gas products. The disclosed process advantageously takes advantage of an external gas/liquid separation unit associated with the first stage reactor to allow for a more efficient and effective catalytic hydrocracking process. The more efficient process is primarily a result of the increased catalyst loading and lower gas hold-up in the ebullated reactors.
摘要:
A method for coding programming instructions in a complex programmable logic device (CPLD). In one embodiment, a CPLD has an instruction storage element comprising a first number of bits and requiring a first number of clock cycles to load the first number of bits. A novel method is used to instruct the device to perform at least one function comprising the steps of serially shifting a first instruction into the instruction storage element in a second number of clock cycles, and serially shifting a second instruction into the instruction storage element in a third number of clock cycles. The third number of clock cycles may be less than the first number of clock cycles. The third number of clock cycles may also be less than the second number of clock cycles. In one embodiment, the third number of clock cycles comprises one clock cycle.
摘要:
The present invention provides a circuit for programming a logic device comprising a first register for shifting data to a memory array, a second register for decoding an address space for a particular word within the logic device. The memory array has an address input and a data input coupled to the first and second registers. One of the registers is implemented as a registered counter block while the other register can be implemented as either a shift register, for a low pin count design, and/or a parallel load register for a higher pin counter and higher performance design.