公开(公告)号：US06242275B1

公开(公告)日：2001-06-05

申请号：US09137617

申请日：1998-08-21

申请人： Sung Bock Kim ,  Jeong Rae Ro ,  El Hang Lee

发明人： Sung Bock Kim ,  Jeong Rae Ro ,  El Hang Lee

IPC分类号： H01L2120

CPC分类号： B82Y10/00 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02494 ,  H01L21/02507 ,  H01L21/02546 ,  H01L21/0259 ,  H01L21/02609 ,  H01L29/125 ,  Y10S438/962

摘要： A method for manufacturing quantum wires is provided in which a stacked structure having AlAs layers and GaAs layers alternatively is formed, V-grooves are formed beside the GaAs layers and the quantum wires are formed using the V-grooves. The method for manufacturing quantum wires, which method includes the following steps: growing a GaAs buffer layer on the facet (011) of a GaAs single crystal substrate; growing an AlAs layer for using as oxide mask and a GaAs layer for a V-groove alternatively on the GaAs buffer layer so that each GaAs layer is stacked between an AlAs layer and an adjacent AlAs layer; growing the cover layer of GaAs on the AlAs layer which is grown as the top layer of the structure; cutting the entire structure including the GaAs cover layer to the perpendicular direction of (011), whose structure is grown in the orientation of (011) entirely, so as to expose the facet (100); performing a heat treatment for the entire structure cut to expose the facet (100) and forming oxide film on the exposed portion of each AlAs layer; etching each exposed GaAs layer chemically using the oxide as mask and forming V-groove so that the facet (111) of GaAs layer is exposed; and growing the quantum wire in the V-groove.

摘要翻译： 提供一种制造量子线的方法，其中形成具有AlAs层和GaAs层的堆叠结构，在GaAs层旁边形成V沟槽，并且使用V形槽形成量子线。 制造量子线的方法，该方法包括以下步骤：在GaAs单晶衬底的面（011）上生长GaAs缓冲层; 在GaAs缓冲层上生长用作氧化物掩模和用于V沟槽的GaAs层的AlAs层，使得每个GaAs层堆叠在AlAs层和相邻的AlAs层之间; 在作为结构的顶层生长的AlAs层上生长GaAs覆盖层; 将包括GaAs覆盖层的整个结构切割成（011）的垂直方向，其结构全部沿着（011）的取向生长，从而露出小面（100）。 对整个结构进行热处理以暴露小面（100）并在每个AlAs层的暴露部分上形成氧化物膜; 使用氧化物作为掩模化学地蚀刻每个暴露的GaAs层并形成V形槽，使得GaAs层的面（111）暴露; 并在V槽中生长量子线。

公开(公告)号：US5858818A

公开(公告)日：1999-01-12

申请号：US716646

申请日：1996-09-16

申请人： Jeong-Rae Ro ,  Seong-Bock Kim ,  El-Hang Lee

发明人： Jeong-Rae Ro ,  Seong-Bock Kim ,  El-Hang Lee

IPC分类号： H01L21/205 ,  H01L21/203

CPC分类号： H01L21/02546 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  Y10S148/065 ,  Y10S148/072 ,  Y10S148/11 ,  Y10S148/16

摘要： An epitaxial growth method for a compound semiconductor thin film, capable of forming a p-n junction with an atomic-scale ultra-micro structure is disclosed. The method involves loading the compound semiconductor substrate in a reaction chamber, injecting Group V and III metal organic source gases not processed by a thermal pre-decomposition process into the reaction chamber, and growing a p- or n-type compound semiconductor on the compound semiconductor substrate while adjusting the growth temperature of the p- or n-type compound semiconductor.

摘要翻译： 公开了能够形成具有原子尺度超微结构的p-n结的化合物半导体薄膜的外延生长方法。 该方法包括将化合物半导体衬底装载在反应室中，将未经热预分解过程处理的V族和III族金属有机源气体注入到反应室中，并在化合物上生长p型或n型化合物半导体 半导体衬底，同时调节p型或n型化合物半导体的生长温度。

公开(公告)号：US5770475A

公开(公告)日：1998-06-23

申请号：US717903

申请日：1996-09-23

申请人： Sung-Bock Kim ,  Jeong-Rae Ro ,  El-Hang Lee

发明人： Sung-Bock Kim ,  Jeong-Rae Ro ,  El-Hang Lee

IPC分类号： H01L21/205 ,  H01L21/306 ,  H01L21/00

CPC分类号： B82Y10/00 ,  H01L21/02395 ,  H01L21/0243 ,  H01L21/02463 ,  H01L21/02507 ,  H01L21/02546 ,  H01L21/02609 ,  H01L21/02658 ,  H01L21/30617

摘要： A crystal growth method for a compound semiconductor is capable of forming a plurality of quantum wells (formed of a barrier layer having a large energy band gap and an active layer having a small energy band gap) on the compound semiconductor substrate. After etching a V-shaped groove having a (111) surface with a predetermined angle .theta.1 with respect to the (100) surface on the GaAs semiconductor substrate, the substrate is further etched by a hydrochloric solution and a solution of H.sub.2 SO.sub.4 :H.sub.2 O.sub.2 :H.sub.2 O=20:1 to cause the V-shaped groove walls to become a non-(111) surface having a lower predetermined slope angle .theta.2. The quantum wells then grown in the bottom of the V-shaped groove will be effectively disconnected from simultaneous growths on the side walls of the groove thus giving rise to closely controlled multi-dimensional quantum well structures.

摘要翻译： 化合物半导体的晶体生长方法能够在化合物半导体基板上形成多个量子阱（由具有大能带隙的势垒层和具有小能带隙的有源层形成）。 在GaAs半导体衬底上蚀刻具有相对于（100）表面的具有预定角度θ（111）的（111）表面的V形槽之后，用盐酸溶液和H 2 SO 4 :H 2 O 2： H 2 O = 20:1使V形槽壁成为具有较低预定倾斜角度θ2的非（111）表面。然后在V形槽的底部生长的量子阱将被有效地从 在槽的侧壁上同时生长，从而产生紧密控制的多维量子阱结构。

公开(公告)号：US5833870A

公开(公告)日：1998-11-10

申请号：US833047

申请日：1997-04-03

申请人： Sung Bock Kim ,  Jeong Rae Ro ,  El Hang Lee

发明人： Sung Bock Kim ,  Jeong Rae Ro ,  El Hang Lee

IPC分类号： H01L33/00 ,  H01L21/20 ,  H01L21/205 ,  H01L21/335 ,  H01L29/12 ,  H01L21/00

CPC分类号： B82Y10/00 ,  H01L21/02439 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02639 ,  H01L29/125 ,  H01L29/66469

摘要： A method for forming a highly dense quantum wire, the method comprising the steps of: depositing a dielectric mask having dielectric patterns on the top surface of a semiconductor (100) substrate; forming the dielectric patterns in parallel to a (011) orientation on the semiconductor substrate; exposing a (111)B side and a(111)B side by chemical etching a selected region between the patterns so that the semiconductor substrate has a dove-tail shape; forming a buffer layer on the dove-tail semiconductor substrate; forming the first barrier layer on the buffer layer; forming a well layer on the first barrier layer; and forming the second barrier layer on the well layer.

摘要翻译： 一种用于形成高密度量子线的方法，所述方法包括以下步骤：在半导体（100）衬底的顶表面上沉积具有电介质图案的电介质掩模; 在半导体衬底上形成平行于（011）取向的电介质图案; 通过化学蚀刻图案之间的选定区域来暴露（1 + E，ov 1 + EE 1）B侧和（11 + E，ov 1 + EE）B侧，使得半导体衬底具有鸽尾形状; 在鸽尾半导体衬底上形成缓冲层; 在缓冲层上形成第一阻挡层; 在所述第一阻挡层上形成阱层; 以及在所述阱层上形成所述第二阻挡层。

公开(公告)号：US6074936A

公开(公告)日：2000-06-13

申请号：US93195

申请日：1998-06-08

申请人： Jeong Rae Ro ,  Sung Bock Kim ,  El Hang Lee

发明人： Jeong Rae Ro ,  Sung Bock Kim ,  El Hang Lee

IPC分类号： H01L21/30 ,  H01L21/20 ,  H01L21/205 ,  H01L21/311 ,  H01L21/36 ,  H01L21/00

CPC分类号： B82Y10/00 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/31116 ,  Y10S438/962

摘要： A method of fabricating quantum wire structures and devices, and quantum dot structures and devices comprise steps of: depositing an insulating layer on a semiconductor substrate, forming a line patterns and a square patterns in an insulating layer, forming a V-grooved patterned structures and a reverse quadrilateral pyramid patterned structures by thermal etching to evaporate portions of the quantum well layer that are not protected by line-shaped mask regions and square-shaped mask regions of the masking layer, forming a quantum wires and a quantum dots by alternatively growing a barrier layer and an active layer on a V-grooved patterned substrate and a reverse quadrilateral pyramid patterned substrate.

摘要翻译： 一种制造量子线结构和器件的方法，以及量子点结构和器件包括以下步骤：在半导体衬底上沉积绝缘层，在绝缘层中形成线图案和方形图案，形成V形槽图案结构和 通过热蚀刻将反向四边形金字塔图案化的结构蒸发成量子阱层的未被掩模层的线状掩模区域和方形掩模区域保护的部分，通过交替生长形成量子线和量子点 阻挡层和V沟槽图案化衬底上的有源层和反向四边形金字塔图案化衬底。

公开(公告)号：US5824453A

公开(公告)日：1998-10-20

申请号：US946915

申请日：1997-10-09

申请人： Sung-Bock Kim ,  Seong-Ju Park ,  Jeong-Rae Ro ,  El-Hang Lee

发明人： Sung-Bock Kim ,  Seong-Ju Park ,  Jeong-Rae Ro ,  El-Hang Lee

IPC分类号： H01L29/06 ,  H01L21/20 ,  H01L21/302 ,  H01L21/306 ,  H01L21/308 ,  G03F7/00

CPC分类号： H01L21/02395 ,  H01L21/02433 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/30617

摘要： Disclosed is a fabricating method of a GaAs substrate having a V-shaped groove in a higher density, that is a double density, the method comprising the steps of forming a Si.sub.3 N.sub.4 layer on a main surface of the GaAs substrate; patterning the Si.sub.3 N.sub.4 layer using a photo-lithography to form a patterned Si.sub.3 N.sub.4 layer having a minimum width; wet-etching the GaAs substrate using the patterned Si.sub.3 N.sub.4 layer as a mask, so as to form (111) and (100) surfaces of the GaAs substrate beneath the patterned Si.sub.3 N.sub.4 ; selectively growing a GaAs film on the GaAs substrate etched thus using the patterned Si.sub.3 N.sub.4 layer as a mask so as to form the GaAs film with two (111) facets only on a (100) surface of the GaAs substrate; and removing the Si.sub.3 N.sub.4 layer. The V-shaped grooves can be formed on a GaAs substrate utilizing a difference of growth rate caused by surface orientation of the substrate, and therefore the grooves can be formed in double density.

摘要翻译： 本发明公开了一种GaAs衬底的制造方法，该GaAs衬底具有较高密度的V形沟槽，即双重密度，该方法包括以下步骤：在GaAs衬底的主表面上形成Si 3 N 4层; 使用光刻法构图Si 3 N 4层以形成具有最小宽度的图案化的Si 3 N 4层; 使用图案化的Si 3 N 4层作为掩模对GaAs衬底进行湿法蚀刻，以在图案化的Si 3 N 4之下形成GaAs衬底的（111）和（100）表面; 在GaAs衬底上选择性地生长GaAs膜，使用图案化的Si 3 N 4层作为掩模进行蚀刻，以便仅在GaAs衬底的（100）表面上形成具有两个（111）面的GaAs膜; 并去除Si3N4层。 可以使用由衬底的表面取向引起的生长速度差，在GaAs衬底上形成V形槽，因此可以以双重密度形成沟槽。

公开(公告)号：US6033972A

公开(公告)日：2000-03-07

申请号：US135124

申请日：1998-08-17

申请人： Jeong Rae Ro ,  Sung Bock Kim ,  El Hang Lee

发明人： Jeong Rae Ro ,  Sung Bock Kim ,  El Hang Lee

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/208

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02631 ,  Y10S438/962

摘要： The formation of self-assembled GaAs quantum dots on (100) GaAs via chemical beam epitaxy (CBE) technique using triethylgallium (TEGa) and arsine (AsH.sub.3) is disclosed. GaAs quantum dots are easy to grow from Ga-droplets which are successively supplied with arsine with neither pattern definition nor pre-treatment steps prior to the growth. The density and the size of Ga-droplets are found to be sensitive to the growth conditions, such as the growth temperature, the beam equivalent pressure of TEGa, and the amount of TEGa supplied. This invention suggests that, unlike Stranski-Krastanow growth, the Ga-droplet-induced CBE technique can be a useful method for the fabrication of quantum dot structure by simple change of gas supply mode, even in lattice-matched system.

摘要翻译： 公开了通过使用三乙基镓（TEGa）和胂（AsH 3）的化学束外延（CBE）技术在（100）GaAs上自组装GaAs量子点的形成。 GaAs量子点容易从Ga液滴中生长，其连续地供应胂，既没有图案定义也没有在生长之前的预处理步骤。 发现Ga液滴的密度和尺寸对生长条件如生长温度，TEGa的束当量压力和所提供的TEGa的量是敏感的。 本发明表明，与Stranski-Krastanow生长不同，Ga液滴诱导的CBE技术可以通过气体供应模式的简单改变来制造量子点结构的有用方法，即使在晶格匹配系统中也是如此。