Video Codec Method and System
    1.
    发明申请
    Video Codec Method and System 有权
    视频编解码方法和系统

    公开(公告)号:US20110096990A1

    公开(公告)日:2011-04-28

    申请号:US12605255

    申请日:2009-10-23

    IPC分类号: G06K9/34 G06K9/36

    摘要: Techniques pertaining to scalable video codec are disclosed. According to one aspect of the present invention, a video image is analyzed and a region of interest (ROI) and a region of non-interest (non-ROI) are identified. By comparing the non-ROI image with that of a previous image, a background ignored identifier is created indicating whether the non-ROI can be ignored during encoding and decoding processes. Based on the status of the background ignored identifier, the encoder encodes the images into a basic layer (BL) and an enhanced layer (EL), and transmits the coded bit streams along with the identifier to a decoder. The decoder reconstructs the image based on the identifier and the BL and the EL bit streams.

    摘要翻译: 公开了与可伸缩视频编解码器有关的技术。 根据本发明的一个方面,分析视频图像,并且识别感兴趣区域(ROI)和非感兴趣区域(非ROI)。 通过将非ROI图像与先前图像的非ROI图像进行比较,创建背景忽略的标识符,指示在编码和解码过程期间是否可以忽略非ROI。 基于背景忽略标识符的状态,编码器将图像编码为基本层(BL)和增强层(EL),并将编码的比特流与标识符一起发送到解码器。 解码器基于标识符和BL和EL比特流重构图像。

    Duty cycle correction of a multi-gigahertz clock signal with crossover point control
    2.
    发明授权
    Duty cycle correction of a multi-gigahertz clock signal with crossover point control 有权
    具有交叉点控制的多吉赫兹时钟信号的占空比校正

    公开(公告)号:US07496155B1

    公开(公告)日:2009-02-24

    申请号:US11228655

    申请日:2005-09-16

    申请人: Jinghui Lu Yiqin Chen

    发明人: Jinghui Lu Yiqin Chen

    IPC分类号: H04L27/00

    CPC分类号: H04L25/0292 H04L7/033

    摘要: A clock recovery circuit includes a crossover adjustment circuit operable to adjust a crossover point to adjust a corresponding duty cycle. The adjustment circuit comprises a feedback adjustment combining element which is implemented as summing elements and a crossover point control clock amplifier, an operational amplifier with a resistor in place of a low pass filter at an input of the operational amplifier and feedback driver. The summing element within the feedback adjustment combining element combines input clocks with feedback signals, the crossover point control clock amplifier includes adjustment driver, the two cross coupled PMOS along with the resistor connected between them, reshape input clocks, adjust cross over point and provide output clocks with DCD corrected. A modified Miller capacitor comprising a resistor in series with a capacitor across a drain and gate of a cascode transistor pair is utilized in an output stage to adjust corner frequencies.

    摘要翻译: 时钟恢复电路包括可操作以调整交叉点以调整相应的占空比的交叉调整电路。 调节电路包括反馈调整组合元件,其被实现为求和元件和交叉点控制时钟放大器,运算放大器具有电阻器,代替在运算放大器和反馈驱动器的输入处的低通滤波器。 反馈调整组合元件中的求和元素将输入时钟与反馈信号相结合,交叉点控制时钟放大器包括调整驱动器,两个交叉耦合PMOS以及连接在它们之间的电阻,重新形成输入时钟,调整交叉点并提供输出 DCD校正时钟。 一个改进的米勒电容器包括与串联晶体管对的漏极和栅极上的电容器串联的电阻器,用于输出级以调整转角频率。

    Apparatus and method for determining positions of pilot sub-carries in an OFDM symbol
    3.
    发明申请
    Apparatus and method for determining positions of pilot sub-carries in an OFDM symbol 有权
    用于确定OFDM符号中的导频子载波的位置的装置和方法

    公开(公告)号:US20080298485A1

    公开(公告)日:2008-12-04

    申请号:US12023034

    申请日:2008-01-31

    申请人: JingHui LU

    发明人: JingHui LU

    IPC分类号: H04K1/10

    摘要: Techniques for determining positions of pilot sub-carries in a received OFDM symbol are described. Components of pilot sub-carries from a theoretical OFDM symbol are extracted to form M theoretical pilot sequences according to M possible distributions in frequency domain of the pilot sub-carries in the theoretical OFDM symbol. Components of pilot sub-carries from the received OFDM symbol are also extracted to form K hypothetical pilot sequences according to K possible distributions in frequency domain of pilot sub-carries in the received OFDM symbol. The correlations of every two adjacent elements of the theoretical pilot sequences are calculated to get M corresponding theoretical correlation sequences, and the correlations of every two adjacent elements of the hypothetical pilot sequence are also calculated to get K corresponding hypothetical correlation sequences. Sequence correlations between the hypothetical correlation sequences and the theoretical correlation sequences are then calculated. The positions of pilot sub-carriers in the received OFDM symbol can be determined from the one that has the maximum modulus value.

    摘要翻译: 描述用于确定接收的OFDM符号中的导频子载波的位置的技术。 根据理论OFDM符号中的导频子载波的频域中的M个可能分布,提取理论OFDM符号的导频子载波的分量,形成M个理论导频序列。 根据接收到的OFDM符号中的导频子载波的频域中的K个可能分布,也提取从接收的OFDM符号导频子载波的分量,以形成K个假设导频序列。 计算理论导频序列的每两个相邻元素的相关性以得到M个对应的理论相关序列,并且还计算假设导频序列的每两个相邻元素的相关性以获得K个相应的假设相关序列。 然后计算假设相关序列与理论相关序列之间的序列相关性。 可以从具有最大模数值的导频子载波中确定接收的OFDM符号中的导频子载波的位置。

    Differential signal strength detector
    4.
    发明授权
    Differential signal strength detector 有权
    差分信号强度检测器

    公开(公告)号:US07460848B1

    公开(公告)日:2008-12-02

    申请号:US10955062

    申请日:2004-09-29

    IPC分类号: H04B17/00 H03K5/153

    CPC分类号: H04B17/318

    摘要: A signal detection circuit includes a first signal multiplier operably coupled to square an input signal, a second signal multiplier operably coupled to square a reference signal, and a filter module operably coupled to produce a digital output representative of the input signal based on a squared input signal and a squared reference signal.

    摘要翻译: 信号检测电路包括可操作地耦合到平方输入信号的第一信号乘法器,可操作地耦合到平方参考信号的第二信号乘法器和可操作地耦合以产生代表输入信号的数字输出的滤波器模块,其基于平方输入 信号和平方参考信号。

    Transmitter with multiphase data combiner for parallel to serial data conversion
    5.
    发明授权
    Transmitter with multiphase data combiner for parallel to serial data conversion 有权
    具有多相数据组合器的发射机,用于并行到串行数据转换

    公开(公告)号:US06611218B1

    公开(公告)日:2003-08-26

    申请号:US10043771

    申请日:2002-01-09

    IPC分类号: H03M900

    CPC分类号: H03M9/00 H03L7/06

    摘要: Described are high-speed parallel-to-serial converters. The converters include data combiners with differential current-steering circuits that respond to parallel data bits by producing complementary current signals representing a differential, serialized version of the parallel data bits. One embodiment includes complementary data-input transistors to expedite the data combiner's response to changes in input data.

    摘要翻译: 描述了高速并行到串行转换器。 转换器包括具有差分电流 - 转向电路的数据组合器,其通过产生表示并行数据位的差分串行版本的互补电流信号来响应并行数据位。 一个实施例包括补充数据输入晶体管,以加速数据组合器对输入数据变化的响应。

    Combined decision feedback equalization and linear equalization
    6.
    发明授权
    Combined decision feedback equalization and linear equalization 有权
    组合决策反馈均衡和线性均衡

    公开(公告)号:US07599431B1

    公开(公告)日:2009-10-06

    申请号:US10997159

    申请日:2004-11-24

    IPC分类号: H03H7/30

    摘要: A communication system includes a transmitter, a communication channel, and a receiver. The transmitter includes a pre-emphasis module, a summing module, a line driver, and a decision feedback pre-emphasis (DFP) module to produce a pre-emphasized serial stream of data based on a communications channel response and an inter-symbol interference level. The receiver includes a linear equalizer, a summing module, a decision module, and a decision feedback equalization (DFE) module. The linear equalizer produces an equalized serial stream of data. The summing module sums at least one data element of the equalized serial stream of data with DFE data elements to produce equalized data elements. The decision module interprets the equalized data elements to produce interpreted data elements to DFE module, which produces the DFE data elements from the interpreted data elements.

    摘要翻译: 通信系统包括发射机,通信信道和接收机。 发射机包括预加重模块,求和模块,线路驱动器和决策反馈预加重(DFP)模块,以基于通信信道响应和符号间干扰产生预先强调的串行数据流 水平。 接收机包括线性均衡器,求和模块,决策模块和判决反馈均衡(DFE)模块。 线性均衡器产生均衡的串行数据流。 求和模块将均衡的串行数据流中的至少一个数据元素与DFE数据元素相加以产生均衡的数据元素。 决策模块解释均衡的数据元素以产生解释的数据元素到DFE模块,其从解释的数据元素产生DFE数据元素。

    Digital comb filter having a cascaded integrator stage with adjustable
gain
    7.
    发明授权
    Digital comb filter having a cascaded integrator stage with adjustable gain 失效
    数字梳状滤波器具有可调增益的级联积分器级

    公开(公告)号:US6161118A

    公开(公告)日:2000-12-12

    申请号:US96782

    申请日:1998-06-12

    申请人: Jinghui Lu

    发明人: Jinghui Lu

    IPC分类号: H03H17/06 G06F5/00 G06F17/10

    CPC分类号: H03H17/0671

    摘要: A comb filter is provided for achieving substantial attenuation of aliasing or imaging bans of a signal to be filtered. The comb filter can perform decimation or interpolation, depending upon its application. Integration can include an integration term with adjustable voltage accumulation at a particular sample point in time. The accumulation factor can be an integer or fractional number and is introduced at a sample count value L within each of M number of samples formed by the rate change switch within the comb filter. The amount of gain being introduced can possibly vary depending on the number of accumulation cycles programmed within configuration registers of the digital signal processor which carries out the comb filter functions. The programmable accumulator avoids having to implement a multiplication operation and the complexities associated therewith.

    摘要翻译: 提供梳状滤波器用于实现待滤波信号的混叠或成像禁令的实质衰减。 梳状滤波器可以根据其应用执行抽取或插值。 集成可以包括在特定采样点处具有可调电压累积的积分项。 积分因子可以是整数或分数,并且在由梳状滤波器内的速率变换开关形成的M个采样的每个样本计数值L内引入。 引入的增益量可以根据执行梳状滤波器功能的数字信号处理器的配置寄存器内编程的累积循环的数量而变化。 可编程累加器避免必须执行乘法运算和与之相关的复杂性。

    Video codec method and system
    10.
    发明授权
    Video codec method and system 有权
    视频编解码方法和系统

    公开(公告)号:US08369633B2

    公开(公告)日:2013-02-05

    申请号:US12605255

    申请日:2009-10-23

    IPC分类号: G06K9/46

    摘要: Techniques pertaining to scalable video codec are disclosed. According to one aspect of the present invention, a video image is analyzed and a region of interest (ROI) and a region of non-interest (non-ROI) are identified. By comparing the non-ROI image with that of a previous image, a background ignored identifier is created indicating whether the non-ROI can be ignored during encoding and decoding processes. Based on the status of the background ignored identifier, the encoder encodes the images into a basic layer (BL) and an enhanced layer (EL), and transmits the coded bit streams along with the identifier to a decoder. The decoder reconstructs the image based on the identifier and the BL and the EL bit streams.

    摘要翻译: 公开了与可伸缩视频编解码器有关的技术。 根据本发明的一个方面,分析视频图像,并且识别感兴趣区域(ROI)和非感兴趣区域(非ROI)。 通过将非ROI图像与先前图像的非ROI图像进行比较,创建背景忽略的标识符,指示在编码和解码过程期间是否可以忽略非ROI。 基于背景忽略标识符的状态,编码器将图像编码为基本层(BL)和增强层(EL),并将编码的比特流与标识符一起发送到解码器。 解码器基于标识符和BL和EL比特流重构图像。