公开(公告)号：US09496047B2

公开(公告)日：2016-11-15

申请号：US14011606

申请日：2013-08-27

申请人： Jun Yang ,  Hwong-Kwo Lin ,  Hua Chen ,  Yong Li ,  Ju Shen

发明人： Jun Yang ,  Hwong-Kwo Lin ,  Hua Chen ,  Yong Li ,  Ju Shen

IPC分类号： G11C7/12 ,  G11C17/08 ,  G11C7/20

CPC分类号： G11C17/08 ,  G11C7/20

摘要： In various embodiments, a memory cell and a memory are provided. The memory cell comprises a Static Random Access Memory (SRAM) cell including a reset-set (RS) flip-flop and a Read Only Memory (ROM) cell being connected (or coupled) to the SRAM cell to set logic states of internal latch nodes of the RS flip-flop when the ROM cell is triggered. The size of the memory cells proposed in an embodiment of the invention is much smaller than the sum of the size of ROM cells and the size of SRAM cells with the capacity of the memory cells same as the sum of the capacity of the ROM cells and the capacity of the SRAM cells.

摘要翻译： 在各种实施例中，提供存储器单元和存储器。 该存储单元包括一个静态随机存取存储器（SRAM）单元，它包括复位（RS）触发器和只读存储器（ROM）单元，该单元被连接（或耦合）到SRAM单元以设置内部锁存器的逻辑状态 当触发ROM单元时，RS触发器的节点。 在本发明的实施例中提出的存储器单元的尺寸远小于ROM单元的尺寸和SRAM单元的尺寸的总和，其中存储器单元的容量与ROM单元的容量和 SRAM单元的容量。

公开(公告)号：US20150188591A1

公开(公告)日：2015-07-02

申请号：US14141527

申请日：2013-12-27

申请人： Cheng-Hsien Shen ,  Meng-Ju Shen

发明人： Cheng-Hsien Shen ,  Meng-Ju Shen

IPC分类号： H04B1/3883 ,  H04M1/02

CPC分类号： H04B1/3883 ,  H02J7/0044 ,  H04B1/3877 ,  H04M1/0274 ,  H04M1/04

摘要： A cell phone charger holder includes a main body, a plug, and an electric cord. The plug has two blades. The main body has a front face provided with a receiving chamber for receiving the plug. The main body has a side provided with an annular groove for winding the electric cord. The main body has a lower portion provided with two positioning hooks for placing a cell phone. The main body has a back face provided with two upright slots corresponding to the blades of the plug. Thus, the plug and the electric cord are positioned and stored completely by the main body. In addition, when the main body is disposed at an inclined state, the cell phone supported by the main body is disposed at an inclined state.

摘要翻译： 手机充电器支架包括主体，插头和电线。 插头有两个刀片。 主体具有设置有用于接收插头的接收室的前表面。 主体具有设置有用于缠绕电线的环形槽的一侧。 主体具有设置有用于放置手机的两个定位钩的下部。 主体具有设置有与插头的叶片相对应的两个直立插槽的背面。 因此，插头和电线被主体完全定位和储存。 此外，当主体处于倾斜状态时，由主体支撑的手机被设置在倾斜状态。

公开(公告)号：US07834652B1

公开(公告)日：2010-11-16

申请号：US12709685

申请日：2010-02-22

申请人： Howard Tang ,  Ju Shen ,  San-Ta Kow

发明人： Howard Tang ,  Ju Shen ,  San-Ta Kow

IPC分类号： H03K19/00

CPC分类号： H03K19/17768 ,  G06F21/76

摘要： In embodiment of the invention, a programmable logic device includes configuration memory adapted to be programmed with configuration data and a plurality of programmable fuses adapted to store a security key for use with configuration data. The security key includes a plurality of data bit values, wherein each data bit value of the security key is associated with a subset of a least three fuses each storing a bit. Each of a plurality of decoders is adapted to retrieve a data bit value of the security key by providing the bit value stored by a majority of the fuses of the associated subset as the data bit value of the security key.

摘要翻译： 在本发明的实施例中，可编程逻辑器件包括适于用配置数据编程的配置存储器和适于存储与配置数据一起使用的安全密钥的多个可编程保险丝。 安全密钥包括多个数据比特值，其中安全密钥的每个数据比特值与每个存储一位的至少三个熔丝的子集相关联。 多个解码器中的每一个适于通过提供由相关联的子集的大多数熔丝存储的位值作为安全密钥的数据位值来检索安全密钥的数据位值。

公开(公告)号：US07675313B1

公开(公告)日：2010-03-09

申请号：US11498645

申请日：2006-08-03

申请人： Howard Tang ,  Ju Shen ,  San-Ta Kow

发明人： Howard Tang ,  Ju Shen ,  San-Ta Kow

IPC分类号： H03K19/00

CPC分类号： H03K19/17768 ,  G06F21/76

摘要： Systems and methods are disclosed herein to provide improved security key techniques for programmable logic devices. For example, in accordance with an embodiment of the present invention, a method of providing data security for a programmable logic device (PLD) includes programming a plurality of programmable fuses that stores a security key comprising a plurality of data bit values, wherein each data bit value is associated with a respective subset of at least three of the fuses. The security key is retrieved from the fuses using the data bit values stored by each subset of the fuses. An encrypted configuration data bitstream is decrypted using the retrieved security key to obtain an original configuration data bitstream to configure the PLD.

摘要翻译： 本文公开了系统和方法，以提供用于可编程逻辑器件的改进的安全关键技术。 例如，根据本发明的实施例，一种为可编程逻辑器件（PLD）提供数据安全性的方法包括对存储包括多个数据位值的安全密钥的多个可编程熔丝进行编程，其中每个数据 位值与至少三个保险丝的相应子集相关联。 使用保险丝的每个子集存储的数据位值，从保险丝检索安全密钥。 使用所检索的安全密钥解密加密的配置数据比特流，以获得配置PLD的原始配置数据比特流。

公开(公告)号：US20100025699A1

公开(公告)日：2010-02-04

申请号：US12182151

申请日：2008-07-30

申请人： Chia-Chi Liu ,  Chih-Chieh Hu ,  Yu-Tsung Tsai ,  Pao-Chi Chi ,  Chi-Ju Shen

发明人： Chia-Chi Liu ,  Chih-Chieh Hu ,  Yu-Tsung Tsai ,  Pao-Chi Chi ,  Chi-Ju Shen

IPC分类号： H01L33/00

CPC分类号： H01L25/0753 ,  H01L33/50 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A light emitting diode (LED) chip package is provided. The LED chip package comprises a carrier, a first LED chip, a second LED chip and an encapsulant. The first LED chip is disposed on and electrically connected to the carrier, wherein the first LED chip is adapted for emitting a first light. The second LED chip is disposed on and electrically connected to the carrier, wherein the second LED chip is adapted for emitting a second light. The encapsulant has a doped phosphor, and encapsulates the first LED chip and the second LED chip, wherein the first light is adapted for exciting the doped phosphor to emit a third light.

摘要翻译： 提供了一种发光二极管（LED）芯片封装。 LED芯片封装包括载体，第一LED芯片，第二LED芯片和密封剂。 第一LED芯片设置在载体上并与其电连接，其中第一LED芯片适于发射第一光。 第二LED芯片设置在载体上并与其电连接，其中第二LED芯片适于发射第二个光。 密封剂具有掺杂的磷光体，并且封装第一LED芯片和第二LED芯片，其中第一光适于激发掺杂的磷光体以发射第三光。

公开(公告)号：US07375549B1

公开(公告)日：2008-05-20

申请号：US11350436

申请日：2006-02-09

申请人： Howard Tang ,  Ju Shen ,  San-Ta Kow

发明人： Howard Tang ,  Ju Shen ,  San-Ta Kow

IPC分类号： H03K19/173

CPC分类号： H03K19/17772 ,  H03K19/17744 ,  H03K19/17764

摘要： Improved reconfiguration techniques are provided for programmable logic devices (PLDs). For example, in accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks, a plurality of input/output blocks and corresponding input/output pins, and a plurality of configuration memory cells. The configuration memory cells are adapted to store configuration data for configuration of the logic blocks and the input/output blocks. A data port is adapted to provide a clock signal to and receive configuration data from an external memory. A plurality of circuits are adapted to hold the input/output pins in a known logic state during the configuration.

摘要翻译： 为可编程逻辑器件（PLD）提供了改进的重新配置技术。 例如，根据本发明的实施例，可编程逻辑器件包括多个逻辑块，多个输入/输出块和相应的输入/输出引脚以及多个配置存储器单元。 配置存储单元适于存储用于配置逻辑块和输入/输出块的配置数据。 数据端口适于向外部存储器提供时钟信号并从外部存储器接收配置数据。 多个电路适于在配置期间将输入/输出引脚保持在已知的逻辑状态。

公开(公告)号：US07357654B2

公开(公告)日：2008-04-15

申请号：US10605237

申请日：2003-09-17

申请人： Yu-Chuan Lin ,  Chun-Chieh Chen ,  Hung-Ju Shen ,  Chien-Hua Wu ,  Sheng-Lin Chiu ,  Huan-Tung Wang ,  Hsin-Chih Hung

发明人： Yu-Chuan Lin ,  Chun-Chieh Chen ,  Hung-Ju Shen ,  Chien-Hua Wu ,  Sheng-Lin Chiu ,  Huan-Tung Wang ,  Hsin-Chih Hung

IPC分类号： H01R3/00

CPC分类号： H05K5/0278

摘要： An interface apparatus having a rotational mechanism for connecting with an interface port in an electronic product is provided. The interface apparatus comprises a body, a connector and a rotational mechanism. The connector is used for connecting with the interface port of an electronic device. The rotational mechanism links up the body with the connector. The rotational mechanism has one to five degrees of freedom of movements. One or a multiple of rotational junctions together provides the degrees of freedom of movements in the rotational mechanism.

摘要翻译： 提供具有用于与电子产品中的接口端口连接的旋转机构的接口装置。 接口装置包括主体，连接器和旋转机构。 连接器用于与电子设备的接口连接。 旋转机构将主体与连接器连接。 旋转机构具有一到五个运动自由度。 一个或多个旋转接头一起提供了旋转机构中的运动的自由度。

公开(公告)号：US07208975B1

公开(公告)日：2007-04-24

申请号：US11040772

申请日：2005-01-20

申请人： Om P. Agrawal ,  Jock Tomlinson ,  Kuang Chi ,  Ji Zhao ,  Ju Shen ,  Jinghui Zhu

发明人： Om P. Agrawal ,  Jock Tomlinson ,  Kuang Chi ,  Ji Zhao ,  Ju Shen ,  Jinghui Zhu

IPC分类号： H03K19/173

CPC分类号： H03K19/17736 ,  H03K19/17744

摘要： In one embodiment, a programmable interconnect includes SERDES circuits dedicated to communicating high-speed data and input/output (I/O) circuits dedicated to communicating low-speed data. A routing structure is configurable to couple a SERDES circuit to another SERDES circuit, a SERDES circuit to an I/O circuit, an I/O circuit to a SERDES circuit, and an I/O circuit to another I/O circuit over routing paths having deterministic routing delays. In another embodiment, the routing structure includes a high-speed routing structure for communicating high-speed data to and from a SERDES circuit and a low-speed routing structure for communicating low-speed data to and from an I/O circuit.

摘要翻译： 在一个实施例中，可编程互连包括专用于传送高速数据的SERDES电路和专用于传送低速数据的输入/输出（I / O）电路。 布线结构可配置为将SERDES电路耦合到另一个SERDES电路，到I / O电路的SERDES电路，到SERDES电路的I / O电路以及通过路由路径到另一个I / O电路的I / O电路 具有确定性的路由延迟。 在另一个实施例中，路由结构包括用于向SERDES电路传送高速数据和从SERDES电路传送高速数据的高速路由结构以及用于向I / O电路传送低速数据的低速路由结构。

公开(公告)号：US06777979B1

公开(公告)日：2004-08-17

申请号：US10334642

申请日：2002-12-31

申请人： Jinghui Zhu ,  Jin Ni ,  Ju Shen ,  Tong-Sheng Wang

发明人： Jinghui Zhu ,  Jin Ni ,  Ju Shen ,  Tong-Sheng Wang

IPC分类号： H03K19177

CPC分类号： H03K19/17744

摘要： A FIFO coordinates with registers of a programmable semiconductor device, wherein the registers are clocked according to an internal clock and words are written into the FIFO according to a write clock. The FIFO includes a read counter responsive to the internal clock to identify a current read address in the FIFO. At a given cycle of the internal clock, the word stored at the current read address of the FIFO may be registered within the registers of the programmable semiconductor device.

摘要翻译： FIFO与可编程半导体器件的寄存器协调，其中寄存器根据内部时钟计时，并且根据写时钟将字写入FIFO。 FIFO包括响应于内部时钟的读取计数器，以识别FIFO中的当前读取地址。 在内部时钟的给定周期，存储在FIFO的当前读取地址处的字可以被注册在可编程半导体器件的寄存器内。

公开(公告)号：US06614708B1

公开(公告)日：2003-09-02

申请号：US10065567

申请日：2002-10-31

申请人： Yu-Chuan Lin ,  Chun-Chieh Chen ,  Hung-Ju Shen ,  Tao-Chien Wei ,  Chien-Hua Wu ,  Sheng-Lin Chiu ,  Huan-Tung Wang ,  Hsin-Chih Hung

发明人： Yu-Chuan Lin ,  Chun-Chieh Chen ,  Hung-Ju Shen ,  Tao-Chien Wei ,  Chien-Hua Wu ,  Sheng-Lin Chiu ,  Huan-Tung Wang ,  Hsin-Chih Hung

IPC分类号： G11C800

CPC分类号： G11C5/141 ,  G11C16/102

摘要： A non-volatile memory device with a built-in laser indicator. The non-volatile memory device includes a connective port, a buffer, a non-volatile memory unit, a memory controller, a battery and a laser indicator. The connective port connects electrically to a host machine. The host machine transfers data and provides power to the connective port through an external bus. The buffer holds the data transmitted to the connective port temporarily. The memory controller controls the transfer of data from the buffer into the non-volatile memory unit. The battery receives host power and stores up some host power to serve as backup power. The battery also provides the power for driving the laser indicator.

摘要翻译： 具有内置激光指示器的非易失性存储器件。 非易失性存储器件包括连接端口，缓冲器，非易失性存储器单元，存储器控制器，电池和激光指示器。 连接端口与主机电连接。 主机传输数据，并通过外部总线向连接端口供电。 缓冲区暂时保存发送到连接端口的数据。 存储器控制器控制从缓冲器到非易失性存储器单元的数据传输。 电池接收主机电源并存储一些主机电源作为备用电源。 电池还提供驱动激光指示灯的电源。