公开(公告)号：US08753920B2

公开(公告)日：2014-06-17

申请号：US13195444

申请日：2011-08-01

申请人： Bo Sung Kim ,  Doo-Hyoung Lee ,  Yeon-Taek Jeong ,  Ki-Beom Lee ,  Young-Min Kim ,  Tae-Young Choi ,  Seon-Pil Jang ,  Kang-Moon Jo

发明人： Bo Sung Kim ,  Doo-Hyoung Lee ,  Yeon-Taek Jeong ,  Ki-Beom Lee ,  Young-Min Kim ,  Tae-Young Choi ,  Seon-Pil Jang ,  Kang-Moon Jo

IPC分类号： H01L21/36

CPC分类号： H01L21/02628 ,  H01L21/02554 ,  H01L21/02565

摘要： Provided is a precursor composition for an oxide semiconductor. The precursor composition for the oxide semiconductor includes a metal complex compound formed by a metal ion and an organic ligand, wherein the precursor composition is represented by the following Formula 1. MAn   (Formula 1) Herein, M is a metal ion, A is an organic ligand which includes α-substituted carboxylate, and n is a natural number.

摘要翻译： 提供一种用于氧化物半导体的前体组合物。 用于氧化物半导体的前体组合物包括由金属离子和有机配体形成的金属络合物，其中前体组合物由下式1表示。MAn（式1）这里，M是金属离子，A是 包括α-取代的羧酸酯的有机配体，n是自然数。

公开(公告)号：US08633498B2

公开(公告)日：2014-01-21

申请号：US13112381

申请日：2011-05-20

申请人： Tae-Young Choi ,  Kang-Moon Jo ,  Bo-Sung Kim ,  Young-Min Kim

发明人： Tae-Young Choi ,  Kang-Moon Jo ,  Bo-Sung Kim ,  Young-Min Kim

IPC分类号： H01L29/18

CPC分类号： H01L27/1288 ,  H01L27/1225 ,  H01L27/1292

摘要： A display substrate includes a base substrate, a data line, a gate line, a switching element, a self assembled monolayer (SAM) and a pixel electrode. The data line is formed on the base substrate. The gate line is formed across the data line. The switching element includes a source electrode electrically connected to the data line, a drain electrode spaced apart from the source electrode, a semiconductor pattern covering the source and drain electrodes, and a gate electrode electrically connected to the gate line and facing the semiconductor pattern. The SAM is disposed around the semiconductor pattern and a conductive pattern including the data line. The pixel electrode is electrically connected to the switching element.

摘要翻译： 显示基板包括基底基板，数据线，栅极线，开关元件，自组装单层（SAM）和像素电极。 数据线形成在基底基板上。 栅极线跨越数据线形成。 开关元件包括电连接到数据线的源电极，与源电极间隔开的漏电极，覆盖源电极和漏电极的半导体图案，以及电连接到栅极线并面向半导体图案的栅电极。 SAM围绕半导​​体图案设置，并且包括数据线的导电图案。 像素电极电连接到开关元件。

公开(公告)号：US08877551B2

公开(公告)日：2014-11-04

申请号：US13619075

申请日：2012-09-14

申请人： Bo-Sung Kim ,  Jun-Ho Song ,  Doo-Na Kim ,  Kang-Moon Jo ,  Tae-Young Choi ,  Masataka Kano ,  Yeon-Taek Jeong

发明人： Bo-Sung Kim ,  Jun-Ho Song ,  Doo-Na Kim ,  Kang-Moon Jo ,  Tae-Young Choi ,  Masataka Kano ,  Yeon-Taek Jeong

IPC分类号： H01L21/00

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66969

摘要： In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.

摘要翻译： 在制造薄膜晶体管的方法中，在具有栅电极的基底基板的快速表面上，在基底基板的第一表面，氧化物半导体层，绝缘层和光致抗蚀剂层上形成栅电极。 使用第一光致抗蚀剂图案对绝缘层和氧化物半导体层进行构图，以形成蚀刻停止层和活性图案。 源极和漏极形成在具有有源图案的基底基板上，并且蚀刻停止器，源极电极和漏电极与蚀刻停止器的两端重叠并且彼此间隔开。 因此，当形成活性图案和蚀刻停止物时，可以通过省略掩模来降低制造成本。

公开(公告)号：US08760596B2

公开(公告)日：2014-06-24

申请号：US13173457

申请日：2011-06-30

申请人： Tae-Young Choi ,  Bo Sung Kim ,  Young Min Kim ,  Seon-Pil Jang ,  Kang Moon Jo ,  Yeon Taek Jeong ,  Ki Beom Lee

发明人： Tae-Young Choi ,  Bo Sung Kim ,  Young Min Kim ,  Seon-Pil Jang ,  Kang Moon Jo ,  Yeon Taek Jeong ,  Ki Beom Lee

IPC分类号： G02F1/136

CPC分类号： H01L27/1225 ,  G02F1/13439 ,  G02F2001/13685 ,  G02F2001/1676

摘要： A thin film transistor array panel includes a source electrode and a drain electrode on an insulating substrate, an oxide semiconductor on the insulating substrate and overlapping the source electrode and the drain electrode, a passivation layer overlapping the oxide semiconductor and on the insulating substrate, a gate electrode on the passivation layer, and a pixel electrode connected to the drain electrode. The gate electrode and the pixel electrode include a same material. The oxide semiconductor is between the source electrode and the gate electrode, and between the drain electrode and the gate electrode in a cross-sectional view of the thin film transistor array panel.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板上的源极和漏电极，绝缘基板上的氧化物半导体，与源电极和漏电极重叠，钝化层与氧化物半导体和绝缘基板上重叠， 钝化层上的栅极电极和连接到漏电极的像素电极。 栅电极和像素电极包括相同的材料。 在薄膜晶体管阵列面板的截面图中，氧化物半导体位于源电极和栅电极之间，在漏电极和栅电极之间。

公开(公告)号：US20130234169A1

公开(公告)日：2013-09-12

申请号：US13619075

申请日：2012-09-14

申请人： Bo-Sung KIM ,  Jun-Ho SONG ,  Doo-Na KIM ,  Kang-Moon JO ,  Tae-Young CHOI ,  Masataka KANO ,  Yeon-Taek JEONG

发明人： Bo-Sung KIM ,  Jun-Ho SONG ,  Doo-Na KIM ,  Kang-Moon JO ,  Tae-Young CHOI ,  Masataka KANO ,  Yeon-Taek JEONG

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66969

摘要： In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.

摘要翻译： 在制造薄膜晶体管的方法中，在具有栅电极的基底基板的快速表面上，在基底基板的第一表面，氧化物半导体层，绝缘层和光致抗蚀剂层上形成栅电极。 使用第一光致抗蚀剂图案对绝缘层和氧化物半导体层进行构图，以形成蚀刻停止层和活性图案。 源极和漏极形成在具有有源图案的基底基板上，并且蚀刻停止器，源极电极和漏电极与蚀刻停止器的两端重叠并且彼此间隔开。 因此，当形成活性图案和蚀刻停止物时，可以通过省略掩模来降低制造成本。

公开(公告)号：US08367444B2

公开(公告)日：2013-02-05

申请号：US12902761

申请日：2010-10-12

申请人： Young-Min Kim ,  Bo-Sung Kim ,  Seon-Pil Jang ,  Seung-Hwan Cho ,  Kang-Moon Jo

发明人： Young-Min Kim ,  Bo-Sung Kim ,  Seon-Pil Jang ,  Seung-Hwan Cho ,  Kang-Moon Jo

IPC分类号： H01L21/02

CPC分类号： H01L29/78606 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288

摘要： A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.

摘要翻译： 显示基板包括栅极线，栅极绝缘层，数据线，开关元件，保护绝缘层，栅极焊盘部分和数据焊盘部分。 栅极绝缘层设置在栅极线上。 开关元件连接到栅极线和数据线。 保护绝缘层设置在开关元件上。 栅极焊盘部分包括通过形成在栅极绝缘层上的第一孔与栅极线的端部接触的第一栅极焊盘电极和通过第二栅极焊盘电极与第一栅极焊盘电极接触的第二栅极焊盘电极 孔通过保护层形成。 数据焊盘部分包括通过形成在保护绝缘层上的第三孔与数据线的端部接触的数据焊盘电极。

公开(公告)号：US20120244667A1

公开(公告)日：2012-09-27

申请号：US13195444

申请日：2011-08-01

申请人： Bo Sung KIM ,  Doo-Hyoung Lee ,  Yeon-Taek Jeong ,  Ki-Beom Lee ,  Young-Min Kim ,  Tae-Young Choi ,  Seon-Pil Jang ,  Kang-Moon Jo

发明人： Bo Sung KIM ,  Doo-Hyoung Lee ,  Yeon-Taek Jeong ,  Ki-Beom Lee ,  Young-Min Kim ,  Tae-Young Choi ,  Seon-Pil Jang ,  Kang-Moon Jo

IPC分类号： H01L21/335 ,  H01B1/12 ,  H01L21/20 ,  C07F17/00

CPC分类号： H01L21/02628 ,  H01L21/02554 ,  H01L21/02565

摘要： Provided is a precursor composition for an oxide semiconductor. The precursor composition for the oxide semiconductor includes a metal complex compound formed by a metal ion and an organic ligand, wherein the precursor composition is represented by the following Formula 1. MAn   (Formula 1( Herein, M is a metal ion, A is an organic ligand which includes α-substituted carboxylate, and n is a natural number.

摘要翻译： 提供一种用于氧化物半导体的前体组合物。 用于氧化物半导体的前体组合物包括由金属离子和有机配体形成的金属络合物，其中前体组合物由下式1表示。MAn（式1（其中M是金属离子，A是 包括α-取代的羧酸酯的有机配体，n是自然数。

公开(公告)号：US20120120362A1

公开(公告)日：2012-05-17

申请号：US13173457

申请日：2011-06-30

申请人： Tae-Young CHOI ,  Bo Sung KIM ,  Young Min KIM ,  Seon-Pil JANG ,  Kang Moon JO ,  Yeon Taek JEONG ,  Ki Beom LEE

发明人： Tae-Young CHOI ,  Bo Sung KIM ,  Young Min KIM ,  Seon-Pil JANG ,  Kang Moon JO ,  Yeon Taek JEONG ,  Ki Beom LEE

IPC分类号： G02F1/1343 ,  H01L33/08 ,  H01L29/786

CPC分类号： H01L27/1225 ,  G02F1/13439 ,  G02F2001/13685 ,  G02F2001/1676

摘要： A thin film transistor array panel includes a source electrode and a drain electrode on an insulating substrate, an oxide semiconductor on the insulating substrate and overlapping the source electrode and the drain electrode, a passivation layer overlapping the oxide semiconductor and on the insulating substrate, a gate electrode on the passivation layer, and a pixel electrode connected to the drain electrode. The gate electrode and the pixel electrode include a same material. The oxide semiconductor is between the source electrode and the gate electrode, and between the drain electrode and the gate electrode in a cross-sectional view of the thin film transistor array panel.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板上的源电极和漏电极，绝缘基板上的氧化物半导体与源电极和漏电极重叠，钝化层与氧化物半导体和绝缘基板上的重叠， 钝化层上的栅极电极和连接到漏电极的像素电极。 栅电极和像素电极包括相同的材料。 在薄膜晶体管阵列面板的截面图中，氧化物半导体位于源电极和栅电极之间，在漏电极和栅电极之间。

公开(公告)号：US20110254011A1

公开(公告)日：2011-10-20

申请号：US12902761

申请日：2010-10-12

申请人： Young-Min KIM ,  Bo-Sung KIM ,  Seon-Pil JANG ,  Seung-Hwan CHO ,  Kang-Moon JO

发明人： Young-Min KIM ,  Bo-Sung KIM ,  Seon-Pil JANG ,  Seung-Hwan CHO ,  Kang-Moon JO

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L29/78606 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288

摘要： A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.

摘要翻译： 显示基板包括栅极线，栅极绝缘层，数据线，开关元件，保护绝缘层，栅极焊盘部分和数据焊盘部分。 栅极绝缘层设置在栅极线上。 开关元件连接到栅极线和数据线。 保护绝缘层设置在开关元件上。 栅极焊盘部分包括通过形成在栅极绝缘层上的第一孔与栅极线的端部接触的第一栅极焊盘电极和通过第二栅极焊盘电极与第一栅极焊盘电极接触的第二栅极焊盘电极 孔通过保护层形成。 数据焊盘部分包括通过形成在保护绝缘层上的第三孔与数据线的端部接触的数据焊盘电极。

公开(公告)号：US20120100649A1

公开(公告)日：2012-04-26

申请号：US13100149

申请日：2011-05-03

申请人： Young-Min KIM ,  Seon-Pil JANG ,  Bo-Sung KIM ,  Yeon-Taek JEONG ,  Yong-Su LEE ,  Tae-Young CHOI ,  Ki-Beom LEE ,  Kang Moon JO

发明人： Young-Min KIM ,  Seon-Pil JANG ,  Bo-Sung KIM ,  Yeon-Taek JEONG ,  Yong-Su LEE ,  Tae-Young CHOI ,  Ki-Beom LEE ,  Kang Moon JO

IPC分类号： H01L33/08 ,  B05D3/06 ,  H01L21/336 ,  B05D5/00 ,  H01L21/26 ,  B05D3/02 ,  B05D5/06

CPC分类号： H01L29/7869 ,  H01L21/02667 ,  H01L21/324 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78633

摘要： Provided is a method for manufacturing a film structure.The method for manufacturing the film structure n includes forming a layer of a precursor material on a substrate, preheating the precursor material, and irradiating the precursor material with microwave radiation to form the film structure.

摘要翻译： 提供一种膜结构的制造方法。 制造薄膜结构体n的方法包括在基材上形成前体材料层，预热前体材料，并用微波辐射照射前体材料，形成薄膜结构体。