Semiconductor device having device characteristics improved by straining surface of active region and its manufacture method
    4.
    发明申请
    Semiconductor device having device characteristics improved by straining surface of active region and its manufacture method 有权
    具有通过有源区域的表面变形而改善了器件特性的半导体器件及其制造方法

    公开(公告)号:US20100144117A1

    公开(公告)日:2010-06-10

    申请号:US12708519

    申请日:2010-02-18

    IPC分类号: H01L21/762

    摘要: A trench is formed in a surface layer of a semiconductor substrate, the trench surrounding an active region. A lower insulating film made of insulating material is deposited over the semiconductor device, the lower insulating film filling a lower region of the trench and leaving an empty space in an upper region. An upper insulating film made of insulating material having therein a tensile stress is deposited on the lower insulating film, the upper insulating film filling the empty space left in the upper space. The upper insulating film and the lower insulating film deposited over the semiconductor substrate other than in the trench are removed.

    摘要翻译: 沟槽形成在半导体衬底的表面层中,沟槽围绕有源区。 在半导体器件上沉积由绝缘材料制成的下绝缘膜,下绝缘膜填充沟槽的下部区域并在上部区域留下空的空间。 在其上具有拉伸应力的由绝缘材料制成的上绝缘膜沉积在下绝缘膜上,上绝缘膜填充留在上部空间中的空白空间。 去除沉积在半导体衬底上而不是在沟槽中的上绝缘膜和下绝缘膜。

    Method of manufacturing semiconductor device
    7.
    发明申请
    Method of manufacturing semiconductor device 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20070123035A1

    公开(公告)日:2007-05-31

    申请号:US11358715

    申请日:2006-02-22

    IPC分类号: H01L21/4763 H01L21/473

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,使用SiH 4气体和CO 2通过CVD形成氧化硅膜的步骤 层间绝缘膜上的气体,形成化学放大抗蚀剂膜以覆盖氧化硅膜的步骤,以及在化学放大型抗蚀剂膜上形成第一开口的步骤,其中垂直布线部分为 要形成

    Method of manufacturing semiconductor device
    9.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07749897B2

    公开(公告)日:2010-07-06

    申请号:US12219271

    申请日:2008-07-18

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,通过在层间绝缘膜上使用SiH 4气体和CO 2气体通过CVD形成氧化硅膜的步骤,形成 化学放大抗蚀剂膜覆盖氧化硅膜,以及在要形成垂直布线部分的化学放大抗蚀剂膜上的位置形成第一开口的步骤。