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公开(公告)号:US20110057766A1
公开(公告)日:2011-03-10
申请号:US12773152
申请日:2010-05-04
Applicant: Ching-Feng CHEN , Kun-Hong SHIH , Yen-Ting LIN , Yin-Tien YEH
Inventor: Ching-Feng CHEN , Kun-Hong SHIH , Yen-Ting LIN , Yin-Tien YEH
IPC: H01C1/034
CPC classification number: H01C17/006 , H01C7/003 , H01C7/13 , H01C17/02 , H01C17/065
Abstract: A surface mount resistor includes a resistance body, a first protective layer, a heat-transfer layer, a second protective layer and two electrode layers. The resistance body has a first end portion, a second end portion and a central portion between the first end portion and the second end portion. The first protective layer is disposed on the central portion of the resistance body, and the first end portion and the second end portion are exposed. The heat-transfer layer is plated on at least part of the resistance body. The second protective layer is disposed on at least part of the heat-transfer layer. The electrode layers are respectively arranged on the first end portion and the second end portion, and electrically connected with the heat-transfer layer.
Abstract translation: 表面贴装电阻器包括电阻体,第一保护层,传热层,第二保护层和两个电极层。 电阻体具有在第一端部和第二端部之间的第一端部,第二端部和中心部。 第一保护层设置在电阻体的中心部分,第一端部和第二端部露出。 传热层被电镀在电阻体的至少一部分上。 第二保护层设置在传热层的至少一部分上。 电极层分别设置在第一端部和第二端部上,与传热层电连接。
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公开(公告)号:US20130213704A1
公开(公告)日:2013-08-22
申请号:US13401853
申请日:2012-02-22
Applicant: BAU-RU LU , JENG-JEN LI , KUN-HONG SHIH , KAIPENG CHIANG
Inventor: BAU-RU LU , JENG-JEN LI , KUN-HONG SHIH , KAIPENG CHIANG
CPC classification number: H01L23/49537 , H01L21/563 , H01L23/13 , H01L23/49506 , H01L23/49534 , H01L23/49548 , H01L23/49575 , H01L23/49827 , H01L23/49833 , H01L24/16 , H01L2224/16225 , H01L2924/13055 , H01L2924/13091 , H01L2924/15321 , H05K1/021 , H05K1/186 , Y10T29/49124 , H01L2924/00
Abstract: The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified.
Abstract translation: 本发明公开了一种由装置载体和可修改基底的组合制成的封装结构。 在一个实施例中,在器件载体中形成凹部,并且导电元件设置在衬底上,其中衬底设置在器件载体上,并且导电元件位于器件载体的凹部中。 衬底中的导电图案电连接到器件载体和第一导电元件的I / O端子。 本发明还公开了一种用于制造由器件载体和可修改基底的组合制成的封装结构的方法。 在一个实施例中,衬底中的导电图案的一部分可以被修改。
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公开(公告)号:US09536798B2
公开(公告)日:2017-01-03
申请号:US13401853
申请日:2012-02-22
Applicant: Bau-Ru Lu , Jeng-Jen Li , Kun-Hong Shih , Kaipeng Chiang
Inventor: Bau-Ru Lu , Jeng-Jen Li , Kun-Hong Shih , Kaipeng Chiang
CPC classification number: H01L23/49537 , H01L21/563 , H01L23/13 , H01L23/49506 , H01L23/49534 , H01L23/49548 , H01L23/49575 , H01L23/49827 , H01L23/49833 , H01L24/16 , H01L2224/16225 , H01L2924/13055 , H01L2924/13091 , H01L2924/15321 , H05K1/021 , H05K1/186 , Y10T29/49124 , H01L2924/00
Abstract: The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified.
Abstract translation: 本发明公开了一种由装置载体和可修改基底的组合制成的封装结构。 在一个实施例中,在器件载体中形成凹部,并且导电元件设置在衬底上,其中衬底设置在器件载体上,并且导电元件位于器件载体的凹部中。 衬底中的导电图案电连接到器件载体和第一导电元件的I / O端子。 本发明还公开了一种用于制造由器件载体和可修改基底的组合制成的封装结构的方法。 在一个实施例中,衬底中的导电图案的一部分可以被修改。
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公开(公告)号:US08310334B2
公开(公告)日:2012-11-13
申请号:US12773152
申请日:2010-05-04
Applicant: Ching-Feng Chen , Kun-Hong Shih , Yen-Ting Lin , Yin-Tien Yeh
Inventor: Ching-Feng Chen , Kun-Hong Shih , Yen-Ting Lin , Yin-Tien Yeh
IPC: H01C1/034
CPC classification number: H01C17/006 , H01C7/003 , H01C7/13 , H01C17/02 , H01C17/065
Abstract: A surface mount resistor includes a resistance body, a first protective layer, a heat-transfer layer, a second protective layer and two electrode layers. The resistance body has a first end portion, a second end portion and a central portion between the first end portion and the second end portion. The first protective layer is disposed on the central portion of the resistance body, and the first end portion and the second end portion are exposed. The heat-transfer layer is plated on at least part of the resistance body. The second protective layer is disposed on at least part of the heat-transfer layer. The electrode layers are respectively arranged on the first end portion and the second end portion, and electrically connected with the heat-transfer layer.
Abstract translation: 表面贴装电阻器包括电阻体,第一保护层,传热层,第二保护层和两个电极层。 电阻体具有在第一端部和第二端部之间的第一端部,第二端部和中心部。 第一保护层设置在电阻体的中心部分,第一端部和第二端部露出。 传热层被电镀在电阻体的至少一部分上。 第二保护层设置在传热层的至少一部分上。 电极层分别设置在第一端部和第二端部上,与传热层电连接。
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公开(公告)号:US20110199746A1
公开(公告)日:2011-08-18
申请号:US12705389
申请日:2010-02-12
Applicant: Han-Hsiang LEE , Kun-Hong SHIH , Jeng-Jen LI
Inventor: Han-Hsiang LEE , Kun-Hong SHIH , Jeng-Jen LI
IPC: H05K7/00
CPC classification number: H05K7/1432 , H01L23/13 , H01L23/49531 , H01L23/49541 , H01L2224/49175 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107 , H02M3/00 , H05K1/021 , H05K3/0061 , H05K2201/10924 , H05K2203/1327 , H01L2924/00
Abstract: A composite substrate made of a circuit board mounted on a lead frame is used for an electronic system package. High heat generated electronic components are adapted to mount on the lead frame and relatively low heat generated electronic components are adapted to mount on the circuit board. Metal lines are used for electrical coupling between the circuitry of the IC chip and the circuit board. An electronic system with the composite substrate gains both advantages—good circuitry arrangement capability from the circuit board and good heat distribution from the lead frame.
Abstract translation: 将由安装在引线框架上的电路板制成的复合基板用于电子系统封装。 高热产生的电子部件适于安装在引线框架上,相对低的发热电子部件适于安装在电路板上。 金属线用于IC芯片的电路和电路板之间的电耦合。 具有复合基板的电子系统具有两个优点 - 电路板具有良好的电路布置能力和来自引线框架的良好热分布。
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公开(公告)号:US08547709B2
公开(公告)日:2013-10-01
申请号:US12705389
申请日:2010-02-12
Applicant: Han-Hsiang Lee , Kun-Hong Shih , Jeng-Jen Li
Inventor: Han-Hsiang Lee , Kun-Hong Shih , Jeng-Jen Li
CPC classification number: H05K7/1432 , H01L23/13 , H01L23/49531 , H01L23/49541 , H01L2224/49175 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107 , H02M3/00 , H05K1/021 , H05K3/0061 , H05K2201/10924 , H05K2203/1327 , H01L2924/00
Abstract: A composite substrate made of a circuit board mounted on a lead frame is used for an electronic system package. High heat generated electronic components are adapted to mount on the lead frame and relatively low heat generated electronic components are adapted to mount on the circuit board. Metal lines are used for electrical coupling between the circuitry of the IC chip and the circuit board. An electronic system with the composite substrate gains both advantages—good circuitry arrangement capability from the circuit board and good heat distribution from the lead frame.
Abstract translation: 将由安装在引线框架上的电路板制成的复合基板用于电子系统封装。 高热产生的电子部件适于安装在引线框架上,相对低的发热电子部件适于安装在电路板上。 金属线用于IC芯片的电路和电路板之间的电耦合。 具有复合基板的电子系统具有两个优点 - 电路板具有良好的电路布置能力和来自引线框架的良好热分布。
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