公开(公告)号：US10373930B2

公开(公告)日：2019-08-06

申请号：US13571378

申请日：2012-08-10

申请人： Jeng-Jen Li ,  Bau-Ru Lu

发明人： Jeng-Jen Li ,  Bau-Ru Lu

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L23/13 ,  H01L23/538 ,  H01L25/16 ,  H01L23/498

摘要： The invention discloses a package structure with at least one portion of a first conductive element disposed in a through-opening of a first substrate. A conductive structure is disposed on the first substrate and the first conductive element, wherein the conductive structure is electrically connected to the first substrate and said at least one first I/O terminal of the first conductive element. The conductive structure comprises at least one of a second conductive element, a second substrate or a conductive pattern.

公开(公告)号：US09514964B2

公开(公告)日：2016-12-06

申请号：US14821812

申请日：2015-08-10

申请人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

发明人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

IPC分类号： H01L21/00 ,  H01L21/48 ,  H01L23/495 ,  H01L21/768 ,  H01L25/00 ,  H01L25/16 ,  H01L23/00

CPC分类号： H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

摘要翻译： 公开了一种形成导电结构的方法，所述方法包括以下步骤：形成具有彼此分离的多个金属部件的金属框架; 在所述多个金属部件的顶表面上形成绝缘层; 以及在所述绝缘层上形成导电图案层，用于与所述多个金属部件的至少一部分进行电连接。

公开(公告)号：US20100059870A1

公开(公告)日：2010-03-11

申请号：US12491096

申请日：2009-06-24

申请人： Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

发明人： Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

IPC分类号： H01L23/495

CPC分类号： H01L23/4334 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49586 ,  H01L23/62 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a top surface encapsulates the chip, the substrate, and a portion of the leads. The heat dissipation device is disposed on the top surface of the molding compound. The insulating sheet disposed between the heat dissipation device and at least one of the leads has a bending line dividing the insulating sheet into a main body disposed on the molding compound and a bending portion extending from the main body.

摘要翻译： 提供了包括基板，至少一个芯片，多个引线，散热装置，模塑料和至少一个绝缘片的芯片封装结构。 芯片设置在基板上。 引线电连接到基板。 具有顶表面的模制化合物封装芯片，衬底和引线的一部分。 散热装置设置在模塑料的顶表面上。 布置在散热装置与至少一个引线之间的绝缘片具有将绝缘片划分为设置在模制化合物上的主体和从主体延伸的弯曲部的弯曲线。

公开(公告)号：US20080179722A1

公开(公告)日：2008-07-31

申请号：US11930183

申请日：2007-10-31

申请人： Da-Jung Chen ,  Chung-Shiun Fang ,  Bau-Ru Lu ,  Yi-Cheng Lin ,  Chau-Chun Wen

发明人： Da-Jung Chen ,  Chung-Shiun Fang ,  Bau-Ru Lu ,  Yi-Cheng Lin ,  Chau-Chun Wen

IPC分类号： H01L23/495

CPC分类号： H05K1/141 ,  H01L23/495 ,  H01L23/49555 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/30107 ,  H05K1/0262 ,  H05K3/284 ,  H05K3/3421 ,  H05K2201/10166 ,  H05K2201/10924 ,  H05K2201/10969 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic package structure including a first carrier, at least one first electronic element, at least one second electronic element, and an encapsulant is provided. The first carrier has a first carrying surface and a second carrying surface opposite to the first carrying surface. The first electronic element is disposed on the first carrying surface and electrically connected to the first carrier. The second electronic element is disposed on the second carrying surface and electrically connected to the first carrier. The encapsulant at least covers the first electronic element, the second electronic element, and a part of the first carrier. The space utilization rate of the first carrier of the electronic package structure is higher.

摘要翻译： 提供了包括第一载体，至少一个第一电子元件，至少一个第二电子元件和密封剂的电子封装结构。 第一载体具有与第一载体表面相对的第一载体表面和第二载体表面。 第一电子元件设置在第一承载表面上并电连接到第一载体。 第二电子元件设置在第二承载表面上并电连接到第一载体。 密封剂至少覆盖第一电子元件，第二电子元件和第一载体的一部分。 电子封装结构的第一载体的空间利用率更高。

公开(公告)号：US09386686B2

公开(公告)日：2016-07-05

申请号：US13450229

申请日：2012-04-18

申请人： Chi-Feng Huang ,  Bau-Ru Lu ,  Da-Jung Chen ,  Jeng-Jen Li

发明人： Chi-Feng Huang ,  Bau-Ru Lu ,  Da-Jung Chen ,  Jeng-Jen Li

IPC分类号： H05K7/20 ,  H05K1/02 ,  H05K3/44 ,  H05K1/18

CPC分类号： H05K1/0204 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48248 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H05K1/0203 ,  H05K1/021 ,  H05K1/181 ,  H05K1/184 ,  H05K3/445 ,  H05K2201/10515 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electronic package structure is provided which comprises a metal core PCB, an energy storage device and at least one electronic component. The at least one electronic component is disposed between the metal core PCB and the energy storage device. The metal core PCB defines at least a through hole. A thermal passage is disposed in the through hole. An insulating layer is disposed in the through hole and located between the metal layer of the metal core PCB and the thermal passage to prevent the electric coupling between the thermal passage and the metal layer. The energy storage device comprises at least a connecting pin in thermal contact with the thermal passage.

摘要翻译： 提供一种电子封装结构，其包括金属芯PCB，能量存储装置和至少一个电子元件。 至少一个电子部件设置在金属芯PCB和能量存储装置之间。 金属芯PCB至少定义一个通孔。 热通道设置在通孔中。 绝缘层设置在通孔中并且位于金属芯PCB的金属层和热通道之间，以防止热通道和金属层之间的电耦合。 能量存储装置至少包括与热通道热接触的连接销。

公开(公告)号：US09142426B2

公开(公告)日：2015-09-22

申请号：US13163770

申请日：2011-06-20

申请人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

发明人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

IPC分类号： H01L23/12 ,  H01L21/48 ,  H01L23/495 ,  H01L23/00

CPC分类号： H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of forming a conductive pattern on a metallic frame for manufacturing a stack frame for electrical connections is disclosed. In one embodiment, a recess is formed in the metallic frame and a conductive element is bonded in the recess to make a stack frame for electrical connections. In another embodiment, the process can be performed on both top surface and bottom surface of metallic frame to make another stack frame for electrical connections. In yet another embodiment, a package structure and a manufacturing method of forming a conductive pattern on a lead frame for electrical connections are disclosed.

摘要翻译： 公开了一种在用于制造用于电连接的堆叠框架的金属框架上形成导电图案的方法。 在一个实施例中，在金属框架中形成凹部，并且导电元件接合在凹部中以形成用于电连接的堆叠框架。 在另一个实施例中，该过程可以在金属框架的顶表面和底表面上进行以制造用于电连接的另一个堆叠框架。 在另一个实施例中，公开了一种在用于电连接的引线框架上形成导电图案的封装结构和制造方法。

公开(公告)号：US20140042610A1

公开(公告)日：2014-02-13

申请号：US13571378

申请日：2012-08-10

申请人： JENG-JEN LI ,  BAU-RU LU

发明人： JENG-JEN LI ,  BAU-RU LU

IPC分类号： H01L23/48 ,  H01L21/60 ,  H01L23/34

CPC分类号： H01L24/19 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24101 ,  H01L2224/24155 ,  H01L2224/244 ,  H01L2224/2518 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/00

摘要： The invention discloses a package structure with at least one portion of a first conductive element disposed in a through-opening of a first substrate. A conductive structure is disposed on the first substrate and the first conductive element, wherein the conductive structure is electrically connected to the first substrate and said at least one first I/O terminal of the first conductive element. The conductive structure comprises at least one of a second conductive element, a second substrate or a conductive pattern.

摘要翻译： 本发明公开了一种封装结构，其具有设置在第一基板的通孔中的第一导电元件的至少一部分。 导电结构设置在第一基板和第一导电元件上，其中导电结构电连接到第一基板和第一导电元件的所述至少一个第一I / O端子。 导电结构包括第二导电元件，第二基板或导电图案中的至少一个。

公开(公告)号：US20130213704A1

公开(公告)日：2013-08-22

申请号：US13401853

申请日：2012-02-22

申请人： BAU-RU LU ,  JENG-JEN LI ,  KUN-HONG SHIH ,  KAIPENG CHIANG

发明人： BAU-RU LU ,  JENG-JEN LI ,  KUN-HONG SHIH ,  KAIPENG CHIANG

IPC分类号： H05K1/11 ,  H05K3/00

CPC分类号： H01L23/49537 ,  H01L21/563 ,  H01L23/13 ,  H01L23/49506 ,  H01L23/49534 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15321 ,  H05K1/021 ,  H05K1/186 ,  Y10T29/49124 ,  H01L2924/00

摘要： The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified.

摘要翻译： 本发明公开了一种由装置载体和可修改基底的组合制成的封装结构。 在一个实施例中，在器件载体中形成凹部，并且导电元件设置在衬底上，其中衬底设置在器件载体上，并且导电元件位于器件载体的凹部中。 衬底中的导电图案电连接到器件载体和第一导电元件的I / O端子。 本发明还公开了一种用于制造由器件载体和可修改基底的组合制成的封装结构的方法。 在一个实施例中，衬底中的导电图案的一部分可以被修改。

公开(公告)号：US20120319258A1

公开(公告)日：2012-12-20

申请号：US13163770

申请日：2011-06-20

申请人： BAU-RU LU ,  DA-JUNG CHEN ,  YI-CHENG LIN

发明人： BAU-RU LU ,  DA-JUNG CHEN ,  YI-CHENG LIN

IPC分类号： H01L23/495 ,  H01L21/50

CPC分类号： H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of forming a conductive pattern on a metallic frame for manufacturing a stack frame for electrical connections is disclosed. In one embodiment, a recess is formed in the metallic frame and a conductive element is bonded in the recess to make a stack frame for electrical connections. In another embodiment, the process can be performed on both top surface and bottom surface of metallic frame to make another stack frame for electrical connections. In yet another embodiment, a package structure and a manufacturing method of forming a conductive pattern on a lead frame for electrical connections are disclosed.

摘要翻译： 公开了一种在用于制造用于电连接的堆叠框架的金属框架上形成导电图案的方法。 在一个实施例中，在金属框架中形成凹部，并且导电元件接合在凹部中以形成用于电连接的堆叠框架。 在另一个实施例中，该过程可以在金属框架的顶表面和底表面上进行以制造用于电连接的另一个堆叠框架。 在另一个实施例中，公开了一种在用于电连接的引线框架上形成导电图案的封装结构和制造方法。

公开(公告)号：US20120262074A1

公开(公告)日：2012-10-18

申请号：US13425412

申请日：2012-03-20

申请人： Wei-Cheng Wang ,  Bau-Ru Lu ,  Chun-Hsien Lu ,  Jeng-Jen Li

发明人： Wei-Cheng Wang ,  Bau-Ru Lu ,  Chun-Hsien Lu ,  Jeng-Jen Li

IPC分类号： H05B37/02

CPC分类号： H05B33/083

摘要： A driving circuit of light emitting diodes includes a power supply circuit, at least one bypass circuit, and a temperature control circuit. The power supply circuit is used for providing a driving voltage to at least one series of light emitting diodes. Each bypass circuit of the at least one bypass circuit is used for being turned on when an ambient temperature is lower than a predetermined temperature. The temperature control circuit is coupled to the at least one bypass circuit for detecting the ambient temperature, and sending a control signal to the at least one bypass circuit when the ambient temperature is lower than the predetermined temperature. Therefore, the driving voltage can still drive the at least one series of light emitting diodes when the ambient temperature is lower than the predetermined temperature.

摘要翻译： 发光二极管的驱动电路包括电源电路，至少一个旁路电路和温度控制电路。 电源电路用于向至少一系列的发光二极管提供驱动电压。 当环境温度低于预定温度时，所述至少一个旁路电路的每个旁路电路用于接通。 温度控制电路耦合到至少一个旁路电路，用于检测环境温度，并且当环境温度低于预定温度时，将控制信号发送到至少一个旁路电路。 因此，当环境温度低于预定温度时，驱动电压仍能驱动至少一系列的发光二极管。