公开(公告)号：US20070120103A1

公开(公告)日：2007-05-31

申请号：US11582206

申请日：2006-10-16

申请人： Mark Burgener ,  James Cable

发明人： Mark Burgener ,  James Cable

IPC分类号： H01L47/00 ,  H01L29/00

CPC分类号： H03K17/6871 ,  H01P1/15 ,  H03K17/063 ,  H03K17/102 ,  H03K17/693 ,  H03K19/018521 ,  H03K19/0944 ,  H03K2017/0803 ,  H04B1/40

摘要： An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

摘要翻译： 一种用于切换RF信号的RF开关电路和方法，其可以使用诸如硅的公共集成电路材料制造，特别是使用绝缘衬底技术。 RF开关包括切换和分流晶体管组，以将RF输入信号交替耦合到公共RF节点，每个RF节点由开关控制电压（SW）或其倒数（SW_）控制，开关控制电压（SW）近似对称关于地对称。 晶体管组各自包括以“堆叠”串联通道配置连接在一起的一个或多个绝缘栅FET晶体管，这增加了串联连接的晶体管两端的击穿电压并改善了RF开关压缩。 描述了完全集成的RF开关，其包括具有RF开关元件的控制逻辑和负电压发生器。 在一个实施例中，完全集成的RF开关包括振荡器，电荷泵，CMOS逻辑电路，电平移位和分压电路以及RF缓冲电路。

公开(公告)号：US20050287976A1

公开(公告)日：2005-12-29

申请号：US11158597

申请日：2005-06-22

申请人： Mark Burgener ,  James Cable

发明人： Mark Burgener ,  James Cable

IPC分类号： H03F1/22 ,  H03F3/189 ,  H03F3/68 ,  H04B1/28 ,  H04M1/00

CPC分类号： H03F3/189 ,  H01Q23/00 ,  H03F1/223 ,  H03F1/565 ,  H03F3/2171 ,  H03F3/68 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/61 ,  H03G3/3042 ,  H03G11/00 ,  H04B1/0475 ,  H04B1/48

摘要： A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Preferred fabrication techniques include stacking multiple FETs to form switching devices. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

摘要翻译： 一种单片集成电路（IC）及其制造方法，其包括用于便携式通信设备的所有RF前端或收发器元件，包括功率放大器（PA），匹配，耦合和滤波网络以及天线开关 将调节的PA信号耦合到天线。 输出信号传感器至少感测由天线开关切换的信号的电压幅度，并且响应于感测输出的过大值，向PA控制电路发信号以限制PA输出功率。 优选的制造技术包括堆叠多个FET以形成开关器件。 描述了一种消耗性地终止PA输出信号的不需要的谐波的iClass PA架构。 RF收发器IC的优选实施例包括两个不同的PA电路，两个不同的接收信号放大器电路和四路天线开关，以将单个天线连接可选择地耦合到四个电路中的任一个。

公开(公告)号：US20050052220A1

公开(公告)日：2005-03-10

申请号：US10658154

申请日：2003-09-08

申请人： Mark Burgener ,  Dylan Kelly ,  James Cable

发明人： Mark Burgener ,  Dylan Kelly ,  James Cable

IPC分类号： H02M3/07 ,  G05F3/02

CPC分类号： H03K3/013 ,  H02M3/07 ,  H02M3/073 ,  H03K3/0315

摘要： A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

摘要翻译： 描述了具有各种方面的电荷泵方法和装置。 通过限制正时钟和负时钟转换速率以及通过限制时钟发生器驱动器电路内的驱动电流以及通过增加某些传输电容器耦合开关的控制节点AC阻抗来降低从电荷泵到其它电路的噪声注入 。 单相时钟可用于控制与电荷泵内的所有有源开关一样多的电容耦合，并且电容耦合可以简化控制传输电容耦合开关的时钟信号的偏置和定时。 方法或装置的这些方面的任何组合可用于在宽范围的电荷泵结构中安静和/或简化电荷泵设计。

公开(公告)号：US20070069291A1

公开(公告)日：2007-03-29

申请号：US11520912

申请日：2006-09-14

申请人： Michael Stuber ,  Christopher Brindle ,  Dylan Kelly ,  Clint Kemerling ,  George Imthurn ,  Robert Welstand ,  Mark Burgener ,  Alexander Dribinsky ,  Tae Kim

发明人： Michael Stuber ,  Christopher Brindle ,  Dylan Kelly ,  Clint Kemerling ,  George Imthurn ,  Robert Welstand ,  Mark Burgener ,  Alexander Dribinsky ,  Tae Kim

IPC分类号： H01L27/12

CPC分类号： H01L29/78615 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/78651 ,  H01L29/78654 ,  H01L29/78657 ,  H03K17/162

摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

摘要翻译： 公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化物可靠性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。 首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。 第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。 在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

公开(公告)号：US20070018247A1

公开(公告)日：2007-01-25

申请号：US11484370

申请日：2006-07-10

申请人： Christopher Brindle ,  Michael Stuber ,  Dylan Kelly ,  Clint Kemerling ,  George Imthurn ,  Robert Welstand ,  Mark Burgener

发明人： Christopher Brindle ,  Michael Stuber ,  Dylan Kelly ,  Clint Kemerling ,  George Imthurn ,  Robert Welstand ,  Mark Burgener

IPC分类号： H01L27/12

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷吸收器消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性 的SOI MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US20050285684A1

公开(公告)日：2005-12-29

申请号：US10875405

申请日：2004-06-23

申请人： Mark Burgener ,  James Cable

发明人： Mark Burgener ,  James Cable

IPC分类号： H03F1/22 ,  H03F3/189 ,  H03F3/68 ,  H04B1/28 ,  H04M1/00

CPC分类号： H03F3/189 ,  H01Q23/00 ,  H03F1/223 ,  H03F1/565 ,  H03F3/2171 ,  H03F3/68 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/61 ,  H03G3/3042 ,  H03G11/00 ,  H04B1/0475 ,  H04B1/48

摘要： A method and apparatus is described for controlling conduction between two nodes of an integrated circuit via a stack of FETs of common polarity, coupled in series. In an RF Power Amplifier (PA) having appropriate output filtering, or in a quad mixer, stacks of two or more FETs may be used to permit the use of increased voltages between the two nodes. Power control for such RF PAs may be effected by varying a bias voltage to one or more FETs of the stack. Stacks of three or more FETs may be employed to control conduction between any two nodes of an integrated circuit.

摘要翻译： 描述了一种用于通过串联耦合的共同极性的FET的堆叠来控制集成电路的两个节点之间的导通的方法和装置。 在具有适当输出滤波的RF功率放大器（PA）中，或在四通道混频器中，可以使用两个或更多个FET的堆叠来允许在两个节点之间使用增加的电压。 可以通过将叠加的一个或多个FET的偏置电压改变来实现这种RF PA的功率控制。 可以采用三个或更多个FET的堆叠来控制集成电路的任何两个节点之间的导通。

公开(公告)号：US20060270367A1

公开(公告)日：2006-11-30

申请号：US11501125

申请日：2006-08-07

申请人： Mark Burgener ,  James Cable

发明人： Mark Burgener ,  James Cable

IPC分类号： H04B1/04 ,  H04B1/28 ,  H01Q11/12

CPC分类号： H04B1/48 ,  H01L27/0248 ,  H01Q23/00 ,  H03F1/0205 ,  H03F1/56 ,  H03F1/565 ,  H03F3/19 ,  H03F3/21 ,  H03F2200/387 ,  H03F2200/451 ,  H03G3/3042 ,  H03G11/00 ,  H04B1/0053 ,  H04B1/0475 ,  H04L27/04

摘要： A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

摘要翻译： 一种单片集成电路（IC）及其制造方法，其包括用于便携式通信设备的所有RF前端或收发器元件，包括功率放大器（PA），匹配，耦合和滤波网络以及天线开关 将调节的PA信号耦合到天线。 输出信号传感器至少感测由天线开关切换的信号的电压幅度，并且响应于感测输出的过大值，向PA控制电路发信号以限制PA输出功率。 用作串联用作开关装置的多个FET的堆叠可以用于RF前端的实现，并且这种堆叠的方法和装置被称为子组合。 描述了一种消耗性地终止PA输出信号的不需要的谐波的iClass PA架构。 RF收发器IC的优选实施例包括两个不同的PA电路，两个不同的接收信号放大器电路和四路天线开关，以将单个天线连接可选择地耦合到四个电路中的任一个。

公开(公告)号：US20060194567A1

公开(公告)日：2006-08-31

申请号：US11347014

申请日：2006-02-03

申请人： Dylan Kelly ,  Mark Burgener

发明人： Dylan Kelly ,  Mark Burgener

IPC分类号： H04M11/00

CPC分类号： H03K17/6871 ,  H02M3/073 ,  H03K17/063 ,  H03K17/693

摘要： A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i.e., the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i.e., at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping). The stacked configuration of the transistor groupings enable the RF switch to withstand RF signals of varying and increased power levels. The asymmetrically stacked transistor grouping RF switch facilitates area-efficient implementation of the RF switch in an integrated circuit. Maximum input and output signal power levels can be withstood using a reduced number of stacked transistors.

摘要翻译： 描述了适用于使用减少数量的晶体管来改善功率处理能力的绝缘体上硅（SOI）RF开关。 在一个实施例中，RF开关包括成对的开关和分流堆叠晶体管组，以选择性地耦合多个输入/输出节点与公共RF节点之间的RF信号。 开关和分流堆叠晶体管组包括以“堆叠”或串联配置连接在一起的一个或多个MOSFET晶体管。 在一个实施例中，晶体管组在RF开关中被“对称地”堆叠（即，晶体管组都包括相同数量的晶体管）。 在另一个实施例中，晶体管组在RF开关中被“不对称地”堆叠（即，至少一个晶体管组包括不等于包含至少一个其它晶体管组的晶体管数量的多个晶体管）。 晶体管组的堆叠配置使得RF开关能够承受变化和增加的功率水平的RF信号。 不对称堆叠的晶体管分组RF开关有助于集成电路中的RF开关的区域有效的实现。 使用减少数量的堆叠晶体管可以承受最大的输入和输出信号功率电平。

公开(公告)号：US20050017789A1

公开(公告)日：2005-01-27

申请号：US10922135

申请日：2004-08-18

申请人： Mark Burgener ,  James Cable

发明人： Mark Burgener ,  James Cable

IPC分类号： H01L21/822 ,  H01L27/04 ,  H01P1/15 ,  H03K17/06 ,  H03K17/693 ,  H03F3/45

CPC分类号： H03K17/6871 ,  H01P1/15 ,  H03K17/063 ,  H03K17/102 ,  H03K17/693 ,  H03K19/018521 ,  H03K19/0944 ,  H03K2017/0803 ,  H04B1/40

摘要： A novel RF buffer circuit adapted for use with an RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW_). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The inventive RF switch provides improvements in insertion loss, switch isolation, and switch compression.

摘要翻译： 描述了适用于RF开关电路的新型RF缓冲电路和用于切换RF信号的方法。 RF开关电路采用绝缘体上硅（SOI）技术制造。 RF开关包括用于交替地将RF输入信号耦合到公共RF节点的成对的开关和分流晶体管组。 开关和分流晶体管分组对由开关控制电压（SW）及其反相（SW_）控制。 开关和分流晶体管组包括以“堆叠”或串联配置连接在一起的一个或多个MOSFET晶体管。 晶体管分组器件和相关的栅极电阻器的堆叠增加了串联连接的开关晶体管上的击穿电压，并且操作以改善RF开关压缩。 描述了完全集成的RF开关，其包括与RF开关元件集成在一起的数字控制逻辑和负电压发生器。 在一个实施例中，完全集成的RF开关包括内置振荡器，电荷泵电路，CMOS逻辑电路，电平转换和分压器电路以及RF缓冲电路。 描述了电荷泵，电平转换，分压器和RF缓冲电路的几个实施例。 本发明的RF开关提供插入损耗，开关隔离和开关压缩方面的改进。