摘要:
Provided are a wafer level chip scale package in which a redistribution process is applied at a wafer level, a manufacturing method thereof, and a semiconductor chip module including the wafer level chip scale package. The wafer level chip scale package includes a semiconductor chip having a bonding pad, a first insulating layer disposed on the semiconductor chip so as to expose the bonding pad, a redistribution line disposed on the exposed bonding pad and the first insulating layer, a sacrificial layer disposed below a redistribution pad of the redistribution line, a second insulating layer disposed on the redistribution line so as to expose the redistribution pad and including a crack inducement hole disposed beside the sacrificial layer, and an external connection terminal attached to the redistribution pad.
摘要:
The present invention relates to a new plasmid originated from (Bifidobacterium) a recombinant expression vector and transformation method using the same. More particularly, the present invention relates to a plasmid pMG1 having nucleotide sequence represented by SEQ.ID.NO.1; (Bifidobacterium longum) MG1 including the plasmid pMG1; and a shuttle vector which can be replicated in both (Bifidobacterium) and (E. coli), and comprises (Mob) gene having nucleotide sequence represented by SEQ.ID.NO.2. (Rep) gene having nucleotide sequence represented by SEQ.ID.NO.3 and a selection marker. The shuttle vector and the promoter of the present invention can be used for expressing target gene without additional purification process. The protein expressed from the target gene in (Bifidobacterium) can be added to food, therefore, the protein can be used for preparing food additives or oral vaccine, Furthermore, the potential and the possibilty of probiotics using (Bifidobacterium) can promoted through the development of the shuttle vector.
摘要:
Provided are a wafer level chip scale package in which a redistribution process is applied at a wafer level, a manufacturing method thereof, and a semiconductor chip module including the wafer level chip scale package. The wafer level chip scale package includes a semiconductor chip having a bonding pad, a first insulating layer disposed on the semiconductor chip so as to expose the bonding pad, a redistribution line disposed on the exposed bonding pad and the first insulating layer, a sacrificial layer disposed below a redistribution pad of the redistribution line, a second insulating layer disposed on the redistribution line so as to expose the redistribution pad and including a crack inducement hole disposed beside the sacrificial layer, and an external connection terminal attached to the redistribution pad.